2013-10-17 06:42:26 +08:00
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/*
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* Xtensa SMP support functions.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2008 - 2013 Tensilica Inc.
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*
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* Chris Zankel <chris@zankel.net>
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* Joe Taylor <joe@tensilica.com>
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* Pete Delaney <piet@tensilica.com
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*/
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#include <linux/cpu.h>
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#include <linux/cpumask.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irqdomain.h>
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#include <linux/irq.h>
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#include <linux/kdebug.h>
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#include <linux/module.h>
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2017-02-02 02:08:20 +08:00
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#include <linux/sched/mm.h>
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2017-02-09 01:51:36 +08:00
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#include <linux/sched/hotplug.h>
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2017-02-09 01:51:37 +08:00
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#include <linux/sched/task_stack.h>
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2013-10-17 06:42:26 +08:00
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#include <linux/reboot.h>
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#include <linux/seq_file.h>
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#include <linux/smp.h>
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#include <linux/thread_info.h>
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#include <asm/cacheflush.h>
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#include <asm/kdebug.h>
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#include <asm/mmu_context.h>
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#include <asm/mxregs.h>
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#include <asm/platform.h>
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#include <asm/tlbflush.h>
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#include <asm/traps.h>
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#ifdef CONFIG_SMP
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# if XCHAL_HAVE_S32C1I == 0
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# error "The S32C1I option is required for SMP."
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# endif
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#endif
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2013-10-17 06:42:28 +08:00
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static void system_invalidate_dcache_range(unsigned long start,
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unsigned long size);
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static void system_flush_invalidate_dcache_range(unsigned long start,
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unsigned long size);
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2013-10-17 06:42:26 +08:00
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/* IPI (Inter Process Interrupt) */
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#define IPI_IRQ 0
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static irqreturn_t ipi_interrupt(int irq, void *dev_id);
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static struct irqaction ipi_irqaction = {
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.handler = ipi_interrupt,
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.flags = IRQF_PERCPU,
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.name = "ipi",
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};
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void ipi_init(void)
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{
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unsigned irq = irq_create_mapping(NULL, IPI_IRQ);
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setup_irq(irq, &ipi_irqaction);
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}
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static inline unsigned int get_core_count(void)
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{
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/* Bits 18..21 of SYSCFGID contain the core count minus 1. */
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unsigned int syscfgid = get_er(SYSCFGID);
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return ((syscfgid >> 18) & 0xf) + 1;
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}
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static inline int get_core_id(void)
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{
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/* Bits 0...18 of SYSCFGID contain the core id */
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unsigned int core_id = get_er(SYSCFGID);
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return core_id & 0x3fff;
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}
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void __init smp_prepare_cpus(unsigned int max_cpus)
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{
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unsigned i;
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2019-01-19 16:26:48 +08:00
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for_each_possible_cpu(i)
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2013-10-17 06:42:26 +08:00
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set_cpu_present(i, true);
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}
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void __init smp_init_cpus(void)
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{
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unsigned i;
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unsigned int ncpus = get_core_count();
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unsigned int core_id = get_core_id();
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pr_info("%s: Core Count = %d\n", __func__, ncpus);
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pr_info("%s: Core Id = %d\n", __func__, core_id);
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2019-01-27 12:35:18 +08:00
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if (ncpus > NR_CPUS) {
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ncpus = NR_CPUS;
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pr_info("%s: limiting core count by %d\n", __func__, ncpus);
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}
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2013-10-17 06:42:26 +08:00
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for (i = 0; i < ncpus; ++i)
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set_cpu_possible(i, true);
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}
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void __init smp_prepare_boot_cpu(void)
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{
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unsigned int cpu = smp_processor_id();
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BUG_ON(cpu != 0);
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cpu_asid_cache(cpu) = ASID_USER_FIRST;
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}
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void __init smp_cpus_done(unsigned int max_cpus)
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{
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}
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static int boot_secondary_processors = 1; /* Set with xt-gdb via .xt-gdb */
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static DECLARE_COMPLETION(cpu_running);
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2013-10-17 06:42:28 +08:00
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void secondary_start_kernel(void)
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2013-10-17 06:42:26 +08:00
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{
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struct mm_struct *mm = &init_mm;
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unsigned int cpu = smp_processor_id();
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init_mmu();
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#ifdef CONFIG_DEBUG_KERNEL
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if (boot_secondary_processors == 0) {
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pr_debug("%s: boot_secondary_processors:%d; Hanging cpu:%d\n",
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__func__, boot_secondary_processors, cpu);
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for (;;)
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__asm__ __volatile__ ("waiti " __stringify(LOCKLEVEL));
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}
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pr_debug("%s: boot_secondary_processors:%d; Booting cpu:%d\n",
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__func__, boot_secondary_processors, cpu);
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#endif
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/* Init EXCSAVE1 */
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secondary_trap_init();
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/* All kernel threads share the same mm context. */
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2017-02-28 06:30:10 +08:00
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mmget(mm);
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2017-02-28 06:30:07 +08:00
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mmgrab(mm);
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2013-10-17 06:42:26 +08:00
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current->active_mm = mm;
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cpumask_set_cpu(cpu, mm_cpumask(mm));
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enter_lazy_tlb(mm, current);
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preempt_disable();
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trace_hardirqs_off();
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calibrate_delay();
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notify_cpu_starting(cpu);
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secondary_init_irq();
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local_timer_setup(cpu);
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2013-12-12 21:41:01 +08:00
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set_cpu_online(cpu, true);
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2013-10-17 06:42:26 +08:00
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local_irq_enable();
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complete(&cpu_running);
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2016-02-27 02:43:40 +08:00
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cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
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2013-10-17 06:42:26 +08:00
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}
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static void mx_cpu_start(void *p)
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{
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unsigned cpu = (unsigned)p;
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unsigned long run_stall_mask = get_er(MPSCORE);
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set_er(run_stall_mask & ~(1u << cpu), MPSCORE);
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pr_debug("%s: cpu: %d, run_stall_mask: %lx ---> %lx\n",
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__func__, cpu, run_stall_mask, get_er(MPSCORE));
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}
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static void mx_cpu_stop(void *p)
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{
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unsigned cpu = (unsigned)p;
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unsigned long run_stall_mask = get_er(MPSCORE);
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set_er(run_stall_mask | (1u << cpu), MPSCORE);
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pr_debug("%s: cpu: %d, run_stall_mask: %lx ---> %lx\n",
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__func__, cpu, run_stall_mask, get_er(MPSCORE));
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}
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2013-10-17 06:42:28 +08:00
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#ifdef CONFIG_HOTPLUG_CPU
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unsigned long cpu_start_id __cacheline_aligned;
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#endif
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2013-10-17 06:42:26 +08:00
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unsigned long cpu_start_ccount;
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static int boot_secondary(unsigned int cpu, struct task_struct *ts)
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{
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unsigned long timeout = jiffies + msecs_to_jiffies(1000);
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unsigned long ccount;
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int i;
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2013-10-17 06:42:28 +08:00
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#ifdef CONFIG_HOTPLUG_CPU
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2018-12-22 00:26:20 +08:00
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WRITE_ONCE(cpu_start_id, cpu);
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/* Pairs with the third memw in the cpu_restart */
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mb();
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system_flush_invalidate_dcache_range((unsigned long)&cpu_start_id,
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sizeof(cpu_start_id));
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2013-10-17 06:42:28 +08:00
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#endif
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2013-10-17 06:42:26 +08:00
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smp_call_function_single(0, mx_cpu_start, (void *)cpu, 1);
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for (i = 0; i < 2; ++i) {
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do
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ccount = get_ccount();
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while (!ccount);
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2018-12-22 00:26:20 +08:00
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WRITE_ONCE(cpu_start_ccount, ccount);
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2013-10-17 06:42:26 +08:00
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2018-12-22 00:26:20 +08:00
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do {
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/*
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* Pairs with the first two memws in the
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* .Lboot_secondary.
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*/
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2013-10-17 06:42:26 +08:00
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mb();
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2018-12-22 00:26:20 +08:00
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ccount = READ_ONCE(cpu_start_ccount);
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} while (ccount && time_before(jiffies, timeout));
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2013-10-17 06:42:26 +08:00
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2018-12-22 00:26:20 +08:00
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if (ccount) {
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2013-10-17 06:42:26 +08:00
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smp_call_function_single(0, mx_cpu_stop,
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2018-12-22 00:26:20 +08:00
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(void *)cpu, 1);
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WRITE_ONCE(cpu_start_ccount, 0);
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2013-10-17 06:42:26 +08:00
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return -EIO;
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}
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}
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return 0;
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}
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int __cpu_up(unsigned int cpu, struct task_struct *idle)
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{
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int ret = 0;
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if (cpu_asid_cache(cpu) == 0)
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cpu_asid_cache(cpu) = ASID_USER_FIRST;
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start_info.stack = (unsigned long)task_pt_regs(idle);
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wmb();
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pr_debug("%s: Calling wakeup_secondary(cpu:%d, idle:%p, sp: %08lx)\n",
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__func__, cpu, idle, start_info.stack);
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2018-12-22 00:26:20 +08:00
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init_completion(&cpu_running);
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2013-10-17 06:42:26 +08:00
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ret = boot_secondary(cpu, idle);
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if (ret == 0) {
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wait_for_completion_timeout(&cpu_running,
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msecs_to_jiffies(1000));
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if (!cpu_online(cpu))
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ret = -EIO;
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}
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if (ret)
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pr_err("CPU %u failed to boot\n", cpu);
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return ret;
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}
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2013-10-17 06:42:28 +08:00
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#ifdef CONFIG_HOTPLUG_CPU
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/*
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* __cpu_disable runs on the processor to be shutdown.
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*/
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int __cpu_disable(void)
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{
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unsigned int cpu = smp_processor_id();
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/*
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* Take this CPU offline. Once we clear this, we can't return,
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* and we must not schedule until we're ready to give up the cpu.
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*/
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set_cpu_online(cpu, false);
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/*
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* OK - migrate IRQs away from this CPU
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*/
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migrate_irqs();
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/*
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* Flush user cache and TLB mappings, and then remove this CPU
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* from the vm mask set of all processes.
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*/
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local_flush_cache_all();
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local_flush_tlb_all();
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invalidate_page_directory();
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clear_tasks_mm_cpumask(cpu);
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return 0;
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}
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static void platform_cpu_kill(unsigned int cpu)
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{
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smp_call_function_single(0, mx_cpu_stop, (void *)cpu, true);
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}
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/*
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* called on the thread which is asking for a CPU to be shutdown -
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* waits until shutdown has completed, or it is timed out.
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*/
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void __cpu_die(unsigned int cpu)
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{
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unsigned long timeout = jiffies + msecs_to_jiffies(1000);
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while (time_before(jiffies, timeout)) {
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system_invalidate_dcache_range((unsigned long)&cpu_start_id,
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2018-12-22 00:26:20 +08:00
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sizeof(cpu_start_id));
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/* Pairs with the second memw in the cpu_restart */
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mb();
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if (READ_ONCE(cpu_start_id) == -cpu) {
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2013-10-17 06:42:28 +08:00
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platform_cpu_kill(cpu);
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return;
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}
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}
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pr_err("CPU%u: unable to kill\n", cpu);
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}
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void arch_cpu_idle_dead(void)
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{
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cpu_die();
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}
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/*
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* Called from the idle thread for the CPU which has been shutdown.
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*
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* Note that we disable IRQs here, but do not re-enable them
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* before returning to the caller. This is also the behaviour
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* of the other hotplug-cpu capable cores, so presumably coming
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* out of idle fixes this.
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*/
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void __ref cpu_die(void)
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{
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idle_task_exit();
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local_irq_disable();
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__asm__ __volatile__(
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" movi a2, cpu_restart\n"
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" jx a2\n");
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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2013-10-17 06:42:26 +08:00
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enum ipi_msg_type {
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IPI_RESCHEDULE = 0,
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IPI_CALL_FUNC,
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IPI_CPU_STOP,
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IPI_MAX
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};
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static const struct {
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const char *short_text;
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const char *long_text;
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} ipi_text[] = {
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{ .short_text = "RES", .long_text = "Rescheduling interrupts" },
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{ .short_text = "CAL", .long_text = "Function call interrupts" },
|
|
|
|
{ .short_text = "DIE", .long_text = "CPU shutdown interrupts" },
|
|
|
|
};
|
|
|
|
|
|
|
|
struct ipi_data {
|
|
|
|
unsigned long ipi_count[IPI_MAX];
|
|
|
|
};
|
|
|
|
|
|
|
|
static DEFINE_PER_CPU(struct ipi_data, ipi_data);
|
|
|
|
|
|
|
|
static void send_ipi_message(const struct cpumask *callmask,
|
|
|
|
enum ipi_msg_type msg_id)
|
|
|
|
{
|
|
|
|
int index;
|
|
|
|
unsigned long mask = 0;
|
|
|
|
|
|
|
|
for_each_cpu(index, callmask)
|
2019-01-19 10:45:17 +08:00
|
|
|
mask |= 1 << index;
|
2013-10-17 06:42:26 +08:00
|
|
|
|
|
|
|
set_er(mask, MIPISET(msg_id));
|
|
|
|
}
|
|
|
|
|
|
|
|
void arch_send_call_function_ipi_mask(const struct cpumask *mask)
|
|
|
|
{
|
|
|
|
send_ipi_message(mask, IPI_CALL_FUNC);
|
|
|
|
}
|
|
|
|
|
|
|
|
void arch_send_call_function_single_ipi(int cpu)
|
|
|
|
{
|
|
|
|
send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC);
|
|
|
|
}
|
|
|
|
|
|
|
|
void smp_send_reschedule(int cpu)
|
|
|
|
{
|
|
|
|
send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
|
|
|
|
}
|
|
|
|
|
|
|
|
void smp_send_stop(void)
|
|
|
|
{
|
|
|
|
struct cpumask targets;
|
|
|
|
|
|
|
|
cpumask_copy(&targets, cpu_online_mask);
|
|
|
|
cpumask_clear_cpu(smp_processor_id(), &targets);
|
|
|
|
send_ipi_message(&targets, IPI_CPU_STOP);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ipi_cpu_stop(unsigned int cpu)
|
|
|
|
{
|
|
|
|
set_cpu_online(cpu, false);
|
|
|
|
machine_halt();
|
|
|
|
}
|
|
|
|
|
|
|
|
irqreturn_t ipi_interrupt(int irq, void *dev_id)
|
|
|
|
{
|
|
|
|
unsigned int cpu = smp_processor_id();
|
|
|
|
struct ipi_data *ipi = &per_cpu(ipi_data, cpu);
|
|
|
|
|
2019-01-19 10:45:17 +08:00
|
|
|
for (;;) {
|
|
|
|
unsigned int msg;
|
|
|
|
|
|
|
|
msg = get_er(MIPICAUSE(cpu));
|
|
|
|
set_er(msg, MIPICAUSE(cpu));
|
|
|
|
|
|
|
|
if (!msg)
|
|
|
|
break;
|
|
|
|
|
|
|
|
if (msg & (1 << IPI_CALL_FUNC)) {
|
|
|
|
++ipi->ipi_count[IPI_CALL_FUNC];
|
|
|
|
generic_smp_call_function_interrupt();
|
2013-10-17 06:42:26 +08:00
|
|
|
}
|
|
|
|
|
2019-01-19 10:45:17 +08:00
|
|
|
if (msg & (1 << IPI_RESCHEDULE)) {
|
|
|
|
++ipi->ipi_count[IPI_RESCHEDULE];
|
|
|
|
scheduler_ipi();
|
|
|
|
}
|
|
|
|
|
|
|
|
if (msg & (1 << IPI_CPU_STOP)) {
|
|
|
|
++ipi->ipi_count[IPI_CPU_STOP];
|
|
|
|
ipi_cpu_stop(cpu);
|
|
|
|
}
|
|
|
|
}
|
2013-10-17 06:42:26 +08:00
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
void show_ipi_list(struct seq_file *p, int prec)
|
|
|
|
{
|
|
|
|
unsigned int cpu;
|
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
for (i = 0; i < IPI_MAX; ++i) {
|
|
|
|
seq_printf(p, "%*s:", prec, ipi_text[i].short_text);
|
|
|
|
for_each_online_cpu(cpu)
|
|
|
|
seq_printf(p, " %10lu",
|
|
|
|
per_cpu(ipi_data, cpu).ipi_count[i]);
|
|
|
|
seq_printf(p, " %s\n", ipi_text[i].long_text);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
int setup_profiling_timer(unsigned int multiplier)
|
|
|
|
{
|
|
|
|
pr_debug("setup_profiling_timer %d\n", multiplier);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* TLB flush functions */
|
|
|
|
|
|
|
|
struct flush_data {
|
|
|
|
struct vm_area_struct *vma;
|
|
|
|
unsigned long addr1;
|
|
|
|
unsigned long addr2;
|
|
|
|
};
|
|
|
|
|
|
|
|
static void ipi_flush_tlb_all(void *arg)
|
|
|
|
{
|
|
|
|
local_flush_tlb_all();
|
|
|
|
}
|
|
|
|
|
|
|
|
void flush_tlb_all(void)
|
|
|
|
{
|
|
|
|
on_each_cpu(ipi_flush_tlb_all, NULL, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ipi_flush_tlb_mm(void *arg)
|
|
|
|
{
|
|
|
|
local_flush_tlb_mm(arg);
|
|
|
|
}
|
|
|
|
|
|
|
|
void flush_tlb_mm(struct mm_struct *mm)
|
|
|
|
{
|
|
|
|
on_each_cpu(ipi_flush_tlb_mm, mm, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ipi_flush_tlb_page(void *arg)
|
|
|
|
{
|
|
|
|
struct flush_data *fd = arg;
|
|
|
|
local_flush_tlb_page(fd->vma, fd->addr1);
|
|
|
|
}
|
|
|
|
|
|
|
|
void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
|
|
|
|
{
|
|
|
|
struct flush_data fd = {
|
|
|
|
.vma = vma,
|
|
|
|
.addr1 = addr,
|
|
|
|
};
|
|
|
|
on_each_cpu(ipi_flush_tlb_page, &fd, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ipi_flush_tlb_range(void *arg)
|
|
|
|
{
|
|
|
|
struct flush_data *fd = arg;
|
|
|
|
local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
|
|
|
|
}
|
|
|
|
|
|
|
|
void flush_tlb_range(struct vm_area_struct *vma,
|
|
|
|
unsigned long start, unsigned long end)
|
|
|
|
{
|
|
|
|
struct flush_data fd = {
|
|
|
|
.vma = vma,
|
|
|
|
.addr1 = start,
|
|
|
|
.addr2 = end,
|
|
|
|
};
|
|
|
|
on_each_cpu(ipi_flush_tlb_range, &fd, 1);
|
|
|
|
}
|
|
|
|
|
2014-02-14 18:08:48 +08:00
|
|
|
static void ipi_flush_tlb_kernel_range(void *arg)
|
|
|
|
{
|
|
|
|
struct flush_data *fd = arg;
|
|
|
|
local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
|
|
|
|
}
|
|
|
|
|
|
|
|
void flush_tlb_kernel_range(unsigned long start, unsigned long end)
|
|
|
|
{
|
|
|
|
struct flush_data fd = {
|
|
|
|
.addr1 = start,
|
|
|
|
.addr2 = end,
|
|
|
|
};
|
|
|
|
on_each_cpu(ipi_flush_tlb_kernel_range, &fd, 1);
|
|
|
|
}
|
|
|
|
|
2013-10-17 06:42:26 +08:00
|
|
|
/* Cache flush functions */
|
|
|
|
|
|
|
|
static void ipi_flush_cache_all(void *arg)
|
|
|
|
{
|
|
|
|
local_flush_cache_all();
|
|
|
|
}
|
|
|
|
|
|
|
|
void flush_cache_all(void)
|
|
|
|
{
|
|
|
|
on_each_cpu(ipi_flush_cache_all, NULL, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ipi_flush_cache_page(void *arg)
|
|
|
|
{
|
|
|
|
struct flush_data *fd = arg;
|
|
|
|
local_flush_cache_page(fd->vma, fd->addr1, fd->addr2);
|
|
|
|
}
|
|
|
|
|
|
|
|
void flush_cache_page(struct vm_area_struct *vma,
|
|
|
|
unsigned long address, unsigned long pfn)
|
|
|
|
{
|
|
|
|
struct flush_data fd = {
|
|
|
|
.vma = vma,
|
|
|
|
.addr1 = address,
|
|
|
|
.addr2 = pfn,
|
|
|
|
};
|
|
|
|
on_each_cpu(ipi_flush_cache_page, &fd, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ipi_flush_cache_range(void *arg)
|
|
|
|
{
|
|
|
|
struct flush_data *fd = arg;
|
|
|
|
local_flush_cache_range(fd->vma, fd->addr1, fd->addr2);
|
|
|
|
}
|
|
|
|
|
|
|
|
void flush_cache_range(struct vm_area_struct *vma,
|
|
|
|
unsigned long start, unsigned long end)
|
|
|
|
{
|
|
|
|
struct flush_data fd = {
|
|
|
|
.vma = vma,
|
|
|
|
.addr1 = start,
|
|
|
|
.addr2 = end,
|
|
|
|
};
|
|
|
|
on_each_cpu(ipi_flush_cache_range, &fd, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ipi_flush_icache_range(void *arg)
|
|
|
|
{
|
|
|
|
struct flush_data *fd = arg;
|
|
|
|
local_flush_icache_range(fd->addr1, fd->addr2);
|
|
|
|
}
|
|
|
|
|
|
|
|
void flush_icache_range(unsigned long start, unsigned long end)
|
|
|
|
{
|
|
|
|
struct flush_data fd = {
|
|
|
|
.addr1 = start,
|
|
|
|
.addr2 = end,
|
|
|
|
};
|
|
|
|
on_each_cpu(ipi_flush_icache_range, &fd, 1);
|
|
|
|
}
|
2014-08-30 06:19:09 +08:00
|
|
|
EXPORT_SYMBOL(flush_icache_range);
|
2013-10-17 06:42:28 +08:00
|
|
|
|
|
|
|
/* ------------------------------------------------------------------------- */
|
|
|
|
|
|
|
|
static void ipi_invalidate_dcache_range(void *arg)
|
|
|
|
{
|
|
|
|
struct flush_data *fd = arg;
|
|
|
|
__invalidate_dcache_range(fd->addr1, fd->addr2);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void system_invalidate_dcache_range(unsigned long start,
|
|
|
|
unsigned long size)
|
|
|
|
{
|
|
|
|
struct flush_data fd = {
|
|
|
|
.addr1 = start,
|
|
|
|
.addr2 = size,
|
|
|
|
};
|
|
|
|
on_each_cpu(ipi_invalidate_dcache_range, &fd, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ipi_flush_invalidate_dcache_range(void *arg)
|
|
|
|
{
|
|
|
|
struct flush_data *fd = arg;
|
|
|
|
__flush_invalidate_dcache_range(fd->addr1, fd->addr2);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void system_flush_invalidate_dcache_range(unsigned long start,
|
|
|
|
unsigned long size)
|
|
|
|
{
|
|
|
|
struct flush_data fd = {
|
|
|
|
.addr1 = start,
|
|
|
|
.addr2 = size,
|
|
|
|
};
|
|
|
|
on_each_cpu(ipi_flush_invalidate_dcache_range, &fd, 1);
|
|
|
|
}
|