2015-08-13 15:56:36 +08:00
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/*
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* IEEE754 floating point arithmetic
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* single precision: MAX{,A}.f
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* MAX : Scalar Floating-Point Maximum
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* MAXA: Scalar Floating-Point argument with Maximum Absolute Value
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*
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* MAX.S : FPR[fd] = maxNum(FPR[fs],FPR[ft])
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* MAXA.S: FPR[fd] = maxNumMag(FPR[fs],FPR[ft])
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*
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* MIPS floating point support
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* Copyright (C) 2015 Imagination Technologies, Ltd.
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* Author: Markos Chandras <markos.chandras@imgtec.com>
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; version 2 of the License.
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*/
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#include "ieee754sp.h"
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union ieee754sp ieee754sp_fmax(union ieee754sp x, union ieee754sp y)
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{
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COMPXSP;
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COMPYSP;
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EXPLODEXSP;
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EXPLODEYSP;
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FLUSHXSP;
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FLUSHYSP;
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ieee754_clearcx();
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switch (CLPAIR(xc, yc)) {
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
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return ieee754sp_nanxcpt(y);
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
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return ieee754sp_nanxcpt(x);
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MIPS: math-emu: <MAX|MAXA|MIN|MINA>.<D|S>: Fix quiet NaN propagation
Fix the value returned by <MAX|MAXA|MIN|MINA>.<D|S> fd,fs,ft, if both
inputs are quiet NaNs. The <MAX|MAXA|MIN|MINA>.<D|S> specifications
state that the returned value in such cases should be the quiet NaN
contained in register fs.
A relevant example:
MAX.S fd,fs,ft:
If fs contains qNaN1, and ft contains qNaN2, fd is going to contain
qNaN1 (without this patch, it used to contain qNaN2).
Fixes: a79f5f9ba508 ("MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction")
Fixes: 4e9561b20e2f ("MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction")
Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
Signed-off-by: Goran Ferenc <goran.ferenc@imgtec.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cc: Bo Hu <bohu@google.com>
Cc: Douglas Leung <douglas.leung@imgtec.com>
Cc: Jin Qian <jinqian@google.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Petar Jovanovic <petar.jovanovic@imgtec.com>
Cc: Raghu Gandham <raghu.gandham@imgtec.com>
Cc: <stable@vger.kernel.org> # 4.3+
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/16880/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-07-28 00:08:48 +08:00
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/*
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* Quiet NaN handling
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*/
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/*
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* The case of both inputs quiet NaNs
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*/
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
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return x;
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/*
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* The cases of exactly one input quiet NaN (numbers
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* are here preferred as returned values to NaNs)
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*/
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2015-08-13 15:56:36 +08:00
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
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return x;
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
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return y;
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/*
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* Infinity and zero handling
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*/
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
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return xs ? y : x;
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
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return ys ? x : y;
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
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MIPS: math-emu: <MAX|MAXA|MIN|MINA>.<D|S>: Fix cases of both inputs zero
Fix the value returned by <MAX|MAXA|MIN|MINA>.<D|S>, if both inputs
are zeros. The right behavior in such cases is stated in instruction
reference manual and is as follows:
fs ft MAX MIN MAXA MINA
---------------------------------------------
0 0 0 0 0 0
0 -0 0 -0 0 -0
-0 0 0 -0 0 -0
-0 -0 -0 -0 -0 -0
Prior to this patch, some of the above cases were yielding correct
results. However, for the sake of code consistency, all such cases
are rewritten in this patch.
A relevant example:
MAX.S fd,fs,ft:
If fs contains +0.0, and ft contains -0.0, fd is going to contain
+0.0 (without this patch, it used to contain -0.0).
Fixes: a79f5f9ba508 ("MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction")
Fixes: 4e9561b20e2f ("MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction")
Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
Signed-off-by: Goran Ferenc <goran.ferenc@imgtec.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cc: Bo Hu <bohu@google.com>
Cc: Douglas Leung <douglas.leung@imgtec.com>
Cc: Jin Qian <jinqian@google.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Petar Jovanovic <petar.jovanovic@imgtec.com>
Cc: Raghu Gandham <raghu.gandham@imgtec.com>
Cc: <stable@vger.kernel.org> # 4.3+
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/16881/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-07-28 00:08:49 +08:00
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return ieee754sp_zero(xs & ys);
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2015-08-13 15:56:36 +08:00
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
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SPDNORMX;
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
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SPDNORMY;
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break;
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
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SPDNORMX;
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}
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/* Finally get to do some computation */
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assert(xm & SP_HIDDEN_BIT);
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assert(ym & SP_HIDDEN_BIT);
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/* Compare signs */
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if (xs > ys)
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return y;
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else if (xs < ys)
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return x;
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2017-07-28 00:08:50 +08:00
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/* Signs of inputs are equal, let's compare exponents */
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if (xs == 0) {
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/* Inputs are both positive */
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if (xe > ye)
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return x;
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else if (xe < ye)
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return y;
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} else {
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/* Inputs are both negative */
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if (xe > ye)
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return y;
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else if (xe < ye)
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return x;
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}
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2015-08-13 15:56:36 +08:00
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2017-07-28 00:08:50 +08:00
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/* Signs and exponents of inputs are equal, let's compare mantissas */
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if (xs == 0) {
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/* Inputs are both positive, with equal signs and exponents */
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if (xm <= ym)
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return y;
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return x;
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}
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/* Inputs are both negative, with equal signs and exponents */
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2015-08-13 15:56:36 +08:00
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if (xm <= ym)
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2017-07-28 00:08:50 +08:00
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return x;
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return y;
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2015-08-13 15:56:36 +08:00
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}
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union ieee754sp ieee754sp_fmaxa(union ieee754sp x, union ieee754sp y)
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{
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COMPXSP;
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COMPYSP;
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EXPLODEXSP;
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EXPLODEYSP;
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FLUSHXSP;
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FLUSHYSP;
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ieee754_clearcx();
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switch (CLPAIR(xc, yc)) {
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
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return ieee754sp_nanxcpt(y);
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
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return ieee754sp_nanxcpt(x);
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MIPS: math-emu: <MAX|MAXA|MIN|MINA>.<D|S>: Fix quiet NaN propagation
Fix the value returned by <MAX|MAXA|MIN|MINA>.<D|S> fd,fs,ft, if both
inputs are quiet NaNs. The <MAX|MAXA|MIN|MINA>.<D|S> specifications
state that the returned value in such cases should be the quiet NaN
contained in register fs.
A relevant example:
MAX.S fd,fs,ft:
If fs contains qNaN1, and ft contains qNaN2, fd is going to contain
qNaN1 (without this patch, it used to contain qNaN2).
Fixes: a79f5f9ba508 ("MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction")
Fixes: 4e9561b20e2f ("MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction")
Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
Signed-off-by: Goran Ferenc <goran.ferenc@imgtec.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cc: Bo Hu <bohu@google.com>
Cc: Douglas Leung <douglas.leung@imgtec.com>
Cc: Jin Qian <jinqian@google.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Petar Jovanovic <petar.jovanovic@imgtec.com>
Cc: Raghu Gandham <raghu.gandham@imgtec.com>
Cc: <stable@vger.kernel.org> # 4.3+
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/16880/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-07-28 00:08:48 +08:00
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/*
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* Quiet NaN handling
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*/
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/*
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* The case of both inputs quiet NaNs
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*/
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
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return x;
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|
|
|
|
|
/*
|
|
|
|
* The cases of exactly one input quiet NaN (numbers
|
|
|
|
* are here preferred as returned values to NaNs)
|
|
|
|
*/
|
2015-08-13 15:56:36 +08:00
|
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|
case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
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return x;
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
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return y;
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/*
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* Infinity and zero handling
|
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*/
|
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
|
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
|
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
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return x;
|
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
|
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
|
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
|
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
|
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
|
|
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
|
|
|
|
return y;
|
|
|
|
|
|
|
|
case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
|
MIPS: math-emu: <MAX|MAXA|MIN|MINA>.<D|S>: Fix cases of both inputs zero
Fix the value returned by <MAX|MAXA|MIN|MINA>.<D|S>, if both inputs
are zeros. The right behavior in such cases is stated in instruction
reference manual and is as follows:
fs ft MAX MIN MAXA MINA
---------------------------------------------
0 0 0 0 0 0
0 -0 0 -0 0 -0
-0 0 0 -0 0 -0
-0 -0 -0 -0 -0 -0
Prior to this patch, some of the above cases were yielding correct
results. However, for the sake of code consistency, all such cases
are rewritten in this patch.
A relevant example:
MAX.S fd,fs,ft:
If fs contains +0.0, and ft contains -0.0, fd is going to contain
+0.0 (without this patch, it used to contain -0.0).
Fixes: a79f5f9ba508 ("MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction")
Fixes: 4e9561b20e2f ("MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction")
Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
Signed-off-by: Goran Ferenc <goran.ferenc@imgtec.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cc: Bo Hu <bohu@google.com>
Cc: Douglas Leung <douglas.leung@imgtec.com>
Cc: Jin Qian <jinqian@google.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Petar Jovanovic <petar.jovanovic@imgtec.com>
Cc: Raghu Gandham <raghu.gandham@imgtec.com>
Cc: <stable@vger.kernel.org> # 4.3+
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/16881/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-07-28 00:08:49 +08:00
|
|
|
return ieee754sp_zero(xs & ys);
|
2015-08-13 15:56:36 +08:00
|
|
|
|
|
|
|
case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
|
|
|
|
SPDNORMX;
|
|
|
|
|
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|
|
case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
|
|
|
|
SPDNORMY;
|
|
|
|
break;
|
|
|
|
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|
|
case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
|
|
|
|
SPDNORMX;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Finally get to do some computation */
|
|
|
|
|
|
|
|
assert(xm & SP_HIDDEN_BIT);
|
|
|
|
assert(ym & SP_HIDDEN_BIT);
|
|
|
|
|
|
|
|
/* Compare exponent */
|
|
|
|
if (xe > ye)
|
|
|
|
return x;
|
|
|
|
else if (xe < ye)
|
|
|
|
return y;
|
|
|
|
|
|
|
|
/* Compare mantissa */
|
|
|
|
if (xm <= ym)
|
|
|
|
return y;
|
|
|
|
return x;
|
|
|
|
}
|