2020-02-13 23:51:54 +08:00
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// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (c) 2020 BayLibre, SAS.
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// Author: Jerome Brunet <jbrunet@baylibre.com>
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#include <linux/bitfield.h>
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/regmap.h>
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#include <linux/reset.h>
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#include <sound/soc.h>
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#include <sound/soc-dai.h>
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#include <dt-bindings/sound/meson-aiu.h>
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#include "aiu.h"
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#include "aiu-fifo.h"
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#define AIU_I2S_MISC_958_SRC_SHIFT 3
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static const char * const aiu_spdif_encode_sel_texts[] = {
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"SPDIF", "I2S",
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};
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static SOC_ENUM_SINGLE_DECL(aiu_spdif_encode_sel_enum, AIU_I2S_MISC,
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AIU_I2S_MISC_958_SRC_SHIFT,
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aiu_spdif_encode_sel_texts);
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static const struct snd_kcontrol_new aiu_spdif_encode_mux =
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SOC_DAPM_ENUM("SPDIF Buffer Src", aiu_spdif_encode_sel_enum);
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static const struct snd_soc_dapm_widget aiu_cpu_dapm_widgets[] = {
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SND_SOC_DAPM_MUX("SPDIF SRC SEL", SND_SOC_NOPM, 0, 0,
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&aiu_spdif_encode_mux),
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};
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static const struct snd_soc_dapm_route aiu_cpu_dapm_routes[] = {
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{ "I2S Encoder Playback", NULL, "I2S FIFO Playback" },
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{ "SPDIF SRC SEL", "SPDIF", "SPDIF FIFO Playback" },
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{ "SPDIF SRC SEL", "I2S", "I2S FIFO Playback" },
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{ "SPDIF Encoder Playback", NULL, "SPDIF SRC SEL" },
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};
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int aiu_of_xlate_dai_name(struct snd_soc_component *component,
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2021-02-21 23:30:24 +08:00
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const struct of_phandle_args *args,
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2020-02-13 23:51:54 +08:00
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const char **dai_name,
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unsigned int component_id)
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{
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struct snd_soc_dai *dai;
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int id;
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if (args->args_count != 2)
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return -EINVAL;
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if (args->args[0] != component_id)
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return -EINVAL;
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id = args->args[1];
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if (id < 0 || id >= component->num_dai)
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return -EINVAL;
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for_each_component_dais(component, dai) {
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if (id == 0)
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break;
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id--;
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}
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*dai_name = dai->driver->name;
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return 0;
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}
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static int aiu_cpu_of_xlate_dai_name(struct snd_soc_component *component,
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2021-02-21 23:30:24 +08:00
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const struct of_phandle_args *args,
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2020-02-13 23:51:54 +08:00
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const char **dai_name)
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{
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return aiu_of_xlate_dai_name(component, args, dai_name, AIU_CPU);
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}
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static int aiu_cpu_component_probe(struct snd_soc_component *component)
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{
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struct aiu *aiu = snd_soc_component_get_drvdata(component);
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/* Required for the SPDIF Source control operation */
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return clk_prepare_enable(aiu->i2s.clks[PCLK].clk);
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}
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static void aiu_cpu_component_remove(struct snd_soc_component *component)
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{
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struct aiu *aiu = snd_soc_component_get_drvdata(component);
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clk_disable_unprepare(aiu->i2s.clks[PCLK].clk);
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}
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static const struct snd_soc_component_driver aiu_cpu_component = {
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.name = "AIU CPU",
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.dapm_widgets = aiu_cpu_dapm_widgets,
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.num_dapm_widgets = ARRAY_SIZE(aiu_cpu_dapm_widgets),
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.dapm_routes = aiu_cpu_dapm_routes,
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.num_dapm_routes = ARRAY_SIZE(aiu_cpu_dapm_routes),
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.of_xlate_dai_name = aiu_cpu_of_xlate_dai_name,
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.pointer = aiu_fifo_pointer,
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.probe = aiu_cpu_component_probe,
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.remove = aiu_cpu_component_remove,
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2022-03-10 04:23:06 +08:00
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#ifdef CONFIG_DEBUG_FS
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.debugfs_prefix = "cpu",
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#endif
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2020-02-13 23:51:54 +08:00
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};
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static struct snd_soc_dai_driver aiu_cpu_dai_drv[] = {
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[CPU_I2S_FIFO] = {
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.name = "I2S FIFO",
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.playback = {
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.stream_name = "I2S FIFO Playback",
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.channels_min = 2,
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.channels_max = 8,
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.rates = SNDRV_PCM_RATE_CONTINUOUS,
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.rate_min = 5512,
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.rate_max = 192000,
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.formats = AIU_FORMATS,
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},
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.ops = &aiu_fifo_i2s_dai_ops,
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.pcm_new = aiu_fifo_pcm_new,
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.probe = aiu_fifo_i2s_dai_probe,
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.remove = aiu_fifo_dai_remove,
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},
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[CPU_SPDIF_FIFO] = {
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.name = "SPDIF FIFO",
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.playback = {
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.stream_name = "SPDIF FIFO Playback",
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_CONTINUOUS,
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.rate_min = 5512,
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.rate_max = 192000,
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.formats = AIU_FORMATS,
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},
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.ops = &aiu_fifo_spdif_dai_ops,
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.pcm_new = aiu_fifo_pcm_new,
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.probe = aiu_fifo_spdif_dai_probe,
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.remove = aiu_fifo_dai_remove,
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},
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[CPU_I2S_ENCODER] = {
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.name = "I2S Encoder",
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.playback = {
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.stream_name = "I2S Encoder Playback",
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.channels_min = 2,
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.channels_max = 8,
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.rates = SNDRV_PCM_RATE_8000_192000,
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.formats = AIU_FORMATS,
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},
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.ops = &aiu_encoder_i2s_dai_ops,
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},
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[CPU_SPDIF_ENCODER] = {
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.name = "SPDIF Encoder",
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.playback = {
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.stream_name = "SPDIF Encoder Playback",
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.channels_min = 2,
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.channels_max = 2,
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.rates = (SNDRV_PCM_RATE_32000 |
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SNDRV_PCM_RATE_44100 |
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SNDRV_PCM_RATE_48000 |
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SNDRV_PCM_RATE_88200 |
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SNDRV_PCM_RATE_96000 |
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SNDRV_PCM_RATE_176400 |
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SNDRV_PCM_RATE_192000),
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.formats = AIU_FORMATS,
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},
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.ops = &aiu_encoder_spdif_dai_ops,
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}
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};
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static const struct regmap_config aiu_regmap_cfg = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = 0x2ac,
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};
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static int aiu_clk_bulk_get(struct device *dev,
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const char * const *ids,
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unsigned int num,
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struct aiu_interface *interface)
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{
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struct clk_bulk_data *clks;
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int i, ret;
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2020-02-14 21:13:47 +08:00
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clks = devm_kcalloc(dev, num, sizeof(*clks), GFP_KERNEL);
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2020-02-13 23:51:54 +08:00
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if (!clks)
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return -ENOMEM;
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for (i = 0; i < num; i++)
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clks[i].id = ids[i];
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ret = devm_clk_bulk_get(dev, num, clks);
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if (ret < 0)
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return ret;
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interface->clks = clks;
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interface->clk_num = num;
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return 0;
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}
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static const char * const aiu_i2s_ids[] = {
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[PCLK] = "i2s_pclk",
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[AOCLK] = "i2s_aoclk",
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[MCLK] = "i2s_mclk",
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[MIXER] = "i2s_mixer",
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};
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static const char * const aiu_spdif_ids[] = {
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[PCLK] = "spdif_pclk",
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[AOCLK] = "spdif_aoclk",
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[MCLK] = "spdif_mclk_sel"
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};
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static int aiu_clk_get(struct device *dev)
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{
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struct aiu *aiu = dev_get_drvdata(dev);
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int ret;
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aiu->pclk = devm_clk_get(dev, "pclk");
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2021-12-14 10:08:37 +08:00
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if (IS_ERR(aiu->pclk))
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return dev_err_probe(dev, PTR_ERR(aiu->pclk), "Can't get the aiu pclk\n");
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2020-02-13 23:51:54 +08:00
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aiu->spdif_mclk = devm_clk_get(dev, "spdif_mclk");
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2021-12-14 10:08:37 +08:00
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if (IS_ERR(aiu->spdif_mclk))
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return dev_err_probe(dev, PTR_ERR(aiu->spdif_mclk),
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"Can't get the aiu spdif master clock\n");
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2020-02-13 23:51:54 +08:00
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ret = aiu_clk_bulk_get(dev, aiu_i2s_ids, ARRAY_SIZE(aiu_i2s_ids),
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&aiu->i2s);
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2021-12-14 10:08:37 +08:00
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if (ret)
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return dev_err_probe(dev, ret, "Can't get the i2s clocks\n");
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2020-02-13 23:51:54 +08:00
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ret = aiu_clk_bulk_get(dev, aiu_spdif_ids, ARRAY_SIZE(aiu_spdif_ids),
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&aiu->spdif);
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2021-12-14 10:08:37 +08:00
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if (ret)
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return dev_err_probe(dev, ret, "Can't get the spdif clocks\n");
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2020-02-13 23:51:54 +08:00
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ret = clk_prepare_enable(aiu->pclk);
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if (ret) {
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dev_err(dev, "peripheral clock enable failed\n");
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return ret;
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}
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ret = devm_add_action_or_reset(dev,
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(void(*)(void *))clk_disable_unprepare,
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aiu->pclk);
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if (ret)
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dev_err(dev, "failed to add reset action on pclk");
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return ret;
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}
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static int aiu_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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void __iomem *regs;
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struct regmap *map;
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struct aiu *aiu;
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int ret;
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aiu = devm_kzalloc(dev, sizeof(*aiu), GFP_KERNEL);
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if (!aiu)
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return -ENOMEM;
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2020-02-21 04:57:10 +08:00
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aiu->platform = device_get_match_data(dev);
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if (!aiu->platform)
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return -ENODEV;
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2020-02-13 23:51:54 +08:00
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platform_set_drvdata(pdev, aiu);
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ret = device_reset(dev);
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2021-12-14 10:08:37 +08:00
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if (ret)
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return dev_err_probe(dev, ret, "Failed to reset device\n");
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2020-02-13 23:51:54 +08:00
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regs = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(regs))
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return PTR_ERR(regs);
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map = devm_regmap_init_mmio(dev, regs, &aiu_regmap_cfg);
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if (IS_ERR(map)) {
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dev_err(dev, "failed to init regmap: %ld\n",
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PTR_ERR(map));
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return PTR_ERR(map);
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}
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aiu->i2s.irq = platform_get_irq_byname(pdev, "i2s");
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2020-02-14 21:13:48 +08:00
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if (aiu->i2s.irq < 0)
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2020-02-13 23:51:54 +08:00
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return aiu->i2s.irq;
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aiu->spdif.irq = platform_get_irq_byname(pdev, "spdif");
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2020-02-14 21:13:48 +08:00
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if (aiu->spdif.irq < 0)
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2020-02-13 23:51:54 +08:00
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return aiu->spdif.irq;
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ret = aiu_clk_get(dev);
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if (ret)
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return ret;
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/* Register the cpu component of the aiu */
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ret = snd_soc_register_component(dev, &aiu_cpu_component,
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aiu_cpu_dai_drv,
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ARRAY_SIZE(aiu_cpu_dai_drv));
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2020-02-13 23:51:55 +08:00
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if (ret) {
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2020-02-13 23:51:54 +08:00
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dev_err(dev, "Failed to register cpu component\n");
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2020-02-13 23:51:55 +08:00
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return ret;
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}
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2020-02-13 23:51:54 +08:00
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2020-02-13 23:51:55 +08:00
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/* Register the hdmi codec control component */
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ret = aiu_hdmi_ctrl_register_component(dev);
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if (ret) {
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dev_err(dev, "Failed to register hdmi control component\n");
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goto err;
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}
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2020-02-13 23:51:56 +08:00
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/* Register the internal dac control component on gxl */
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2020-02-21 04:57:10 +08:00
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if (aiu->platform->has_acodec) {
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2020-02-13 23:51:56 +08:00
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ret = aiu_acodec_ctrl_register_component(dev);
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if (ret) {
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dev_err(dev,
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"Failed to register acodec control component\n");
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goto err;
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}
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}
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2020-02-13 23:51:55 +08:00
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return 0;
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err:
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snd_soc_unregister_component(dev);
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2020-02-13 23:51:54 +08:00
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return ret;
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}
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static int aiu_remove(struct platform_device *pdev)
|
|
|
|
{
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|
|
|
snd_soc_unregister_component(&pdev->dev);
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|
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|
|
|
return 0;
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|
|
|
}
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|
|
|
|
2020-02-21 04:57:10 +08:00
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|
|
static const struct aiu_platform_data aiu_gxbb_pdata = {
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|
|
|
.has_acodec = false,
|
2020-02-21 04:57:11 +08:00
|
|
|
.has_clk_ctrl_more_i2s_div = true,
|
2020-02-21 04:57:10 +08:00
|
|
|
};
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|
|
|
|
|
|
|
static const struct aiu_platform_data aiu_gxl_pdata = {
|
|
|
|
.has_acodec = true,
|
2020-02-21 04:57:11 +08:00
|
|
|
.has_clk_ctrl_more_i2s_div = true,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct aiu_platform_data aiu_meson8_pdata = {
|
|
|
|
.has_acodec = false,
|
|
|
|
.has_clk_ctrl_more_i2s_div = false,
|
2020-02-21 04:57:10 +08:00
|
|
|
};
|
|
|
|
|
2020-02-13 23:51:54 +08:00
|
|
|
static const struct of_device_id aiu_of_match[] = {
|
2020-02-21 04:57:10 +08:00
|
|
|
{ .compatible = "amlogic,aiu-gxbb", .data = &aiu_gxbb_pdata },
|
|
|
|
{ .compatible = "amlogic,aiu-gxl", .data = &aiu_gxl_pdata },
|
2020-02-21 04:57:11 +08:00
|
|
|
{ .compatible = "amlogic,aiu-meson8", .data = &aiu_meson8_pdata },
|
|
|
|
{ .compatible = "amlogic,aiu-meson8b", .data = &aiu_meson8_pdata },
|
2020-02-13 23:51:54 +08:00
|
|
|
{}
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, aiu_of_match);
|
|
|
|
|
|
|
|
static struct platform_driver aiu_pdrv = {
|
|
|
|
.probe = aiu_probe,
|
|
|
|
.remove = aiu_remove,
|
|
|
|
.driver = {
|
|
|
|
.name = "meson-aiu",
|
|
|
|
.of_match_table = aiu_of_match,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
module_platform_driver(aiu_pdrv);
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("Meson AIU Driver");
|
|
|
|
MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
|
|
|
|
MODULE_LICENSE("GPL v2");
|