2009-12-11 17:24:15 +08:00
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/*
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* Copyright 2009 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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2012-10-03 01:01:07 +08:00
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#include <drm/drmP.h>
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Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm merge (part 1) from Dave Airlie:
"So first of all my tree and uapi stuff has a conflict mess, its my
fault as the nouveau stuff didn't hit -next as were trying to rebase
regressions out of it before we merged.
Highlights:
- SH mobile modesetting driver and associated helpers
- some DRM core documentation
- i915 modesetting rework, haswell hdmi, haswell and vlv fixes, write
combined pte writing, ilk rc6 support,
- nouveau: major driver rework into a hw core driver, makes features
like SLI a lot saner to implement,
- psb: add eDP/DP support for Cedarview
- radeon: 2 layer page tables, async VM pte updates, better PLL
selection for > 2 screens, better ACPI interactions
The rest is general grab bag of fixes.
So why part 1? well I have the exynos pull req which came in a bit
late but was waiting for me to do something they shouldn't have and it
looks fairly safe, and David Howells has some more header cleanups
he'd like me to pull, that seem like a good idea, but I'd like to get
this merge out of the way so -next dosen't get blocked."
Tons of conflicts mostly due to silly include line changes, but mostly
mindless. A few other small semantic conflicts too, noted from Dave's
pre-merged branch.
* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (447 commits)
drm/nv98/crypt: fix fuc build with latest envyas
drm/nouveau/devinit: fixup various issues with subdev ctor/init ordering
drm/nv41/vm: fix and enable use of "real" pciegart
drm/nv44/vm: fix and enable use of "real" pciegart
drm/nv04/dmaobj: fixup vm target handling in preparation for nv4x pcie
drm/nouveau: store supported dma mask in vmmgr
drm/nvc0/ibus: initial implementation of subdev
drm/nouveau/therm: add support for fan-control modes
drm/nouveau/hwmon: rename pwm0* to pmw1* to follow hwmon's rules
drm/nouveau/therm: calculate the pwm divisor on nv50+
drm/nouveau/fan: rewrite the fan tachometer driver to get more precision, faster
drm/nouveau/therm: move thermal-related functions to the therm subdev
drm/nouveau/bios: parse the pwm divisor from the perf table
drm/nouveau/therm: use the EXTDEV table to detect i2c monitoring devices
drm/nouveau/therm: rework thermal table parsing
drm/nouveau/gpio: expose the PWM/TOGGLE parameter found in the gpio vbios table
drm/nouveau: fix pm initialization order
drm/nouveau/bios: check that fixed tvdac gpio data is valid before using it
drm/nouveau: log channel debug/error messages from client object rather than drm client
drm/nouveau: have drm debugging macros build on top of core macros
...
2012-10-04 14:29:23 +08:00
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#include <drm/drm_dp_helper.h>
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2010-07-23 09:39:03 +08:00
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2012-07-31 14:16:21 +08:00
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#include "nouveau_drm.h"
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2010-07-23 09:39:03 +08:00
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#include "nouveau_connector.h"
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2009-12-11 17:24:15 +08:00
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#include "nouveau_encoder.h"
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2011-08-04 07:26:44 +08:00
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#include "nouveau_crtc.h"
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2009-12-11 17:24:15 +08:00
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2012-07-31 14:16:21 +08:00
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#include <subdev/gpio.h>
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#include <subdev/i2c.h>
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2011-07-20 13:50:14 +08:00
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2011-08-05 12:07:04 +08:00
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u8 *
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2012-07-11 08:44:20 +08:00
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nouveau_dp_bios_data(struct drm_device *dev, struct dcb_output *dcb, u8 **entry)
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2011-08-05 12:07:04 +08:00
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{
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2012-07-31 14:16:21 +08:00
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struct nouveau_drm *drm = nouveau_drm(dev);
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2011-08-05 12:07:04 +08:00
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struct bit_entry d;
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u8 *table;
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int i;
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if (bit_table(dev, 'd', &d)) {
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2012-07-31 14:16:21 +08:00
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NV_ERROR(drm, "BIT 'd' table not found\n");
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2011-08-05 12:07:04 +08:00
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return NULL;
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}
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if (d.version != 1) {
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2012-07-31 14:16:21 +08:00
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NV_ERROR(drm, "BIT 'd' table version %d unknown\n", d.version);
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2011-08-05 12:07:04 +08:00
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return NULL;
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}
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2011-10-12 14:48:48 +08:00
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table = ROMPTR(dev, d.data[0]);
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2011-08-05 12:07:04 +08:00
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if (!table) {
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2012-07-31 14:16:21 +08:00
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NV_ERROR(drm, "displayport table pointer invalid\n");
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2011-08-05 12:07:04 +08:00
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return NULL;
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}
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switch (table[0]) {
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case 0x20:
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case 0x21:
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2011-08-05 12:47:28 +08:00
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case 0x30:
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2012-03-11 14:08:05 +08:00
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case 0x40:
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2011-08-05 12:07:04 +08:00
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break;
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default:
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2012-07-31 14:16:21 +08:00
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NV_ERROR(drm, "displayport table 0x%02x unknown\n", table[0]);
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2011-08-05 12:07:04 +08:00
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return NULL;
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}
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for (i = 0; i < table[3]; i++) {
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2011-10-12 14:48:48 +08:00
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*entry = ROMPTR(dev, table[table[1] + (i * table[2])]);
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2011-08-05 12:07:04 +08:00
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if (*entry && bios_encoder_match(dcb, ROM32((*entry)[0])))
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return table;
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}
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2012-07-31 14:16:21 +08:00
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NV_ERROR(drm, "displayport encoder table not found\n");
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2011-08-05 12:07:04 +08:00
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return NULL;
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}
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2011-08-04 07:26:44 +08:00
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/******************************************************************************
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* link training
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*****************************************************************************/
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struct dp_state {
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2012-07-10 12:36:38 +08:00
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struct nouveau_i2c_port *auxch;
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2012-03-09 14:22:56 +08:00
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struct dp_train_func *func;
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2012-07-11 08:44:20 +08:00
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struct dcb_output *dcb;
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2011-08-04 07:26:44 +08:00
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int crtc;
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2011-08-04 12:31:28 +08:00
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u8 *dpcd;
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2011-08-04 07:26:44 +08:00
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int link_nr;
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u32 link_bw;
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u8 stat[6];
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u8 conf[4];
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};
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2009-12-11 17:24:15 +08:00
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2011-08-04 07:26:44 +08:00
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static void
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dp_set_link_config(struct drm_device *dev, struct dp_state *dp)
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2009-12-11 17:24:15 +08:00
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{
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2012-07-31 14:16:21 +08:00
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struct nouveau_drm *drm = nouveau_drm(dev);
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2012-03-09 14:22:56 +08:00
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u8 sink[2];
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2009-12-11 17:24:15 +08:00
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2012-07-31 14:16:21 +08:00
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NV_DEBUG(drm, "%d lanes at %d KB/s\n", dp->link_nr, dp->link_bw);
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2009-12-11 17:24:15 +08:00
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2012-03-09 14:22:56 +08:00
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/* set desired link configuration on the source */
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dp->func->link_set(dev, dp->dcb, dp->crtc, dp->link_nr, dp->link_bw,
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dp->dpcd[2] & DP_ENHANCED_FRAME_CAP);
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2011-08-04 12:16:45 +08:00
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2012-03-09 14:22:56 +08:00
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/* inform the sink of the new configuration */
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sink[0] = dp->link_bw / 27000;
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2011-08-04 07:26:44 +08:00
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sink[1] = dp->link_nr;
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2012-03-09 14:22:56 +08:00
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if (dp->dpcd[2] & DP_ENHANCED_FRAME_CAP)
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2011-08-04 07:26:44 +08:00
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sink[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
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2009-12-11 17:24:15 +08:00
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2012-07-31 14:16:21 +08:00
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nv_wraux(dp->auxch, DP_LINK_BW_SET, sink, 2);
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2009-12-11 17:24:15 +08:00
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}
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2011-08-04 07:26:44 +08:00
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static void
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2012-03-09 14:22:56 +08:00
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dp_set_training_pattern(struct drm_device *dev, struct dp_state *dp, u8 pattern)
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2009-12-11 17:24:15 +08:00
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{
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2012-07-31 14:16:21 +08:00
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struct nouveau_drm *drm = nouveau_drm(dev);
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2011-08-05 13:56:53 +08:00
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u8 sink_tp;
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2012-07-31 14:16:21 +08:00
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NV_DEBUG(drm, "training pattern %d\n", pattern);
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2011-08-05 13:56:53 +08:00
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2012-03-09 14:22:56 +08:00
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dp->func->train_set(dev, dp->dcb, pattern);
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2011-08-05 13:56:53 +08:00
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2012-07-31 14:16:21 +08:00
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nv_rdaux(dp->auxch, DP_TRAINING_PATTERN_SET, &sink_tp, 1);
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2011-08-05 13:56:53 +08:00
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sink_tp &= ~DP_TRAINING_PATTERN_MASK;
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2012-03-09 14:22:56 +08:00
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sink_tp |= pattern;
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2012-07-31 14:16:21 +08:00
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nv_wraux(dp->auxch, DP_TRAINING_PATTERN_SET, &sink_tp, 1);
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2009-12-11 17:24:15 +08:00
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}
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static int
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2011-08-04 07:26:44 +08:00
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dp_link_train_commit(struct drm_device *dev, struct dp_state *dp)
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2009-12-11 17:24:15 +08:00
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{
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2012-07-31 14:16:21 +08:00
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struct nouveau_drm *drm = nouveau_drm(dev);
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2011-08-04 07:26:44 +08:00
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int i;
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for (i = 0; i < dp->link_nr; i++) {
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2011-08-05 12:47:28 +08:00
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u8 lane = (dp->stat[4 + (i >> 1)] >> ((i & 1) * 4)) & 0xf;
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u8 lpre = (lane & 0x0c) >> 2;
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u8 lvsw = (lane & 0x03) >> 0;
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2009-12-11 17:24:15 +08:00
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2011-08-05 12:47:28 +08:00
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dp->conf[i] = (lpre << 3) | lvsw;
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if (lvsw == DP_TRAIN_VOLTAGE_SWING_1200)
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2011-08-04 07:26:44 +08:00
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dp->conf[i] |= DP_TRAIN_MAX_SWING_REACHED;
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2012-02-04 00:13:55 +08:00
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if ((lpre << 3) == DP_TRAIN_PRE_EMPHASIS_9_5)
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2011-08-04 07:26:44 +08:00
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dp->conf[i] |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
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2009-12-11 17:24:15 +08:00
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2012-07-31 14:16:21 +08:00
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NV_DEBUG(drm, "config lane %d %02x\n", i, dp->conf[i]);
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2012-03-09 14:22:56 +08:00
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dp->func->train_adj(dev, dp->dcb, i, lvsw, lpre);
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2009-12-11 17:24:15 +08:00
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}
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2012-07-31 14:16:21 +08:00
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return nv_wraux(dp->auxch, DP_TRAINING_LANE0_SET, dp->conf, 4);
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2009-12-11 17:24:15 +08:00
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}
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2011-08-04 07:26:44 +08:00
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static int
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dp_link_train_update(struct drm_device *dev, struct dp_state *dp, u32 delay)
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2009-12-11 17:24:15 +08:00
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{
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2012-07-31 14:16:21 +08:00
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struct nouveau_drm *drm = nouveau_drm(dev);
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2011-08-04 07:26:44 +08:00
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int ret;
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2009-12-11 17:24:15 +08:00
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2011-08-04 07:26:44 +08:00
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udelay(delay);
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2009-12-11 17:24:15 +08:00
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2012-07-31 14:16:21 +08:00
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ret = nv_rdaux(dp->auxch, DP_LANE0_1_STATUS, dp->stat, 6);
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2009-12-11 17:24:15 +08:00
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if (ret)
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2011-08-04 07:26:44 +08:00
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return ret;
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2009-12-11 17:24:15 +08:00
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2012-10-03 11:26:15 +08:00
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NV_DEBUG(drm, "status %*ph\n", 6, dp->stat);
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2011-08-04 07:26:44 +08:00
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return 0;
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}
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2009-12-11 17:24:15 +08:00
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2011-08-04 07:26:44 +08:00
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static int
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dp_link_train_cr(struct drm_device *dev, struct dp_state *dp)
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{
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bool cr_done = false, abort = false;
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int voltage = dp->conf[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
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int tries = 0, i;
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2009-12-11 17:24:15 +08:00
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2011-08-04 07:26:44 +08:00
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dp_set_training_pattern(dev, dp, DP_TRAINING_PATTERN_1);
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2009-12-11 17:24:15 +08:00
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2011-08-04 07:26:44 +08:00
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do {
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if (dp_link_train_commit(dev, dp) ||
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dp_link_train_update(dev, dp, 100))
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break;
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2009-12-11 17:24:15 +08:00
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2011-08-04 07:26:44 +08:00
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cr_done = true;
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for (i = 0; i < dp->link_nr; i++) {
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u8 lane = (dp->stat[i >> 1] >> ((i & 1) * 4)) & 0xf;
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if (!(lane & DP_LANE_CR_DONE)) {
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cr_done = false;
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if (dp->conf[i] & DP_TRAIN_MAX_SWING_REACHED)
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abort = true;
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break;
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}
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}
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2009-12-11 17:24:15 +08:00
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2011-08-04 07:26:44 +08:00
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if ((dp->conf[0] & DP_TRAIN_VOLTAGE_SWING_MASK) != voltage) {
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voltage = dp->conf[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
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tries = 0;
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}
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} while (!cr_done && !abort && ++tries < 5);
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2009-12-11 17:24:15 +08:00
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2011-08-04 07:26:44 +08:00
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return cr_done ? 0 : -1;
|
2009-12-11 17:24:15 +08:00
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|
}
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|
2011-08-04 07:26:44 +08:00
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static int
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dp_link_train_eq(struct drm_device *dev, struct dp_state *dp)
|
2009-12-11 17:24:15 +08:00
|
|
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{
|
2011-08-04 07:26:44 +08:00
|
|
|
bool eq_done, cr_done = true;
|
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int tries = 0, i;
|
2009-12-11 17:24:15 +08:00
|
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|
2011-08-04 07:26:44 +08:00
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dp_set_training_pattern(dev, dp, DP_TRAINING_PATTERN_2);
|
2009-12-11 17:24:15 +08:00
|
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|
2011-08-04 07:26:44 +08:00
|
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do {
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|
|
|
if (dp_link_train_update(dev, dp, 400))
|
2009-12-11 17:24:15 +08:00
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|
|
break;
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|
2011-08-04 07:26:44 +08:00
|
|
|
eq_done = !!(dp->stat[2] & DP_INTERLANE_ALIGN_DONE);
|
|
|
|
for (i = 0; i < dp->link_nr && eq_done; i++) {
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|
|
|
u8 lane = (dp->stat[i >> 1] >> ((i & 1) * 4)) & 0xf;
|
|
|
|
if (!(lane & DP_LANE_CR_DONE))
|
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|
|
cr_done = false;
|
|
|
|
if (!(lane & DP_LANE_CHANNEL_EQ_DONE) ||
|
|
|
|
!(lane & DP_LANE_SYMBOL_LOCKED))
|
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|
|
eq_done = false;
|
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|
|
}
|
2009-12-11 17:24:15 +08:00
|
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|
2011-08-04 07:26:44 +08:00
|
|
|
if (dp_link_train_commit(dev, dp))
|
|
|
|
break;
|
|
|
|
} while (!eq_done && cr_done && ++tries <= 5);
|
|
|
|
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|
|
return eq_done ? 0 : -1;
|
2009-12-11 17:24:15 +08:00
|
|
|
}
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|
|
2012-03-09 13:22:19 +08:00
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static void
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|
|
|
dp_set_downspread(struct drm_device *dev, struct dp_state *dp, bool enable)
|
|
|
|
{
|
|
|
|
u16 script = 0x0000;
|
|
|
|
u8 *entry, *table = nouveau_dp_bios_data(dev, dp->dcb, &entry);
|
|
|
|
if (table) {
|
|
|
|
if (table[0] >= 0x20 && table[0] <= 0x30) {
|
2012-03-10 23:28:48 +08:00
|
|
|
if (enable) script = ROM16(entry[12]);
|
|
|
|
else script = ROM16(entry[14]);
|
2012-03-11 14:08:05 +08:00
|
|
|
} else
|
|
|
|
if (table[0] == 0x40) {
|
|
|
|
if (enable) script = ROM16(entry[11]);
|
|
|
|
else script = ROM16(entry[13]);
|
2012-03-09 13:22:19 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
nouveau_bios_run_init_table(dev, script, dp->dcb, dp->crtc);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
dp_link_train_init(struct drm_device *dev, struct dp_state *dp)
|
|
|
|
{
|
|
|
|
u16 script = 0x0000;
|
|
|
|
u8 *entry, *table = nouveau_dp_bios_data(dev, dp->dcb, &entry);
|
|
|
|
if (table) {
|
|
|
|
if (table[0] >= 0x20 && table[0] <= 0x30)
|
|
|
|
script = ROM16(entry[6]);
|
2012-03-11 14:08:05 +08:00
|
|
|
else
|
|
|
|
if (table[0] == 0x40)
|
|
|
|
script = ROM16(entry[5]);
|
2012-03-09 13:22:19 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
nouveau_bios_run_init_table(dev, script, dp->dcb, dp->crtc);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
dp_link_train_fini(struct drm_device *dev, struct dp_state *dp)
|
|
|
|
{
|
|
|
|
u16 script = 0x0000;
|
|
|
|
u8 *entry, *table = nouveau_dp_bios_data(dev, dp->dcb, &entry);
|
|
|
|
if (table) {
|
|
|
|
if (table[0] >= 0x20 && table[0] <= 0x30)
|
|
|
|
script = ROM16(entry[8]);
|
2012-03-11 14:08:05 +08:00
|
|
|
else
|
|
|
|
if (table[0] == 0x40)
|
|
|
|
script = ROM16(entry[7]);
|
2012-03-09 13:22:19 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
nouveau_bios_run_init_table(dev, script, dp->dcb, dp->crtc);
|
|
|
|
}
|
|
|
|
|
2012-08-20 05:00:00 +08:00
|
|
|
static bool
|
2012-03-09 14:22:56 +08:00
|
|
|
nouveau_dp_link_train(struct drm_encoder *encoder, u32 datarate,
|
|
|
|
struct dp_train_func *func)
|
2009-12-11 17:24:15 +08:00
|
|
|
{
|
|
|
|
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
|
2011-08-04 07:26:44 +08:00
|
|
|
struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
|
|
|
|
struct nouveau_connector *nv_connector =
|
|
|
|
nouveau_encoder_connector_get(nv_encoder);
|
|
|
|
struct drm_device *dev = encoder->dev;
|
2012-07-31 14:16:21 +08:00
|
|
|
struct nouveau_drm *drm = nouveau_drm(dev);
|
|
|
|
struct nouveau_i2c *i2c = nouveau_i2c(drm->device);
|
|
|
|
struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
|
2011-08-04 07:26:44 +08:00
|
|
|
const u32 bw_list[] = { 270000, 162000, 0 };
|
|
|
|
const u32 *link_bw = bw_list;
|
|
|
|
struct dp_state dp;
|
2009-12-11 17:24:15 +08:00
|
|
|
|
2012-07-31 14:16:21 +08:00
|
|
|
dp.auxch = i2c->find(i2c, nv_encoder->dcb->i2c_index);
|
2012-07-10 12:36:38 +08:00
|
|
|
if (!dp.auxch)
|
2009-12-11 17:24:15 +08:00
|
|
|
return false;
|
|
|
|
|
2012-03-09 14:22:56 +08:00
|
|
|
dp.func = func;
|
2011-08-04 07:26:44 +08:00
|
|
|
dp.dcb = nv_encoder->dcb;
|
|
|
|
dp.crtc = nv_crtc->index;
|
2011-08-04 12:31:28 +08:00
|
|
|
dp.dpcd = nv_encoder->dp.dpcd;
|
2009-12-11 17:24:15 +08:00
|
|
|
|
2012-03-12 09:16:55 +08:00
|
|
|
/* adjust required bandwidth for 8B/10B coding overhead */
|
|
|
|
datarate = (datarate / 8) * 10;
|
|
|
|
|
2011-08-04 07:26:44 +08:00
|
|
|
/* some sinks toggle hotplug in response to some of the actions
|
|
|
|
* we take during link training (DP_SET_POWER is one), we need
|
|
|
|
* to ignore them for the moment to avoid races.
|
|
|
|
*/
|
2012-07-31 14:16:21 +08:00
|
|
|
gpio->irq(gpio, 0, nv_connector->hpd, 0xff, false);
|
2009-12-11 17:24:15 +08:00
|
|
|
|
2011-08-04 12:31:28 +08:00
|
|
|
/* enable down-spreading, if possible */
|
2012-03-09 13:22:19 +08:00
|
|
|
dp_set_downspread(dev, &dp, nv_encoder->dp.dpcd[3] & 1);
|
2011-08-04 12:31:28 +08:00
|
|
|
|
2011-08-04 07:26:44 +08:00
|
|
|
/* execute pre-train script from vbios */
|
2012-03-09 13:22:19 +08:00
|
|
|
dp_link_train_init(dev, &dp);
|
2009-12-11 17:24:15 +08:00
|
|
|
|
2011-08-04 07:26:44 +08:00
|
|
|
/* start off at highest link rate supported by encoder and display */
|
2011-08-04 07:55:44 +08:00
|
|
|
while (*link_bw > nv_encoder->dp.link_bw)
|
2011-08-04 07:26:44 +08:00
|
|
|
link_bw++;
|
2009-12-11 17:24:15 +08:00
|
|
|
|
2011-08-04 07:26:44 +08:00
|
|
|
while (link_bw[0]) {
|
|
|
|
/* find minimum required lane count at this link rate */
|
|
|
|
dp.link_nr = nv_encoder->dp.link_nr;
|
|
|
|
while ((dp.link_nr >> 1) * link_bw[0] > datarate)
|
|
|
|
dp.link_nr >>= 1;
|
2009-12-11 17:24:15 +08:00
|
|
|
|
2011-08-04 07:26:44 +08:00
|
|
|
/* drop link rate to minimum with this lane count */
|
|
|
|
while ((link_bw[1] * dp.link_nr) > datarate)
|
|
|
|
link_bw++;
|
|
|
|
dp.link_bw = link_bw[0];
|
2009-12-11 17:24:15 +08:00
|
|
|
|
2011-08-04 07:26:44 +08:00
|
|
|
/* program selected link configuration */
|
|
|
|
dp_set_link_config(dev, &dp);
|
2009-12-11 17:24:15 +08:00
|
|
|
|
2011-08-04 07:26:44 +08:00
|
|
|
/* attempt to train the link at this configuration */
|
|
|
|
memset(dp.stat, 0x00, sizeof(dp.stat));
|
|
|
|
if (!dp_link_train_cr(dev, &dp) &&
|
|
|
|
!dp_link_train_eq(dev, &dp))
|
2009-12-11 17:24:15 +08:00
|
|
|
break;
|
|
|
|
|
2011-08-04 07:26:44 +08:00
|
|
|
/* retry at lower rate */
|
|
|
|
link_bw++;
|
2009-12-11 17:24:15 +08:00
|
|
|
}
|
|
|
|
|
2011-08-04 07:26:44 +08:00
|
|
|
/* finish link training */
|
|
|
|
dp_set_training_pattern(dev, &dp, DP_TRAINING_PATTERN_DISABLE);
|
2009-12-11 17:24:15 +08:00
|
|
|
|
2011-08-04 07:26:44 +08:00
|
|
|
/* execute post-train script from vbios */
|
2012-03-09 13:22:19 +08:00
|
|
|
dp_link_train_fini(dev, &dp);
|
2010-07-06 09:00:42 +08:00
|
|
|
|
2010-07-23 09:39:03 +08:00
|
|
|
/* re-enable hotplug detect */
|
2012-07-31 14:16:21 +08:00
|
|
|
gpio->irq(gpio, 0, nv_connector->hpd, 0xff, true);
|
2011-08-04 07:26:44 +08:00
|
|
|
return true;
|
2009-12-11 17:24:15 +08:00
|
|
|
}
|
|
|
|
|
2012-03-10 23:20:54 +08:00
|
|
|
void
|
|
|
|
nouveau_dp_dpms(struct drm_encoder *encoder, int mode, u32 datarate,
|
|
|
|
struct dp_train_func *func)
|
|
|
|
{
|
|
|
|
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
|
2012-07-31 14:16:21 +08:00
|
|
|
struct nouveau_drm *drm = nouveau_drm(encoder->dev);
|
|
|
|
struct nouveau_i2c *i2c = nouveau_i2c(drm->device);
|
2012-07-10 12:36:38 +08:00
|
|
|
struct nouveau_i2c_port *auxch;
|
2012-03-10 23:20:54 +08:00
|
|
|
u8 status;
|
|
|
|
|
2012-07-31 14:16:21 +08:00
|
|
|
auxch = i2c->find(i2c, nv_encoder->dcb->i2c_index);
|
2012-03-10 23:20:54 +08:00
|
|
|
if (!auxch)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (mode == DRM_MODE_DPMS_ON)
|
|
|
|
status = DP_SET_POWER_D0;
|
|
|
|
else
|
|
|
|
status = DP_SET_POWER_D3;
|
|
|
|
|
2012-07-31 14:16:21 +08:00
|
|
|
nv_wraux(auxch, DP_SET_POWER, &status, 1);
|
2012-03-10 23:20:54 +08:00
|
|
|
|
|
|
|
if (mode == DRM_MODE_DPMS_ON)
|
|
|
|
nouveau_dp_link_train(encoder, datarate, func);
|
|
|
|
}
|
|
|
|
|
2012-05-15 04:05:49 +08:00
|
|
|
static void
|
2012-07-10 12:36:38 +08:00
|
|
|
nouveau_dp_probe_oui(struct drm_device *dev, struct nouveau_i2c_port *auxch,
|
2012-05-15 04:05:49 +08:00
|
|
|
u8 *dpcd)
|
|
|
|
{
|
2012-07-31 14:16:21 +08:00
|
|
|
struct nouveau_drm *drm = nouveau_drm(dev);
|
2012-05-15 04:05:49 +08:00
|
|
|
u8 buf[3];
|
|
|
|
|
|
|
|
if (!(dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT))
|
|
|
|
return;
|
|
|
|
|
2012-07-31 14:16:21 +08:00
|
|
|
if (!nv_rdaux(auxch, DP_SINK_OUI, buf, 3))
|
|
|
|
NV_DEBUG(drm, "Sink OUI: %02hx%02hx%02hx\n",
|
2012-05-15 04:05:49 +08:00
|
|
|
buf[0], buf[1], buf[2]);
|
|
|
|
|
2012-07-31 14:16:21 +08:00
|
|
|
if (!nv_rdaux(auxch, DP_BRANCH_OUI, buf, 3))
|
|
|
|
NV_DEBUG(drm, "Branch OUI: %02hx%02hx%02hx\n",
|
2012-05-15 04:05:49 +08:00
|
|
|
buf[0], buf[1], buf[2]);
|
|
|
|
|
|
|
|
}
|
|
|
|
|
2009-12-11 17:24:15 +08:00
|
|
|
bool
|
|
|
|
nouveau_dp_detect(struct drm_encoder *encoder)
|
|
|
|
{
|
|
|
|
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
|
|
|
|
struct drm_device *dev = encoder->dev;
|
2012-07-31 14:16:21 +08:00
|
|
|
struct nouveau_drm *drm = nouveau_drm(dev);
|
|
|
|
struct nouveau_i2c *i2c = nouveau_i2c(drm->device);
|
2012-07-10 12:36:38 +08:00
|
|
|
struct nouveau_i2c_port *auxch;
|
2011-08-04 12:31:28 +08:00
|
|
|
u8 *dpcd = nv_encoder->dp.dpcd;
|
2009-12-11 17:24:15 +08:00
|
|
|
int ret;
|
|
|
|
|
2012-07-31 14:16:21 +08:00
|
|
|
auxch = i2c->find(i2c, nv_encoder->dcb->i2c_index);
|
2011-08-04 12:31:28 +08:00
|
|
|
if (!auxch)
|
|
|
|
return false;
|
|
|
|
|
2012-07-31 14:16:21 +08:00
|
|
|
ret = nv_rdaux(auxch, DP_DPCD_REV, dpcd, 8);
|
2009-12-11 17:24:15 +08:00
|
|
|
if (ret)
|
|
|
|
return false;
|
|
|
|
|
2011-08-04 07:55:44 +08:00
|
|
|
nv_encoder->dp.link_bw = 27000 * dpcd[1];
|
|
|
|
nv_encoder->dp.link_nr = dpcd[2] & DP_MAX_LANE_COUNT_MASK;
|
2009-12-11 17:24:15 +08:00
|
|
|
|
2012-07-31 14:16:21 +08:00
|
|
|
NV_DEBUG(drm, "display: %dx%d dpcd 0x%02x\n",
|
2011-08-04 07:55:44 +08:00
|
|
|
nv_encoder->dp.link_nr, nv_encoder->dp.link_bw, dpcd[0]);
|
2012-07-31 14:16:21 +08:00
|
|
|
NV_DEBUG(drm, "encoder: %dx%d\n",
|
2011-08-04 07:55:44 +08:00
|
|
|
nv_encoder->dcb->dpconf.link_nr,
|
|
|
|
nv_encoder->dcb->dpconf.link_bw);
|
2009-12-11 17:24:15 +08:00
|
|
|
|
2011-08-04 07:55:44 +08:00
|
|
|
if (nv_encoder->dcb->dpconf.link_nr < nv_encoder->dp.link_nr)
|
2009-12-11 17:24:15 +08:00
|
|
|
nv_encoder->dp.link_nr = nv_encoder->dcb->dpconf.link_nr;
|
2011-08-04 07:55:44 +08:00
|
|
|
if (nv_encoder->dcb->dpconf.link_bw < nv_encoder->dp.link_bw)
|
|
|
|
nv_encoder->dp.link_bw = nv_encoder->dcb->dpconf.link_bw;
|
2009-12-11 17:24:15 +08:00
|
|
|
|
2012-07-31 14:16:21 +08:00
|
|
|
NV_DEBUG(drm, "maximum: %dx%d\n",
|
2011-08-04 07:55:44 +08:00
|
|
|
nv_encoder->dp.link_nr, nv_encoder->dp.link_bw);
|
2010-09-27 06:29:33 +08:00
|
|
|
|
2012-05-15 04:05:49 +08:00
|
|
|
nouveau_dp_probe_oui(dev, auxch, dpcd);
|
|
|
|
|
2009-12-11 17:24:15 +08:00
|
|
|
return true;
|
|
|
|
}
|