2013-02-04 20:14:48 +08:00
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/*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* EXYNOS - PPMU support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/io.h>
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#include "exynos_ppmu.h"
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void exynos_ppmu_reset(void __iomem *ppmu_base)
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{
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__raw_writel(PPMU_CYCLE_RESET | PPMU_COUNTER_RESET, ppmu_base);
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__raw_writel(PPMU_ENABLE_CYCLE |
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PPMU_ENABLE_COUNT0 |
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PPMU_ENABLE_COUNT1 |
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PPMU_ENABLE_COUNT2 |
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PPMU_ENABLE_COUNT3,
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ppmu_base + PPMU_CNTENS);
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}
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void exynos_ppmu_setevent(void __iomem *ppmu_base, unsigned int ch,
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unsigned int evt)
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{
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__raw_writel(evt, ppmu_base + PPMU_BEVTSEL(ch));
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}
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void exynos_ppmu_start(void __iomem *ppmu_base)
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{
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__raw_writel(PPMU_ENABLE, ppmu_base);
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}
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void exynos_ppmu_stop(void __iomem *ppmu_base)
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{
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__raw_writel(PPMU_DISABLE, ppmu_base);
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}
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unsigned int exynos_ppmu_read(void __iomem *ppmu_base, unsigned int ch)
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{
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unsigned int total;
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if (ch == PPMU_PMNCNT3)
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total = ((__raw_readl(ppmu_base + PMCNT_OFFSET(ch)) << 8) |
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__raw_readl(ppmu_base + PMCNT_OFFSET(ch + 1)));
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else
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total = __raw_readl(ppmu_base + PMCNT_OFFSET(ch));
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return total;
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}
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2014-03-22 01:31:46 +08:00
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void busfreq_mon_reset(struct busfreq_ppmu_data *ppmu_data)
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{
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unsigned int i;
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for (i = 0; i < ppmu_data->ppmu_end; i++) {
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void __iomem *ppmu_base = ppmu_data->ppmu[i].hw_base;
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/* Reset the performance and cycle counters */
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exynos_ppmu_reset(ppmu_base);
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/* Setup count registers to monitor read/write transactions */
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ppmu_data->ppmu[i].event[PPMU_PMNCNT3] = RDWR_DATA_COUNT;
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exynos_ppmu_setevent(ppmu_base, PPMU_PMNCNT3,
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ppmu_data->ppmu[i].event[PPMU_PMNCNT3]);
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exynos_ppmu_start(ppmu_base);
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}
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}
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2014-07-18 22:09:54 +08:00
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EXPORT_SYMBOL(busfreq_mon_reset);
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2014-03-22 01:31:46 +08:00
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void exynos_read_ppmu(struct busfreq_ppmu_data *ppmu_data)
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{
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int i, j;
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for (i = 0; i < ppmu_data->ppmu_end; i++) {
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void __iomem *ppmu_base = ppmu_data->ppmu[i].hw_base;
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exynos_ppmu_stop(ppmu_base);
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/* Update local data from PPMU */
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ppmu_data->ppmu[i].ccnt = __raw_readl(ppmu_base + PPMU_CCNT);
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for (j = PPMU_PMNCNT0; j < PPMU_PMNCNT_MAX; j++) {
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if (ppmu_data->ppmu[i].event[j] == 0)
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ppmu_data->ppmu[i].count[j] = 0;
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else
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ppmu_data->ppmu[i].count[j] =
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exynos_ppmu_read(ppmu_base, j);
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}
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}
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busfreq_mon_reset(ppmu_data);
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}
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2014-07-18 22:09:54 +08:00
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EXPORT_SYMBOL(exynos_read_ppmu);
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2014-03-22 01:31:46 +08:00
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int exynos_get_busier_ppmu(struct busfreq_ppmu_data *ppmu_data)
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{
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unsigned int count = 0;
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int i, j, busy = 0;
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for (i = 0; i < ppmu_data->ppmu_end; i++) {
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for (j = PPMU_PMNCNT0; j < PPMU_PMNCNT_MAX; j++) {
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if (ppmu_data->ppmu[i].count[j] > count) {
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count = ppmu_data->ppmu[i].count[j];
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busy = i;
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}
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}
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}
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return busy;
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}
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2014-07-18 22:09:54 +08:00
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EXPORT_SYMBOL(exynos_get_busier_ppmu);
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