drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/spinlock.h>
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#include <linux/shmem_fs.h>
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2013-09-28 23:28:35 +08:00
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#include <linux/dma-buf.h>
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2016-01-16 08:56:40 +08:00
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#include <linux/pfn_t.h>
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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#include "msm_drv.h"
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2016-03-16 03:35:08 +08:00
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#include "msm_fence.h"
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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#include "msm_gem.h"
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2013-07-20 00:59:32 +08:00
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#include "msm_gpu.h"
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2013-11-17 01:56:06 +08:00
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#include "msm_mmu.h"
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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2017-06-14 06:52:54 +08:00
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static void msm_gem_vunmap_locked(struct drm_gem_object *obj);
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2013-11-17 01:56:06 +08:00
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static dma_addr_t physaddr(struct drm_gem_object *obj)
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{
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struct msm_gem_object *msm_obj = to_msm_bo(obj);
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struct msm_drm_private *priv = obj->dev->dev_private;
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return (((dma_addr_t)msm_obj->vram_node->start) << PAGE_SHIFT) +
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priv->vram.paddr;
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}
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2015-03-04 04:04:25 +08:00
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static bool use_pages(struct drm_gem_object *obj)
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{
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struct msm_gem_object *msm_obj = to_msm_bo(obj);
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return !msm_obj->vram_node;
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}
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2013-11-17 01:56:06 +08:00
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/* allocate pages from VRAM carveout, used when no IOMMU: */
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2017-06-14 06:52:54 +08:00
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static struct page **get_pages_vram(struct drm_gem_object *obj, int npages)
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2013-11-17 01:56:06 +08:00
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{
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struct msm_gem_object *msm_obj = to_msm_bo(obj);
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struct msm_drm_private *priv = obj->dev->dev_private;
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dma_addr_t paddr;
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struct page **p;
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int ret, i;
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2017-05-17 20:23:12 +08:00
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p = kvmalloc_array(npages, sizeof(struct page *), GFP_KERNEL);
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2013-11-17 01:56:06 +08:00
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if (!p)
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return ERR_PTR(-ENOMEM);
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2017-06-14 06:52:54 +08:00
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spin_lock(&priv->vram.lock);
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2017-02-03 05:04:38 +08:00
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ret = drm_mm_insert_node(&priv->vram.mm, msm_obj->vram_node, npages);
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2017-06-14 06:52:54 +08:00
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spin_unlock(&priv->vram.lock);
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2013-11-17 01:56:06 +08:00
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if (ret) {
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2017-05-17 20:23:12 +08:00
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kvfree(p);
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2013-11-17 01:56:06 +08:00
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return ERR_PTR(ret);
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}
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paddr = physaddr(obj);
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for (i = 0; i < npages; i++) {
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p[i] = phys_to_page(paddr);
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paddr += PAGE_SIZE;
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}
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return p;
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}
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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static struct page **get_pages(struct drm_gem_object *obj)
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{
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struct msm_gem_object *msm_obj = to_msm_bo(obj);
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if (!msm_obj->pages) {
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struct drm_device *dev = obj->dev;
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2013-11-17 01:56:06 +08:00
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struct page **p;
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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int npages = obj->size >> PAGE_SHIFT;
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2015-03-04 04:04:25 +08:00
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if (use_pages(obj))
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drm/gem: remove misleading gfp parameter to get_pages()
drm_gem_get_pages() currently allows passing a 'gfp' parameter that is
passed to shmem combined with mapping_gfp_mask(). Given that the default
mapping_gfp_mask() is GFP_HIGHUSER, it is _very_ unlikely that anyone will
ever make use of that parameter. In fact, all drivers currently pass
redundant flags or 0.
This patch removes the 'gfp' parameter. The only reason to keep it is to
remove flags like __GFP_WAIT. But in its current form, it can only be used
to add flags. So to remove __GFP_WAIT, you'd have to drop it from the
mapping_gfp_mask, which again is stupid as this mask is used by shmem-core
for other allocations, too.
If any driver ever requires that parameter, we can introduce a new helper
that takes the raw 'gfp' parameter. The caller'd be responsible to combine
it with mapping_gfp_mask() in a suitable way. The current
drm_gem_get_pages() helper would then simply use mapping_gfp_mask() and
call the new helper. This is what shmem_read_mapping_pages{_gfp,} does
right now.
Moreover, the gfp-zone flag-usage is not obvious: If you pass a modified
zone, shmem core will WARN() or even BUG(). In other words, the following
must be true for 'gfp' passed to shmem_read_mapping_pages_gfp():
gfp_zone(mapping_gfp_mask(mapping)) == gfp_zone(gfp)
Add a comment to drm_gem_read_pages() explaining that constraint.
Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
2014-05-25 18:59:47 +08:00
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p = drm_gem_get_pages(obj);
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2013-11-17 01:56:06 +08:00
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else
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p = get_pages_vram(obj, npages);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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if (IS_ERR(p)) {
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2018-10-21 01:49:26 +08:00
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DRM_DEV_ERROR(dev->dev, "could not get pages: %ld\n",
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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PTR_ERR(p));
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return p;
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}
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2017-12-04 21:40:15 +08:00
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msm_obj->pages = p;
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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msm_obj->sgt = drm_prime_pages_to_sg(p, npages);
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2013-09-11 06:56:12 +08:00
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if (IS_ERR(msm_obj->sgt)) {
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2017-12-04 21:40:15 +08:00
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void *ptr = ERR_CAST(msm_obj->sgt);
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2018-10-21 01:49:26 +08:00
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DRM_DEV_ERROR(dev->dev, "failed to allocate sgt\n");
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2017-12-04 21:40:15 +08:00
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msm_obj->sgt = NULL;
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return ptr;
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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}
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/* For non-cached buffers, ensure the new pages are clean
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* because display controller, GPU, etc. are not coherent:
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*/
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if (msm_obj->flags & (MSM_BO_WC|MSM_BO_UNCACHED))
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dma_map_sg(dev->dev, msm_obj->sgt->sgl,
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msm_obj->sgt->nents, DMA_BIDIRECTIONAL);
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}
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return msm_obj->pages;
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}
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2017-06-14 06:52:54 +08:00
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static void put_pages_vram(struct drm_gem_object *obj)
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{
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struct msm_gem_object *msm_obj = to_msm_bo(obj);
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struct msm_drm_private *priv = obj->dev->dev_private;
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spin_lock(&priv->vram.lock);
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drm_mm_remove_node(msm_obj->vram_node);
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spin_unlock(&priv->vram.lock);
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kvfree(msm_obj->pages);
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}
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
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static void put_pages(struct drm_gem_object *obj)
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{
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struct msm_gem_object *msm_obj = to_msm_bo(obj);
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if (msm_obj->pages) {
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2018-04-04 06:38:45 +08:00
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if (msm_obj->sgt) {
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/* For non-cached buffers, ensure the new
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* pages are clean because display controller,
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* GPU, etc. are not coherent:
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*/
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if (msm_obj->flags & (MSM_BO_WC|MSM_BO_UNCACHED))
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dma_unmap_sg(obj->dev->dev, msm_obj->sgt->sgl,
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msm_obj->sgt->nents,
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DMA_BIDIRECTIONAL);
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2017-12-04 21:40:15 +08:00
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sg_free_table(msm_obj->sgt);
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2018-04-04 06:38:45 +08:00
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kfree(msm_obj->sgt);
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}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
2015-03-04 04:04:25 +08:00
|
|
|
if (use_pages(obj))
|
2013-11-17 01:56:06 +08:00
|
|
|
drm_gem_put_pages(obj, msm_obj->pages, true, false);
|
2017-06-14 06:52:54 +08:00
|
|
|
else
|
|
|
|
put_pages_vram(obj);
|
2013-11-17 01:56:06 +08:00
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
msm_obj->pages = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-09-28 23:28:35 +08:00
|
|
|
struct page **msm_gem_get_pages(struct drm_gem_object *obj)
|
|
|
|
{
|
2017-06-14 06:52:54 +08:00
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
2013-09-28 23:28:35 +08:00
|
|
|
struct page **p;
|
2017-06-14 06:52:54 +08:00
|
|
|
|
|
|
|
mutex_lock(&msm_obj->lock);
|
|
|
|
|
|
|
|
if (WARN_ON(msm_obj->madv != MSM_MADV_WILLNEED)) {
|
|
|
|
mutex_unlock(&msm_obj->lock);
|
|
|
|
return ERR_PTR(-EBUSY);
|
|
|
|
}
|
|
|
|
|
2013-09-28 23:28:35 +08:00
|
|
|
p = get_pages(obj);
|
2017-06-14 06:52:54 +08:00
|
|
|
mutex_unlock(&msm_obj->lock);
|
2013-09-28 23:28:35 +08:00
|
|
|
return p;
|
|
|
|
}
|
|
|
|
|
|
|
|
void msm_gem_put_pages(struct drm_gem_object *obj)
|
|
|
|
{
|
|
|
|
/* when we start tracking the pin count, then do something here */
|
|
|
|
}
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
int msm_gem_mmap_obj(struct drm_gem_object *obj,
|
|
|
|
struct vm_area_struct *vma)
|
|
|
|
{
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
|
|
|
|
|
|
|
vma->vm_flags &= ~VM_PFNMAP;
|
|
|
|
vma->vm_flags |= VM_MIXEDMAP;
|
|
|
|
|
|
|
|
if (msm_obj->flags & MSM_BO_WC) {
|
|
|
|
vma->vm_page_prot = pgprot_writecombine(vm_get_page_prot(vma->vm_flags));
|
|
|
|
} else if (msm_obj->flags & MSM_BO_UNCACHED) {
|
|
|
|
vma->vm_page_prot = pgprot_noncached(vm_get_page_prot(vma->vm_flags));
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* Shunt off cached objs to shmem file so they have their own
|
|
|
|
* address_space (so unmap_mapping_range does what we want,
|
|
|
|
* in particular in the case of mmap'd dmabufs)
|
|
|
|
*/
|
|
|
|
fput(vma->vm_file);
|
|
|
|
get_file(obj->filp);
|
|
|
|
vma->vm_pgoff = 0;
|
|
|
|
vma->vm_file = obj->filp;
|
|
|
|
|
|
|
|
vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int msm_gem_mmap(struct file *filp, struct vm_area_struct *vma)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = drm_gem_mmap(filp, vma);
|
|
|
|
if (ret) {
|
|
|
|
DBG("mmap failed: %d", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return msm_gem_mmap_obj(vma->vm_private_data, vma);
|
|
|
|
}
|
|
|
|
|
2018-05-22 01:29:48 +08:00
|
|
|
vm_fault_t msm_gem_fault(struct vm_fault *vmf)
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
{
|
2017-02-25 06:56:41 +08:00
|
|
|
struct vm_area_struct *vma = vmf->vma;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
struct drm_gem_object *obj = vma->vm_private_data;
|
2017-06-14 06:52:54 +08:00
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
struct page **pages;
|
|
|
|
unsigned long pfn;
|
|
|
|
pgoff_t pgoff;
|
2018-05-22 01:29:48 +08:00
|
|
|
int err;
|
|
|
|
vm_fault_t ret;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
/*
|
|
|
|
* vm_ops.open/drm_gem_mmap_obj and close get and put
|
|
|
|
* a reference on obj. So, we dont need to hold one here.
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
*/
|
2018-05-22 01:29:48 +08:00
|
|
|
err = mutex_lock_interruptible(&msm_obj->lock);
|
|
|
|
if (err) {
|
|
|
|
ret = VM_FAULT_NOPAGE;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
goto out;
|
2018-05-22 01:29:48 +08:00
|
|
|
}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
if (WARN_ON(msm_obj->madv != MSM_MADV_WILLNEED)) {
|
|
|
|
mutex_unlock(&msm_obj->lock);
|
|
|
|
return VM_FAULT_SIGBUS;
|
|
|
|
}
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
/* make sure we have pages attached now */
|
|
|
|
pages = get_pages(obj);
|
|
|
|
if (IS_ERR(pages)) {
|
2018-05-22 01:29:48 +08:00
|
|
|
ret = vmf_error(PTR_ERR(pages));
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
goto out_unlock;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* We don't use vmf->pgoff since that has the fake offset: */
|
2016-12-15 07:07:01 +08:00
|
|
|
pgoff = (vmf->address - vma->vm_start) >> PAGE_SHIFT;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
2013-11-17 01:56:06 +08:00
|
|
|
pfn = page_to_pfn(pages[pgoff]);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
2016-12-15 07:07:01 +08:00
|
|
|
VERB("Inserting %p pfn %lx, pa %lx", (void *)vmf->address,
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
pfn, pfn << PAGE_SHIFT);
|
|
|
|
|
2018-05-22 01:29:48 +08:00
|
|
|
ret = vmf_insert_mixed(vma, vmf->address, __pfn_to_pfn_t(pfn, PFN_DEV));
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
out_unlock:
|
2017-06-14 06:52:54 +08:00
|
|
|
mutex_unlock(&msm_obj->lock);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
out:
|
2018-05-22 01:29:48 +08:00
|
|
|
return ret;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/** get mmap offset */
|
|
|
|
static uint64_t mmap_offset(struct drm_gem_object *obj)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = obj->dev;
|
2017-06-14 06:52:54 +08:00
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
int ret;
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
WARN_ON(!mutex_is_locked(&msm_obj->lock));
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
|
|
|
/* Make it mmapable */
|
|
|
|
ret = drm_gem_create_mmap_offset(obj);
|
|
|
|
|
|
|
|
if (ret) {
|
2018-10-21 01:49:26 +08:00
|
|
|
DRM_DEV_ERROR(dev->dev, "could not allocate mmap offset\n");
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return drm_vma_node_offset_addr(&obj->vma_node);
|
|
|
|
}
|
|
|
|
|
|
|
|
uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj)
|
|
|
|
{
|
|
|
|
uint64_t offset;
|
2017-06-14 06:52:54 +08:00
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
|
|
|
|
|
|
|
mutex_lock(&msm_obj->lock);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
offset = mmap_offset(obj);
|
2017-06-14 06:52:54 +08:00
|
|
|
mutex_unlock(&msm_obj->lock);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
return offset;
|
|
|
|
}
|
|
|
|
|
2017-06-14 01:54:13 +08:00
|
|
|
static struct msm_gem_vma *add_vma(struct drm_gem_object *obj,
|
|
|
|
struct msm_gem_address_space *aspace)
|
|
|
|
{
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
|
|
|
struct msm_gem_vma *vma;
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
WARN_ON(!mutex_is_locked(&msm_obj->lock));
|
|
|
|
|
2017-06-14 01:54:13 +08:00
|
|
|
vma = kzalloc(sizeof(*vma), GFP_KERNEL);
|
|
|
|
if (!vma)
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
|
|
|
|
vma->aspace = aspace;
|
|
|
|
|
|
|
|
list_add_tail(&vma->list, &msm_obj->vmas);
|
|
|
|
|
|
|
|
return vma;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct msm_gem_vma *lookup_vma(struct drm_gem_object *obj,
|
|
|
|
struct msm_gem_address_space *aspace)
|
|
|
|
{
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
|
|
|
struct msm_gem_vma *vma;
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
WARN_ON(!mutex_is_locked(&msm_obj->lock));
|
2017-06-14 01:54:13 +08:00
|
|
|
|
|
|
|
list_for_each_entry(vma, &msm_obj->vmas, list) {
|
|
|
|
if (vma->aspace == aspace)
|
|
|
|
return vma;
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void del_vma(struct msm_gem_vma *vma)
|
|
|
|
{
|
|
|
|
if (!vma)
|
|
|
|
return;
|
|
|
|
|
|
|
|
list_del(&vma->list);
|
|
|
|
kfree(vma);
|
|
|
|
}
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
/* Called with msm_obj->lock locked */
|
2016-06-01 23:38:28 +08:00
|
|
|
static void
|
|
|
|
put_iova(struct drm_gem_object *obj)
|
|
|
|
{
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
2017-06-14 01:54:13 +08:00
|
|
|
struct msm_gem_vma *vma, *tmp;
|
2016-06-01 23:38:28 +08:00
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
WARN_ON(!mutex_is_locked(&msm_obj->lock));
|
2016-06-01 23:38:28 +08:00
|
|
|
|
2017-06-14 01:54:13 +08:00
|
|
|
list_for_each_entry_safe(vma, tmp, &msm_obj->vmas, list) {
|
2018-11-08 06:35:47 +08:00
|
|
|
msm_gem_unmap_vma(vma->aspace, vma);
|
2017-06-14 01:54:13 +08:00
|
|
|
del_vma(vma);
|
2016-06-01 23:38:28 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-11-08 06:35:48 +08:00
|
|
|
static int msm_gem_get_iova_locked(struct drm_gem_object *obj,
|
2017-06-13 23:07:08 +08:00
|
|
|
struct msm_gem_address_space *aspace, uint64_t *iova)
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
{
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
2017-06-14 01:54:13 +08:00
|
|
|
struct msm_gem_vma *vma;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
int ret = 0;
|
|
|
|
|
2018-11-08 06:35:48 +08:00
|
|
|
WARN_ON(!mutex_is_locked(&msm_obj->lock));
|
2017-06-13 21:15:36 +08:00
|
|
|
|
2017-06-14 01:54:13 +08:00
|
|
|
vma = lookup_vma(obj, aspace);
|
2013-11-17 01:56:06 +08:00
|
|
|
|
2017-06-14 01:54:13 +08:00
|
|
|
if (!vma) {
|
|
|
|
vma = add_vma(obj, aspace);
|
2018-11-08 06:35:48 +08:00
|
|
|
if (IS_ERR(vma))
|
|
|
|
return PTR_ERR(vma);
|
2017-06-14 01:54:13 +08:00
|
|
|
|
2018-11-08 06:35:48 +08:00
|
|
|
ret = msm_gem_init_vma(aspace, vma, obj->size >> PAGE_SHIFT);
|
|
|
|
if (ret) {
|
|
|
|
del_vma(vma);
|
|
|
|
return ret;
|
2017-06-14 01:54:13 +08:00
|
|
|
}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
}
|
|
|
|
|
2017-06-14 01:54:13 +08:00
|
|
|
*iova = vma->iova;
|
|
|
|
return 0;
|
2018-11-08 06:35:48 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static int msm_gem_pin_iova(struct drm_gem_object *obj,
|
|
|
|
struct msm_gem_address_space *aspace)
|
|
|
|
{
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
|
|
|
struct msm_gem_vma *vma;
|
|
|
|
struct page **pages;
|
|
|
|
|
|
|
|
WARN_ON(!mutex_is_locked(&msm_obj->lock));
|
|
|
|
|
|
|
|
if (WARN_ON(msm_obj->madv != MSM_MADV_WILLNEED))
|
|
|
|
return -EBUSY;
|
|
|
|
|
|
|
|
vma = lookup_vma(obj, aspace);
|
|
|
|
if (WARN_ON(!vma))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
pages = get_pages(obj);
|
|
|
|
if (IS_ERR(pages))
|
|
|
|
return PTR_ERR(pages);
|
|
|
|
|
|
|
|
return msm_gem_map_vma(aspace, vma, msm_obj->sgt,
|
|
|
|
obj->size >> PAGE_SHIFT);
|
|
|
|
}
|
|
|
|
|
2018-11-08 06:35:50 +08:00
|
|
|
/* get iova and pin it. Should have a matching put */
|
|
|
|
int msm_gem_get_and_pin_iova(struct drm_gem_object *obj,
|
2018-11-08 06:35:48 +08:00
|
|
|
struct msm_gem_address_space *aspace, uint64_t *iova)
|
|
|
|
{
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
|
|
|
u64 local;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
mutex_lock(&msm_obj->lock);
|
|
|
|
|
|
|
|
ret = msm_gem_get_iova_locked(obj, aspace, &local);
|
|
|
|
|
|
|
|
if (!ret)
|
|
|
|
ret = msm_gem_pin_iova(obj, aspace);
|
|
|
|
|
|
|
|
if (!ret)
|
|
|
|
*iova = local;
|
2017-06-14 01:54:13 +08:00
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
mutex_unlock(&msm_obj->lock);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2018-11-08 06:35:50 +08:00
|
|
|
/* Get an iova but don't pin the memory behind it */
|
|
|
|
int msm_gem_get_iova(struct drm_gem_object *obj,
|
|
|
|
struct msm_gem_address_space *aspace, uint64_t *iova)
|
|
|
|
{
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
mutex_lock(&msm_obj->lock);
|
|
|
|
ret = msm_gem_get_iova_locked(obj, aspace, iova);
|
|
|
|
mutex_unlock(&msm_obj->lock);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2014-11-08 22:13:37 +08:00
|
|
|
/* get iova without taking a reference, used in places where you have
|
2018-11-08 06:35:50 +08:00
|
|
|
* already done a 'msm_gem_get_and_pin_iova' or 'msm_gem_get_iova'
|
2014-11-08 22:13:37 +08:00
|
|
|
*/
|
2017-06-13 23:07:08 +08:00
|
|
|
uint64_t msm_gem_iova(struct drm_gem_object *obj,
|
|
|
|
struct msm_gem_address_space *aspace)
|
2014-11-08 22:13:37 +08:00
|
|
|
{
|
2017-06-14 06:52:54 +08:00
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
2017-06-14 01:54:13 +08:00
|
|
|
struct msm_gem_vma *vma;
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
mutex_lock(&msm_obj->lock);
|
2017-06-14 01:54:13 +08:00
|
|
|
vma = lookup_vma(obj, aspace);
|
2017-06-14 06:52:54 +08:00
|
|
|
mutex_unlock(&msm_obj->lock);
|
2017-06-14 01:54:13 +08:00
|
|
|
WARN_ON(!vma);
|
|
|
|
|
|
|
|
return vma ? vma->iova : 0;
|
2014-11-08 22:13:37 +08:00
|
|
|
}
|
|
|
|
|
2017-06-13 23:07:08 +08:00
|
|
|
void msm_gem_put_iova(struct drm_gem_object *obj,
|
|
|
|
struct msm_gem_address_space *aspace)
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
{
|
|
|
|
// XXX TODO ..
|
|
|
|
// NOTE: probably don't need a _locked() version.. we wouldn't
|
|
|
|
// normally unmap here, but instead just mark that it could be
|
|
|
|
// unmapped (if the iova refcnt drops to zero), but then later
|
|
|
|
// if another _get_iova_locked() fails we can start unmapping
|
|
|
|
// things that are no longer needed..
|
|
|
|
}
|
|
|
|
|
|
|
|
int msm_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
|
|
|
|
struct drm_mode_create_dumb *args)
|
|
|
|
{
|
|
|
|
args->pitch = align_pitch(args->width, args->bpp);
|
|
|
|
args->size = PAGE_ALIGN(args->pitch * args->height);
|
|
|
|
return msm_gem_new_handle(dev, file, args->size,
|
|
|
|
MSM_BO_SCANOUT | MSM_BO_WC, &args->handle);
|
|
|
|
}
|
|
|
|
|
|
|
|
int msm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
|
|
|
|
uint32_t handle, uint64_t *offset)
|
|
|
|
{
|
|
|
|
struct drm_gem_object *obj;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
/* GEM does all our handle to object mapping */
|
2016-05-09 18:04:54 +08:00
|
|
|
obj = drm_gem_object_lookup(file, handle);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
if (obj == NULL) {
|
|
|
|
ret = -ENOENT;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
*offset = msm_gem_mmap_offset(obj);
|
|
|
|
|
2018-01-26 11:55:54 +08:00
|
|
|
drm_gem_object_put_unlocked(obj);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
|
|
|
fail:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2017-09-15 20:38:20 +08:00
|
|
|
static void *get_vaddr(struct drm_gem_object *obj, unsigned madv)
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
{
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
2017-06-14 06:52:54 +08:00
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
mutex_lock(&msm_obj->lock);
|
|
|
|
|
2017-09-15 20:38:20 +08:00
|
|
|
if (WARN_ON(msm_obj->madv > madv)) {
|
2018-10-21 01:49:26 +08:00
|
|
|
DRM_DEV_ERROR(obj->dev->dev, "Invalid madv state: %u vs %u\n",
|
2017-09-15 20:38:20 +08:00
|
|
|
msm_obj->madv, madv);
|
2017-06-14 06:52:54 +08:00
|
|
|
mutex_unlock(&msm_obj->lock);
|
|
|
|
return ERR_PTR(-EBUSY);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* increment vmap_count *before* vmap() call, so shrinker can
|
|
|
|
* check vmap_count (is_vunmapable()) outside of msm_obj->lock.
|
|
|
|
* This guarantees that we won't try to msm_gem_vunmap() this
|
|
|
|
* same object from within the vmap() call (while we already
|
|
|
|
* hold msm_obj->lock)
|
|
|
|
*/
|
|
|
|
msm_obj->vmap_count++;
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
if (!msm_obj->vaddr) {
|
|
|
|
struct page **pages = get_pages(obj);
|
2017-06-14 06:52:54 +08:00
|
|
|
if (IS_ERR(pages)) {
|
|
|
|
ret = PTR_ERR(pages);
|
|
|
|
goto fail;
|
|
|
|
}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
msm_obj->vaddr = vmap(pages, obj->size >> PAGE_SHIFT,
|
|
|
|
VM_MAP, pgprot_writecombine(PAGE_KERNEL));
|
2017-06-14 06:52:54 +08:00
|
|
|
if (msm_obj->vaddr == NULL) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto fail;
|
|
|
|
}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
}
|
2017-06-14 06:52:54 +08:00
|
|
|
|
|
|
|
mutex_unlock(&msm_obj->lock);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
return msm_obj->vaddr;
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
fail:
|
|
|
|
msm_obj->vmap_count--;
|
|
|
|
mutex_unlock(&msm_obj->lock);
|
|
|
|
return ERR_PTR(ret);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
}
|
|
|
|
|
2017-09-15 20:38:20 +08:00
|
|
|
void *msm_gem_get_vaddr(struct drm_gem_object *obj)
|
|
|
|
{
|
|
|
|
return get_vaddr(obj, MSM_MADV_WILLNEED);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Don't use this! It is for the very special case of dumping
|
|
|
|
* submits from GPU hangs or faults, were the bo may already
|
|
|
|
* be MSM_MADV_DONTNEED, but we know the buffer is still on the
|
|
|
|
* active list.
|
|
|
|
*/
|
|
|
|
void *msm_gem_get_vaddr_active(struct drm_gem_object *obj)
|
|
|
|
{
|
|
|
|
return get_vaddr(obj, __MSM_MADV_PURGED);
|
|
|
|
}
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
void msm_gem_put_vaddr(struct drm_gem_object *obj)
|
2016-05-27 04:24:35 +08:00
|
|
|
{
|
2016-05-27 23:16:28 +08:00
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
2017-06-14 06:52:54 +08:00
|
|
|
|
|
|
|
mutex_lock(&msm_obj->lock);
|
2016-05-27 23:16:28 +08:00
|
|
|
WARN_ON(msm_obj->vmap_count < 1);
|
|
|
|
msm_obj->vmap_count--;
|
2017-06-14 06:52:54 +08:00
|
|
|
mutex_unlock(&msm_obj->lock);
|
2016-05-27 04:24:35 +08:00
|
|
|
}
|
|
|
|
|
2016-05-18 03:44:49 +08:00
|
|
|
/* Update madvise status, returns true if not purged, else
|
|
|
|
* false or -errno.
|
|
|
|
*/
|
|
|
|
int msm_gem_madvise(struct drm_gem_object *obj, unsigned madv)
|
|
|
|
{
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
mutex_lock(&msm_obj->lock);
|
|
|
|
|
2016-05-18 03:44:49 +08:00
|
|
|
WARN_ON(!mutex_is_locked(&obj->dev->struct_mutex));
|
|
|
|
|
|
|
|
if (msm_obj->madv != __MSM_MADV_PURGED)
|
|
|
|
msm_obj->madv = madv;
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
madv = msm_obj->madv;
|
|
|
|
|
|
|
|
mutex_unlock(&msm_obj->lock);
|
|
|
|
|
|
|
|
return (madv != __MSM_MADV_PURGED);
|
2016-05-18 03:44:49 +08:00
|
|
|
}
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
void msm_gem_purge(struct drm_gem_object *obj, enum msm_gem_lock subclass)
|
2016-05-18 04:19:32 +08:00
|
|
|
{
|
|
|
|
struct drm_device *dev = obj->dev;
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
|
|
|
|
|
|
|
WARN_ON(!mutex_is_locked(&dev->struct_mutex));
|
|
|
|
WARN_ON(!is_purgeable(msm_obj));
|
|
|
|
WARN_ON(obj->import_attach);
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
mutex_lock_nested(&msm_obj->lock, subclass);
|
|
|
|
|
2016-05-18 04:19:32 +08:00
|
|
|
put_iova(obj);
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
msm_gem_vunmap_locked(obj);
|
2016-05-18 04:19:32 +08:00
|
|
|
|
|
|
|
put_pages(obj);
|
|
|
|
|
|
|
|
msm_obj->madv = __MSM_MADV_PURGED;
|
|
|
|
|
|
|
|
drm_vma_node_unmap(&obj->vma_node, dev->anon_inode->i_mapping);
|
|
|
|
drm_gem_free_mmap_offset(obj);
|
|
|
|
|
|
|
|
/* Our goal here is to return as much of the memory as
|
|
|
|
* is possible back to the system as we are called from OOM.
|
|
|
|
* To do this we must instruct the shmfs to drop all of its
|
|
|
|
* backing pages, *now*.
|
|
|
|
*/
|
|
|
|
shmem_truncate_range(file_inode(obj->filp), 0, (loff_t)-1);
|
|
|
|
|
|
|
|
invalidate_mapping_pages(file_inode(obj->filp)->i_mapping,
|
|
|
|
0, (loff_t)-1);
|
2017-06-14 06:52:54 +08:00
|
|
|
|
|
|
|
mutex_unlock(&msm_obj->lock);
|
2016-05-18 04:19:32 +08:00
|
|
|
}
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
static void msm_gem_vunmap_locked(struct drm_gem_object *obj)
|
2016-05-27 23:16:28 +08:00
|
|
|
{
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
WARN_ON(!mutex_is_locked(&msm_obj->lock));
|
|
|
|
|
2016-05-27 23:16:28 +08:00
|
|
|
if (!msm_obj->vaddr || WARN_ON(!is_vunmapable(msm_obj)))
|
|
|
|
return;
|
|
|
|
|
|
|
|
vunmap(msm_obj->vaddr);
|
|
|
|
msm_obj->vaddr = NULL;
|
|
|
|
}
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
void msm_gem_vunmap(struct drm_gem_object *obj, enum msm_gem_lock subclass)
|
|
|
|
{
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
|
|
|
|
|
|
|
mutex_lock_nested(&msm_obj->lock, subclass);
|
|
|
|
msm_gem_vunmap_locked(obj);
|
|
|
|
mutex_unlock(&msm_obj->lock);
|
|
|
|
}
|
|
|
|
|
2016-03-16 06:26:28 +08:00
|
|
|
/* must be called before _move_to_active().. */
|
|
|
|
int msm_gem_sync_object(struct drm_gem_object *obj,
|
|
|
|
struct msm_fence_context *fctx, bool exclusive)
|
|
|
|
{
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
|
|
|
struct reservation_object_list *fobj;
|
2016-10-25 20:00:45 +08:00
|
|
|
struct dma_fence *fence;
|
2016-03-16 06:26:28 +08:00
|
|
|
int i, ret;
|
|
|
|
|
|
|
|
fobj = reservation_object_get_list(msm_obj->resv);
|
|
|
|
if (!fobj || (fobj->shared_count == 0)) {
|
|
|
|
fence = reservation_object_get_excl(msm_obj->resv);
|
|
|
|
/* don't need to wait on our own fences, since ring is fifo */
|
|
|
|
if (fence && (fence->context != fctx->context)) {
|
2016-10-25 20:00:45 +08:00
|
|
|
ret = dma_fence_wait(fence, true);
|
2016-03-16 06:26:28 +08:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!exclusive || !fobj)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
for (i = 0; i < fobj->shared_count; i++) {
|
|
|
|
fence = rcu_dereference_protected(fobj->shared[i],
|
|
|
|
reservation_object_held(msm_obj->resv));
|
|
|
|
if (fence->context != fctx->context) {
|
2016-10-25 20:00:45 +08:00
|
|
|
ret = dma_fence_wait(fence, true);
|
2016-03-16 06:26:28 +08:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-07-20 00:59:32 +08:00
|
|
|
void msm_gem_move_to_active(struct drm_gem_object *obj,
|
2016-10-25 20:00:45 +08:00
|
|
|
struct msm_gpu *gpu, bool exclusive, struct dma_fence *fence)
|
2013-07-20 00:59:32 +08:00
|
|
|
{
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
2016-05-18 03:44:49 +08:00
|
|
|
WARN_ON(msm_obj->madv != MSM_MADV_WILLNEED);
|
2013-07-20 00:59:32 +08:00
|
|
|
msm_obj->gpu = gpu;
|
2016-03-16 06:26:28 +08:00
|
|
|
if (exclusive)
|
|
|
|
reservation_object_add_excl_fence(msm_obj->resv, fence);
|
2013-09-02 01:25:09 +08:00
|
|
|
else
|
2016-03-16 06:26:28 +08:00
|
|
|
reservation_object_add_shared_fence(msm_obj->resv, fence);
|
2013-07-20 00:59:32 +08:00
|
|
|
list_del_init(&msm_obj->mm_list);
|
|
|
|
list_add_tail(&msm_obj->mm_list, &gpu->active_list);
|
|
|
|
}
|
|
|
|
|
|
|
|
void msm_gem_move_to_inactive(struct drm_gem_object *obj)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = obj->dev;
|
|
|
|
struct msm_drm_private *priv = dev->dev_private;
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
|
|
|
|
|
|
|
WARN_ON(!mutex_is_locked(&dev->struct_mutex));
|
|
|
|
|
|
|
|
msm_obj->gpu = NULL;
|
|
|
|
list_del_init(&msm_obj->mm_list);
|
|
|
|
list_add_tail(&msm_obj->mm_list, &priv->inactive_list);
|
|
|
|
}
|
|
|
|
|
2016-03-16 06:26:28 +08:00
|
|
|
int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, ktime_t *timeout)
|
2013-07-20 00:59:32 +08:00
|
|
|
{
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
2016-03-16 06:26:28 +08:00
|
|
|
bool write = !!(op & MSM_PREP_WRITE);
|
2016-08-29 15:08:26 +08:00
|
|
|
unsigned long remain =
|
|
|
|
op & MSM_PREP_NOSYNC ? 0 : timeout_to_jiffies(timeout);
|
|
|
|
long ret;
|
|
|
|
|
|
|
|
ret = reservation_object_wait_timeout_rcu(msm_obj->resv, write,
|
|
|
|
true, remain);
|
|
|
|
if (ret == 0)
|
|
|
|
return remain == 0 ? -EBUSY : -ETIMEDOUT;
|
|
|
|
else if (ret < 0)
|
|
|
|
return ret;
|
2013-07-20 00:59:32 +08:00
|
|
|
|
|
|
|
/* TODO cache maintenance */
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
2016-03-16 06:26:28 +08:00
|
|
|
return 0;
|
2013-07-20 00:59:32 +08:00
|
|
|
}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
2013-07-20 00:59:32 +08:00
|
|
|
int msm_gem_cpu_fini(struct drm_gem_object *obj)
|
|
|
|
{
|
|
|
|
/* TODO cache maintenance */
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_DEBUG_FS
|
2016-10-25 20:00:45 +08:00
|
|
|
static void describe_fence(struct dma_fence *fence, const char *type,
|
2016-03-16 06:26:28 +08:00
|
|
|
struct seq_file *m)
|
|
|
|
{
|
2016-10-25 20:00:45 +08:00
|
|
|
if (!dma_fence_is_signaled(fence))
|
2016-03-16 06:26:28 +08:00
|
|
|
seq_printf(m, "\t%9s: %s %s seq %u\n", type,
|
|
|
|
fence->ops->get_driver_name(fence),
|
|
|
|
fence->ops->get_timeline_name(fence),
|
|
|
|
fence->seqno);
|
|
|
|
}
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m)
|
|
|
|
{
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
2016-03-16 06:26:28 +08:00
|
|
|
struct reservation_object *robj = msm_obj->resv;
|
|
|
|
struct reservation_object_list *fobj;
|
2016-10-25 20:00:45 +08:00
|
|
|
struct dma_fence *fence;
|
2017-06-14 01:54:13 +08:00
|
|
|
struct msm_gem_vma *vma;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
uint64_t off = drm_vma_node_start(&obj->vma_node);
|
2016-05-18 03:44:49 +08:00
|
|
|
const char *madv;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
mutex_lock(&msm_obj->lock);
|
2016-03-16 06:26:28 +08:00
|
|
|
|
2016-05-18 03:44:49 +08:00
|
|
|
switch (msm_obj->madv) {
|
|
|
|
case __MSM_MADV_PURGED:
|
|
|
|
madv = " purged";
|
|
|
|
break;
|
|
|
|
case MSM_MADV_DONTNEED:
|
|
|
|
madv = " purgeable";
|
|
|
|
break;
|
|
|
|
case MSM_MADV_WILLNEED:
|
|
|
|
default:
|
|
|
|
madv = "";
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2018-11-08 06:35:49 +08:00
|
|
|
seq_printf(m, "%08x: %c %2d (%2d) %08llx %p",
|
2013-07-20 00:59:32 +08:00
|
|
|
msm_obj->flags, is_active(msm_obj) ? 'A' : 'I',
|
2016-11-15 00:29:48 +08:00
|
|
|
obj->name, kref_read(&obj->refcount),
|
2016-09-29 07:58:32 +08:00
|
|
|
off, msm_obj->vaddr);
|
|
|
|
|
2018-11-08 06:35:49 +08:00
|
|
|
seq_printf(m, " %08zu%9s\n", obj->size, madv);
|
2016-09-29 07:58:32 +08:00
|
|
|
|
2018-11-08 06:35:49 +08:00
|
|
|
if (!list_empty(&msm_obj->vmas)) {
|
|
|
|
|
|
|
|
seq_puts(m, " vmas:");
|
|
|
|
|
|
|
|
list_for_each_entry(vma, &msm_obj->vmas, list)
|
|
|
|
seq_printf(m, " [%s: %08llx,%s]", vma->aspace->name,
|
|
|
|
vma->iova, vma->mapped ? "mapped" : "unmapped");
|
|
|
|
|
|
|
|
seq_puts(m, "\n");
|
|
|
|
}
|
2016-03-16 06:26:28 +08:00
|
|
|
|
|
|
|
rcu_read_lock();
|
|
|
|
fobj = rcu_dereference(robj->fence);
|
|
|
|
if (fobj) {
|
|
|
|
unsigned int i, shared_count = fobj->shared_count;
|
|
|
|
|
|
|
|
for (i = 0; i < shared_count; i++) {
|
|
|
|
fence = rcu_dereference(fobj->shared[i]);
|
|
|
|
describe_fence(fence, "Shared", m);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
fence = rcu_dereference(robj->fence_excl);
|
|
|
|
if (fence)
|
|
|
|
describe_fence(fence, "Exclusive", m);
|
|
|
|
rcu_read_unlock();
|
2017-06-14 06:52:54 +08:00
|
|
|
|
|
|
|
mutex_unlock(&msm_obj->lock);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
void msm_gem_describe_objects(struct list_head *list, struct seq_file *m)
|
|
|
|
{
|
|
|
|
struct msm_gem_object *msm_obj;
|
|
|
|
int count = 0;
|
|
|
|
size_t size = 0;
|
|
|
|
|
2018-11-08 06:35:49 +08:00
|
|
|
seq_puts(m, " flags id ref offset kaddr size madv\n");
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
list_for_each_entry(msm_obj, list, mm_list) {
|
|
|
|
struct drm_gem_object *obj = &msm_obj->base;
|
2018-11-08 06:35:49 +08:00
|
|
|
seq_puts(m, " ");
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
msm_gem_describe(obj, m);
|
|
|
|
count++;
|
|
|
|
size += obj->size;
|
|
|
|
}
|
|
|
|
|
|
|
|
seq_printf(m, "Total %d objects, %zu bytes\n", count, size);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2018-02-15 00:14:23 +08:00
|
|
|
/* don't call directly! Use drm_gem_object_put() and friends */
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
void msm_gem_free_object(struct drm_gem_object *obj)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = obj->dev;
|
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
|
|
|
|
|
|
|
WARN_ON(!mutex_is_locked(&dev->struct_mutex));
|
|
|
|
|
2013-07-20 00:59:32 +08:00
|
|
|
/* object should not be on active list: */
|
|
|
|
WARN_ON(is_active(msm_obj));
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
list_del(&msm_obj->mm_list);
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
mutex_lock(&msm_obj->lock);
|
|
|
|
|
2016-06-01 23:38:28 +08:00
|
|
|
put_iova(obj);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
2013-09-28 23:28:35 +08:00
|
|
|
if (obj->import_attach) {
|
|
|
|
if (msm_obj->vaddr)
|
|
|
|
dma_buf_vunmap(obj->import_attach->dmabuf, msm_obj->vaddr);
|
|
|
|
|
|
|
|
/* Don't drop the pages for imported dmabuf, as they are not
|
|
|
|
* ours, just free the array we allocated:
|
|
|
|
*/
|
|
|
|
if (msm_obj->pages)
|
2017-05-17 20:23:12 +08:00
|
|
|
kvfree(msm_obj->pages);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
2015-04-08 01:51:32 +08:00
|
|
|
drm_prime_gem_destroy(obj, msm_obj->sgt);
|
2013-09-28 23:28:35 +08:00
|
|
|
} else {
|
2017-06-14 06:52:54 +08:00
|
|
|
msm_gem_vunmap_locked(obj);
|
2013-09-28 23:28:35 +08:00
|
|
|
put_pages(obj);
|
|
|
|
}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
2013-07-20 00:59:32 +08:00
|
|
|
if (msm_obj->resv == &msm_obj->_resv)
|
|
|
|
reservation_object_fini(msm_obj->resv);
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
drm_gem_object_release(obj);
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
mutex_unlock(&msm_obj->lock);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
kfree(msm_obj);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* convenience method to construct a GEM buffer object, and userspace handle */
|
|
|
|
int msm_gem_new_handle(struct drm_device *dev, struct drm_file *file,
|
|
|
|
uint32_t size, uint32_t flags, uint32_t *handle)
|
|
|
|
{
|
|
|
|
struct drm_gem_object *obj;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
obj = msm_gem_new(dev, size, flags);
|
|
|
|
|
|
|
|
if (IS_ERR(obj))
|
|
|
|
return PTR_ERR(obj);
|
|
|
|
|
|
|
|
ret = drm_gem_handle_create(file, obj, handle);
|
|
|
|
|
|
|
|
/* drop reference from allocate - handle holds it now */
|
2018-01-26 11:55:54 +08:00
|
|
|
drm_gem_object_put_unlocked(obj);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2013-09-28 23:28:35 +08:00
|
|
|
static int msm_gem_new_impl(struct drm_device *dev,
|
|
|
|
uint32_t size, uint32_t flags,
|
2016-03-17 00:40:35 +08:00
|
|
|
struct reservation_object *resv,
|
2017-06-14 06:52:54 +08:00
|
|
|
struct drm_gem_object **obj,
|
|
|
|
bool struct_mutex_locked)
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
{
|
|
|
|
struct msm_drm_private *priv = dev->dev_private;
|
|
|
|
struct msm_gem_object *msm_obj;
|
|
|
|
|
|
|
|
switch (flags & MSM_BO_CACHE_MASK) {
|
|
|
|
case MSM_BO_UNCACHED:
|
|
|
|
case MSM_BO_CACHED:
|
|
|
|
case MSM_BO_WC:
|
|
|
|
break;
|
|
|
|
default:
|
2018-10-21 01:49:26 +08:00
|
|
|
DRM_DEV_ERROR(dev->dev, "invalid cache flag: %x\n",
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
(flags & MSM_BO_CACHE_MASK));
|
2013-09-28 23:28:35 +08:00
|
|
|
return -EINVAL;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
}
|
|
|
|
|
2016-09-29 07:58:32 +08:00
|
|
|
msm_obj = kzalloc(sizeof(*msm_obj), GFP_KERNEL);
|
2013-09-28 23:28:35 +08:00
|
|
|
if (!msm_obj)
|
|
|
|
return -ENOMEM;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
mutex_init(&msm_obj->lock);
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
msm_obj->flags = flags;
|
2016-05-18 03:44:49 +08:00
|
|
|
msm_obj->madv = MSM_MADV_WILLNEED;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
2016-03-17 00:40:35 +08:00
|
|
|
if (resv) {
|
|
|
|
msm_obj->resv = resv;
|
|
|
|
} else {
|
|
|
|
msm_obj->resv = &msm_obj->_resv;
|
|
|
|
reservation_object_init(msm_obj->resv);
|
|
|
|
}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
2013-07-20 00:59:32 +08:00
|
|
|
INIT_LIST_HEAD(&msm_obj->submit_entry);
|
2017-06-14 01:54:13 +08:00
|
|
|
INIT_LIST_HEAD(&msm_obj->vmas);
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
if (struct_mutex_locked) {
|
|
|
|
WARN_ON(!mutex_is_locked(&dev->struct_mutex));
|
|
|
|
list_add_tail(&msm_obj->mm_list, &priv->inactive_list);
|
|
|
|
} else {
|
|
|
|
mutex_lock(&dev->struct_mutex);
|
|
|
|
list_add_tail(&msm_obj->mm_list, &priv->inactive_list);
|
|
|
|
mutex_unlock(&dev->struct_mutex);
|
|
|
|
}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
|
2013-09-28 23:28:35 +08:00
|
|
|
*obj = &msm_obj->base;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
static struct drm_gem_object *_msm_gem_new(struct drm_device *dev,
|
|
|
|
uint32_t size, uint32_t flags, bool struct_mutex_locked)
|
2013-09-28 23:28:35 +08:00
|
|
|
{
|
2017-06-13 23:50:05 +08:00
|
|
|
struct msm_drm_private *priv = dev->dev_private;
|
2013-11-17 01:56:06 +08:00
|
|
|
struct drm_gem_object *obj = NULL;
|
2017-06-13 23:50:05 +08:00
|
|
|
bool use_vram = false;
|
2013-09-28 23:28:35 +08:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
size = PAGE_ALIGN(size);
|
|
|
|
|
2017-06-13 23:50:05 +08:00
|
|
|
if (!iommu_present(&platform_bus_type))
|
|
|
|
use_vram = true;
|
|
|
|
else if ((flags & MSM_BO_STOLEN) && priv->vram.size)
|
|
|
|
use_vram = true;
|
|
|
|
|
|
|
|
if (WARN_ON(use_vram && !priv->vram.size))
|
|
|
|
return ERR_PTR(-EINVAL);
|
|
|
|
|
2017-03-08 01:02:51 +08:00
|
|
|
/* Disallow zero sized objects as they make the underlying
|
|
|
|
* infrastructure grumpy
|
|
|
|
*/
|
|
|
|
if (size == 0)
|
|
|
|
return ERR_PTR(-EINVAL);
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
ret = msm_gem_new_impl(dev, size, flags, NULL, &obj, struct_mutex_locked);
|
2013-09-28 23:28:35 +08:00
|
|
|
if (ret)
|
|
|
|
goto fail;
|
|
|
|
|
2017-06-13 23:50:05 +08:00
|
|
|
if (use_vram) {
|
2017-06-14 01:54:13 +08:00
|
|
|
struct msm_gem_vma *vma;
|
2017-06-13 23:50:05 +08:00
|
|
|
struct page **pages;
|
2017-07-30 20:42:36 +08:00
|
|
|
struct msm_gem_object *msm_obj = to_msm_bo(obj);
|
|
|
|
|
|
|
|
mutex_lock(&msm_obj->lock);
|
2017-06-13 23:50:05 +08:00
|
|
|
|
2017-06-14 01:54:13 +08:00
|
|
|
vma = add_vma(obj, NULL);
|
2017-07-30 20:42:36 +08:00
|
|
|
mutex_unlock(&msm_obj->lock);
|
2017-06-14 01:54:13 +08:00
|
|
|
if (IS_ERR(vma)) {
|
|
|
|
ret = PTR_ERR(vma);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
to_msm_bo(obj)->vram_node = &vma->node;
|
|
|
|
|
2017-06-13 23:50:05 +08:00
|
|
|
drm_gem_private_object_init(dev, obj, size);
|
|
|
|
|
|
|
|
pages = get_pages(obj);
|
|
|
|
if (IS_ERR(pages)) {
|
|
|
|
ret = PTR_ERR(pages);
|
|
|
|
goto fail;
|
|
|
|
}
|
2017-06-14 01:54:13 +08:00
|
|
|
|
|
|
|
vma->iova = physaddr(obj);
|
2017-06-13 23:50:05 +08:00
|
|
|
} else {
|
2013-11-17 01:56:06 +08:00
|
|
|
ret = drm_gem_object_init(dev, obj, size);
|
|
|
|
if (ret)
|
|
|
|
goto fail;
|
|
|
|
}
|
2013-09-28 23:28:35 +08:00
|
|
|
|
|
|
|
return obj;
|
|
|
|
|
|
|
|
fail:
|
2018-01-26 11:55:54 +08:00
|
|
|
drm_gem_object_put_unlocked(obj);
|
2013-09-28 23:28:35 +08:00
|
|
|
return ERR_PTR(ret);
|
|
|
|
}
|
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
struct drm_gem_object *msm_gem_new_locked(struct drm_device *dev,
|
|
|
|
uint32_t size, uint32_t flags)
|
|
|
|
{
|
|
|
|
return _msm_gem_new(dev, size, flags, true);
|
|
|
|
}
|
|
|
|
|
|
|
|
struct drm_gem_object *msm_gem_new(struct drm_device *dev,
|
|
|
|
uint32_t size, uint32_t flags)
|
|
|
|
{
|
|
|
|
return _msm_gem_new(dev, size, flags, false);
|
|
|
|
}
|
|
|
|
|
2013-09-28 23:28:35 +08:00
|
|
|
struct drm_gem_object *msm_gem_import(struct drm_device *dev,
|
2016-03-17 00:40:35 +08:00
|
|
|
struct dma_buf *dmabuf, struct sg_table *sgt)
|
2013-09-28 23:28:35 +08:00
|
|
|
{
|
|
|
|
struct msm_gem_object *msm_obj;
|
|
|
|
struct drm_gem_object *obj;
|
2016-03-17 00:40:35 +08:00
|
|
|
uint32_t size;
|
2013-09-28 23:28:35 +08:00
|
|
|
int ret, npages;
|
|
|
|
|
2013-11-17 01:56:06 +08:00
|
|
|
/* if we don't have IOMMU, don't bother pretending we can import: */
|
|
|
|
if (!iommu_present(&platform_bus_type)) {
|
2018-10-21 01:49:26 +08:00
|
|
|
DRM_DEV_ERROR(dev->dev, "cannot import without IOMMU\n");
|
2013-11-17 01:56:06 +08:00
|
|
|
return ERR_PTR(-EINVAL);
|
|
|
|
}
|
|
|
|
|
2016-03-17 00:40:35 +08:00
|
|
|
size = PAGE_ALIGN(dmabuf->size);
|
2013-09-28 23:28:35 +08:00
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
ret = msm_gem_new_impl(dev, size, MSM_BO_WC, dmabuf->resv, &obj, false);
|
2013-09-28 23:28:35 +08:00
|
|
|
if (ret)
|
|
|
|
goto fail;
|
|
|
|
|
|
|
|
drm_gem_private_object_init(dev, obj, size);
|
|
|
|
|
|
|
|
npages = size / PAGE_SIZE;
|
|
|
|
|
|
|
|
msm_obj = to_msm_bo(obj);
|
2017-06-14 06:52:54 +08:00
|
|
|
mutex_lock(&msm_obj->lock);
|
2013-09-28 23:28:35 +08:00
|
|
|
msm_obj->sgt = sgt;
|
2017-05-17 20:23:12 +08:00
|
|
|
msm_obj->pages = kvmalloc_array(npages, sizeof(struct page *), GFP_KERNEL);
|
2013-09-28 23:28:35 +08:00
|
|
|
if (!msm_obj->pages) {
|
2017-06-14 06:52:54 +08:00
|
|
|
mutex_unlock(&msm_obj->lock);
|
2013-09-28 23:28:35 +08:00
|
|
|
ret = -ENOMEM;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = drm_prime_sg_to_page_addr_arrays(sgt, msm_obj->pages, NULL, npages);
|
2017-06-14 06:52:54 +08:00
|
|
|
if (ret) {
|
|
|
|
mutex_unlock(&msm_obj->lock);
|
2013-09-28 23:28:35 +08:00
|
|
|
goto fail;
|
2017-06-14 06:52:54 +08:00
|
|
|
}
|
2013-09-28 23:28:35 +08:00
|
|
|
|
2017-06-14 06:52:54 +08:00
|
|
|
mutex_unlock(&msm_obj->lock);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
return obj;
|
|
|
|
|
|
|
|
fail:
|
2018-01-26 11:55:54 +08:00
|
|
|
drm_gem_object_put_unlocked(obj);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 00:44:06 +08:00
|
|
|
return ERR_PTR(ret);
|
|
|
|
}
|
2017-07-28 00:42:40 +08:00
|
|
|
|
|
|
|
static void *_msm_gem_kernel_new(struct drm_device *dev, uint32_t size,
|
|
|
|
uint32_t flags, struct msm_gem_address_space *aspace,
|
|
|
|
struct drm_gem_object **bo, uint64_t *iova, bool locked)
|
|
|
|
{
|
|
|
|
void *vaddr;
|
|
|
|
struct drm_gem_object *obj = _msm_gem_new(dev, size, flags, locked);
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (IS_ERR(obj))
|
|
|
|
return ERR_CAST(obj);
|
|
|
|
|
|
|
|
if (iova) {
|
2018-11-08 06:35:50 +08:00
|
|
|
ret = msm_gem_get_and_pin_iova(obj, aspace, iova);
|
2018-11-02 23:25:19 +08:00
|
|
|
if (ret)
|
|
|
|
goto err;
|
2017-07-28 00:42:40 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
vaddr = msm_gem_get_vaddr(obj);
|
2017-10-11 19:36:56 +08:00
|
|
|
if (IS_ERR(vaddr)) {
|
2017-07-28 00:42:40 +08:00
|
|
|
msm_gem_put_iova(obj, aspace);
|
2018-11-02 23:25:19 +08:00
|
|
|
ret = PTR_ERR(vaddr);
|
|
|
|
goto err;
|
2017-07-28 00:42:40 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
if (bo)
|
|
|
|
*bo = obj;
|
|
|
|
|
|
|
|
return vaddr;
|
2018-11-02 23:25:19 +08:00
|
|
|
err:
|
|
|
|
if (locked)
|
|
|
|
drm_gem_object_put(obj);
|
|
|
|
else
|
|
|
|
drm_gem_object_put_unlocked(obj);
|
|
|
|
|
|
|
|
return ERR_PTR(ret);
|
|
|
|
|
2017-07-28 00:42:40 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
void *msm_gem_kernel_new(struct drm_device *dev, uint32_t size,
|
|
|
|
uint32_t flags, struct msm_gem_address_space *aspace,
|
|
|
|
struct drm_gem_object **bo, uint64_t *iova)
|
|
|
|
{
|
|
|
|
return _msm_gem_kernel_new(dev, size, flags, aspace, bo, iova, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
void *msm_gem_kernel_new_locked(struct drm_device *dev, uint32_t size,
|
|
|
|
uint32_t flags, struct msm_gem_address_space *aspace,
|
|
|
|
struct drm_gem_object **bo, uint64_t *iova)
|
|
|
|
{
|
|
|
|
return _msm_gem_kernel_new(dev, size, flags, aspace, bo, iova, true);
|
|
|
|
}
|
2018-11-08 06:35:46 +08:00
|
|
|
|
|
|
|
void msm_gem_kernel_put(struct drm_gem_object *bo,
|
|
|
|
struct msm_gem_address_space *aspace, bool locked)
|
|
|
|
{
|
|
|
|
if (IS_ERR_OR_NULL(bo))
|
|
|
|
return;
|
|
|
|
|
|
|
|
msm_gem_put_vaddr(bo);
|
|
|
|
msm_gem_put_iova(bo, aspace);
|
|
|
|
|
|
|
|
if (locked)
|
|
|
|
drm_gem_object_put(bo);
|
|
|
|
else
|
|
|
|
drm_gem_object_put_unlocked(bo);
|
|
|
|
}
|