2005-07-11 18:41:53 +08:00
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|
/*
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* linux/include/linux/mtd/onenand.h
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*
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mtd: OneNAND OTP support rework
What is OTP in OneNAND?
The device includes,
1. one block-sized OTP (One Time Programmable) area and
2. user-controlled 1st block OTP(Block 0)
that can be used to increase system security or to provide
identification capabilities.
What is done?
In OneNAND, one block of the NAND Array is set aside as an OTP
memory area, and 1st Block (Block 0) can be used as OTP area.
This area, available to the user, can be configured and locked
with secured user information. The OTP block can be read,
programmed and locked using the same operations as any other NAND
Flash Array memory block. After issuing an OTP-Lock, OTP block
cannot be erased. OTP block is fully-guaranteed to be a good
block.
Why it is done?
Locking the 1st Block OTP has the effect of a 'Write-protect' to
guard against accidental re-programming of data stored in the 1st
block and OTP Block.
Which problem it solves?
OTP support is provided in the existing implementation of
OneNAND/Flex-OneNAND driver, but it is not working with OneNAND
devices. Have observed the following in current OTP OneNAND Implmentation,
1. DataSheet specific sequence to lock the OTP Area is not followed.
2. Certain functions are quiet generic to cope with OTP specific activity.
This patch re-implements OTP support for OneNAND device.
How it is done?
For all blocks, 8th word is available to the user.
However, in case of OTP Block, 8th word of sector 0, page 0 is reserved as
OTP Locking Bit area. Therefore, in case of OTP Block, user usage on this
area is prohibited. Condition specific values are entered in the 8th word,
sector0, page 0 of the OTP block during the process of issuing an OTP-Lock.
The possible conditions are:
1. Only 1st Block Lock
2. Only OTP Block Lock
3. Lock both the 1st Block and the OTP Block
What Other feature additions have been done in this patch?
This patch adds feature for:
1. Only 1st Block Lock
2. Lock both the 1st Block and the OTP Blocks
Re-implemented OTP support for OneNAND
Added following features to OneNAND
1. Lock only 1st Block in OneNAND
2. Lock BOTH 1st Block and OTP Block in OneNAND
[comments were slightly tweaked by Artem]
Signed-off-by: Amul Kumar Saha <amul.saha@samsung.com>
Reviewed-by: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-10-21 19:30:05 +08:00
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* Copyright © 2005-2009 Samsung Electronics
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2005-07-11 18:41:53 +08:00
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* Kyungmin Park <kyungmin.park@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __LINUX_MTD_ONENAND_H
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#define __LINUX_MTD_ONENAND_H
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#include <linux/spinlock.h>
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2006-11-16 10:23:48 +08:00
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#include <linux/completion.h>
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2009-09-21 05:28:14 +08:00
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#include <linux/mtd/flashchip.h>
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2005-07-11 18:41:53 +08:00
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#include <linux/mtd/onenand_regs.h>
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2005-09-03 14:15:48 +08:00
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#include <linux/mtd/bbm.h>
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2005-07-11 18:41:53 +08:00
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2009-05-13 04:46:57 +08:00
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#define MAX_DIES 2
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2005-07-11 18:41:53 +08:00
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#define MAX_BUFFERRAM 2
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/* Scan and identify a OneNAND device */
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extern int onenand_scan(struct mtd_info *mtd, int max_chips);
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/* Free resources held by the OneNAND device */
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extern void onenand_release(struct mtd_info *mtd);
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/**
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* struct onenand_bufferram - OneNAND BufferRAM Data
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2007-02-02 08:29:36 +08:00
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* @blockpage: block & page address in BufferRAM
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2005-07-11 18:41:53 +08:00
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*/
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struct onenand_bufferram {
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2007-02-02 08:29:36 +08:00
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int blockpage;
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2005-07-11 18:41:53 +08:00
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};
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/**
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* struct onenand_chip - OneNAND Private Flash Chip Data
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2006-06-29 12:48:38 +08:00
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* @base: [BOARDSPECIFIC] address to access OneNAND
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2009-05-13 04:46:57 +08:00
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* @dies: [INTERN][FLEX-ONENAND] number of dies on chip
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* @boundary: [INTERN][FLEX-ONENAND] Boundary of the dies
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* @diesize: [INTERN][FLEX-ONENAND] Size of the dies
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2006-06-29 12:48:38 +08:00
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* @chipsize: [INTERN] the size of one chip for multichip arrays
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2009-05-13 04:46:57 +08:00
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* FIXME For Flex-OneNAND, chipsize holds maximum possible
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* device size ie when all blocks are considered MLC
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2006-06-29 12:48:38 +08:00
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* @device_id: [INTERN] device ID
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* @density_mask: chip density, used for DDP devices
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* @verstion_id: [INTERN] version ID
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* @options: [BOARDSPECIFIC] various chip options. They can
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* partly be set to inform onenand_scan about
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* @erase_shift: [INTERN] number of address bits in a block
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* @page_shift: [INTERN] number of address bits in a page
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* @page_mask: [INTERN] a page per block mask
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[MTD] [OneNAND] 2X program support
The 2X Program is an extension of Program Operation.
Since the device is equipped with two DataRAMs, and two-plane NAND Flash
memory array, these two component enables simultaneous program of 4KiB.
Plane1 has only even blocks such as block0, block2, block4 while Plane2
has only odd blocks such as block1, block3, block5.
So MTD regards it as 4KiB page size and 256KiB block size
Now the following chips support it. (KFXXX16Q2M)
Demux: KFG2G16Q2M, KFH4G16Q2M, KFW8G16Q2M,
Mux: KFM2G16Q2M, KFN4G16Q2M,
And more recent chips
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2007-06-30 12:57:49 +08:00
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* @writesize: [INTERN] a real page size
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2006-06-29 12:48:38 +08:00
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* @bufferram_index: [INTERN] BufferRAM index
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* @bufferram: [INTERN] BufferRAM info
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* @readw: [REPLACEABLE] hardware specific function for read short
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* @writew: [REPLACEABLE] hardware specific function for write short
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* @command: [REPLACEABLE] hardware specific function for writing
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* commands to the chip
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* @wait: [REPLACEABLE] hardware specific function for wait on ready
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2009-05-13 04:46:57 +08:00
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* @bbt_wait: [REPLACEABLE] hardware specific function for bbt wait on ready
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* @unlock_all: [REPLACEABLE] hardware specific function for unlock all
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2006-06-29 12:48:38 +08:00
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* @read_bufferram: [REPLACEABLE] hardware specific function for BufferRAM Area
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* @write_bufferram: [REPLACEABLE] hardware specific function for BufferRAM Area
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* @read_word: [REPLACEABLE] hardware specific function for read
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* register of OneNAND
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* @write_word: [REPLACEABLE] hardware specific function for write
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* register of OneNAND
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* @mmcontrol: sync burst read function
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* @block_markbad: function to mark a block as bad
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* @scan_bbt: [REPLACEALBE] hardware specific function for scanning
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* Bad block Table
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* @chip_lock: [INTERN] spinlock used to protect access to this
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* structure and the chip
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* @wq: [INTERN] wait queue to sleep on if a OneNAND
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* operation is in progress
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* @state: [INTERN] the current state of the OneNAND device
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2007-03-09 09:08:11 +08:00
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* @page_buf: [INTERN] page main data buffer
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* @oob_buf: [INTERN] page oob data buffer
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2006-12-22 15:21:54 +08:00
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* @subpagesize: [INTERN] holds the subpagesize
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2006-06-29 12:48:38 +08:00
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* @ecclayout: [REPLACEABLE] the default ecc placement scheme
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* @bbm: [REPLACEABLE] pointer to Bad Block Management
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* @priv: [OPTIONAL] pointer to private chip date
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2005-07-11 18:41:53 +08:00
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*/
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struct onenand_chip {
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void __iomem *base;
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2009-05-13 04:46:57 +08:00
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unsigned dies;
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unsigned boundary[MAX_DIES];
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loff_t diesize[MAX_DIES];
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2005-07-11 18:41:53 +08:00
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unsigned int chipsize;
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unsigned int device_id;
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2006-09-26 17:45:28 +08:00
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unsigned int version_id;
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2009-05-13 04:46:57 +08:00
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unsigned int technology;
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2005-09-29 11:53:16 +08:00
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unsigned int density_mask;
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2005-07-11 18:41:53 +08:00
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unsigned int options;
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unsigned int erase_shift;
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unsigned int page_shift;
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unsigned int page_mask;
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[MTD] [OneNAND] 2X program support
The 2X Program is an extension of Program Operation.
Since the device is equipped with two DataRAMs, and two-plane NAND Flash
memory array, these two component enables simultaneous program of 4KiB.
Plane1 has only even blocks such as block0, block2, block4 while Plane2
has only odd blocks such as block1, block3, block5.
So MTD regards it as 4KiB page size and 256KiB block size
Now the following chips support it. (KFXXX16Q2M)
Demux: KFG2G16Q2M, KFH4G16Q2M, KFW8G16Q2M,
Mux: KFM2G16Q2M, KFN4G16Q2M,
And more recent chips
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2007-06-30 12:57:49 +08:00
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unsigned int writesize;
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2005-07-11 18:41:53 +08:00
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unsigned int bufferram_index;
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struct onenand_bufferram bufferram[MAX_BUFFERRAM];
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int (*command)(struct mtd_info *mtd, int cmd, loff_t address, size_t len);
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int (*wait)(struct mtd_info *mtd, int state);
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2009-05-13 04:46:57 +08:00
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int (*bbt_wait)(struct mtd_info *mtd, int state);
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void (*unlock_all)(struct mtd_info *mtd);
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2005-07-11 18:41:53 +08:00
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int (*read_bufferram)(struct mtd_info *mtd, int area,
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unsigned char *buffer, int offset, size_t count);
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int (*write_bufferram)(struct mtd_info *mtd, int area,
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const unsigned char *buffer, int offset, size_t count);
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unsigned short (*read_word)(void __iomem *addr);
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void (*write_word)(unsigned short value, void __iomem *addr);
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2005-09-03 14:07:19 +08:00
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void (*mmcontrol)(struct mtd_info *mtd, int sync_read);
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2005-09-03 14:15:48 +08:00
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int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
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int (*scan_bbt)(struct mtd_info *mtd);
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2005-07-11 18:41:53 +08:00
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2006-11-16 10:23:48 +08:00
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struct completion complete;
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int irq;
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2005-07-11 18:41:53 +08:00
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spinlock_t chip_lock;
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wait_queue_head_t wq;
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2009-09-21 05:28:14 +08:00
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flstate_t state;
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2005-12-16 10:17:29 +08:00
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unsigned char *page_buf;
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2007-03-09 09:08:11 +08:00
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unsigned char *oob_buf;
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2005-07-11 18:41:53 +08:00
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2006-12-22 15:21:54 +08:00
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int subpagesize;
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2006-05-28 04:16:10 +08:00
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struct nand_ecclayout *ecclayout;
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2005-07-11 18:41:53 +08:00
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2006-05-28 04:16:10 +08:00
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void *bbm;
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2005-09-03 14:15:48 +08:00
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2005-07-11 18:41:53 +08:00
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void *priv;
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};
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2005-09-03 14:20:08 +08:00
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/*
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* Helper macros
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*/
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mtd: OneNAND OTP support rework
What is OTP in OneNAND?
The device includes,
1. one block-sized OTP (One Time Programmable) area and
2. user-controlled 1st block OTP(Block 0)
that can be used to increase system security or to provide
identification capabilities.
What is done?
In OneNAND, one block of the NAND Array is set aside as an OTP
memory area, and 1st Block (Block 0) can be used as OTP area.
This area, available to the user, can be configured and locked
with secured user information. The OTP block can be read,
programmed and locked using the same operations as any other NAND
Flash Array memory block. After issuing an OTP-Lock, OTP block
cannot be erased. OTP block is fully-guaranteed to be a good
block.
Why it is done?
Locking the 1st Block OTP has the effect of a 'Write-protect' to
guard against accidental re-programming of data stored in the 1st
block and OTP Block.
Which problem it solves?
OTP support is provided in the existing implementation of
OneNAND/Flex-OneNAND driver, but it is not working with OneNAND
devices. Have observed the following in current OTP OneNAND Implmentation,
1. DataSheet specific sequence to lock the OTP Area is not followed.
2. Certain functions are quiet generic to cope with OTP specific activity.
This patch re-implements OTP support for OneNAND device.
How it is done?
For all blocks, 8th word is available to the user.
However, in case of OTP Block, 8th word of sector 0, page 0 is reserved as
OTP Locking Bit area. Therefore, in case of OTP Block, user usage on this
area is prohibited. Condition specific values are entered in the 8th word,
sector0, page 0 of the OTP block during the process of issuing an OTP-Lock.
The possible conditions are:
1. Only 1st Block Lock
2. Only OTP Block Lock
3. Lock both the 1st Block and the OTP Block
What Other feature additions have been done in this patch?
This patch adds feature for:
1. Only 1st Block Lock
2. Lock both the 1st Block and the OTP Blocks
Re-implemented OTP support for OneNAND
Added following features to OneNAND
1. Lock only 1st Block in OneNAND
2. Lock BOTH 1st Block and OTP Block in OneNAND
[comments were slightly tweaked by Artem]
Signed-off-by: Amul Kumar Saha <amul.saha@samsung.com>
Reviewed-by: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-10-21 19:30:05 +08:00
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#define ONENAND_PAGES_PER_BLOCK (1<<6)
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2005-07-11 18:41:53 +08:00
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#define ONENAND_CURRENT_BUFFERRAM(this) (this->bufferram_index)
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#define ONENAND_NEXT_BUFFERRAM(this) (this->bufferram_index ^ 1)
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#define ONENAND_SET_NEXT_BUFFERRAM(this) (this->bufferram_index ^= 1)
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2007-01-04 15:51:26 +08:00
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#define ONENAND_SET_PREV_BUFFERRAM(this) (this->bufferram_index ^= 1)
|
[MTD] [OneNAND] 2X program support
The 2X Program is an extension of Program Operation.
Since the device is equipped with two DataRAMs, and two-plane NAND Flash
memory array, these two component enables simultaneous program of 4KiB.
Plane1 has only even blocks such as block0, block2, block4 while Plane2
has only odd blocks such as block1, block3, block5.
So MTD regards it as 4KiB page size and 256KiB block size
Now the following chips support it. (KFXXX16Q2M)
Demux: KFG2G16Q2M, KFH4G16Q2M, KFW8G16Q2M,
Mux: KFM2G16Q2M, KFN4G16Q2M,
And more recent chips
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2007-06-30 12:57:49 +08:00
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#define ONENAND_SET_BUFFERRAM0(this) (this->bufferram_index = 0)
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#define ONENAND_SET_BUFFERRAM1(this) (this->bufferram_index = 1)
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2005-07-11 18:41:53 +08:00
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2009-05-13 04:46:57 +08:00
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#define FLEXONENAND(this) \
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(this->device_id & DEVICE_IS_FLEXONENAND)
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2005-09-03 14:20:08 +08:00
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#define ONENAND_GET_SYS_CFG1(this) \
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(this->read_word(this->base + ONENAND_REG_SYS_CFG1))
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#define ONENAND_SET_SYS_CFG1(v, this) \
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(this->write_word(v, this->base + ONENAND_REG_SYS_CFG1))
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2007-01-15 16:09:14 +08:00
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#define ONENAND_IS_DDP(this) \
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(this->device_id & ONENAND_DEVICE_IS_DDP)
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2009-05-13 04:46:57 +08:00
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#define ONENAND_IS_MLC(this) \
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(this->technology & ONENAND_TECHNOLOGY_IS_MLC)
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[MTD] [OneNAND] 2X program support
The 2X Program is an extension of Program Operation.
Since the device is equipped with two DataRAMs, and two-plane NAND Flash
memory array, these two component enables simultaneous program of 4KiB.
Plane1 has only even blocks such as block0, block2, block4 while Plane2
has only odd blocks such as block1, block3, block5.
So MTD regards it as 4KiB page size and 256KiB block size
Now the following chips support it. (KFXXX16Q2M)
Demux: KFG2G16Q2M, KFH4G16Q2M, KFW8G16Q2M,
Mux: KFM2G16Q2M, KFN4G16Q2M,
And more recent chips
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2007-06-30 12:57:49 +08:00
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#ifdef CONFIG_MTD_ONENAND_2X_PROGRAM
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#define ONENAND_IS_2PLANE(this) \
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(this->options & ONENAND_HAS_2PLANE)
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#else
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#define ONENAND_IS_2PLANE(this) (0)
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#endif
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2006-05-12 22:02:31 +08:00
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/* Check byte access in OneNAND */
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#define ONENAND_CHECK_BYTE_ACCESS(addr) (addr & 0x1)
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2005-07-11 18:41:53 +08:00
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/*
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* Options bits
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*/
|
2006-09-26 17:45:28 +08:00
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#define ONENAND_HAS_CONT_LOCK (0x0001)
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#define ONENAND_HAS_UNLOCK_ALL (0x0002)
|
[MTD] [OneNAND] 2X program support
The 2X Program is an extension of Program Operation.
Since the device is equipped with two DataRAMs, and two-plane NAND Flash
memory array, these two component enables simultaneous program of 4KiB.
Plane1 has only even blocks such as block0, block2, block4 while Plane2
has only odd blocks such as block1, block3, block5.
So MTD regards it as 4KiB page size and 256KiB block size
Now the following chips support it. (KFXXX16Q2M)
Demux: KFG2G16Q2M, KFH4G16Q2M, KFW8G16Q2M,
Mux: KFM2G16Q2M, KFN4G16Q2M,
And more recent chips
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2007-06-30 12:57:49 +08:00
|
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#define ONENAND_HAS_2PLANE (0x0004)
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2009-05-13 04:46:57 +08:00
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#define ONENAND_SKIP_UNLOCK_CHECK (0x0100)
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2005-12-16 10:17:29 +08:00
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#define ONENAND_PAGEBUF_ALLOC (0x1000)
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2007-03-09 09:08:11 +08:00
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#define ONENAND_OOBBUF_ALLOC (0x2000)
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2005-07-11 18:41:53 +08:00
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/*
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* OneNAND Flash Manufacturer ID Codes
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*/
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#define ONENAND_MFR_SAMSUNG 0xec
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2009-05-05 16:04:19 +08:00
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#define ONENAND_MFR_NUMONYX 0x20
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2005-07-11 18:41:53 +08:00
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/**
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2006-06-29 12:48:38 +08:00
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* struct onenand_manufacturers - NAND Flash Manufacturer ID Structure
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* @name: Manufacturer name
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* @id: manufacturer ID code of device.
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2005-07-11 18:41:53 +08:00
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*/
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struct onenand_manufacturers {
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int id;
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char *name;
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};
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2008-04-14 22:20:38 +08:00
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int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
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struct mtd_oob_ops *ops);
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2009-05-13 04:46:57 +08:00
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unsigned onenand_block(struct onenand_chip *this, loff_t addr);
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loff_t onenand_addr(struct onenand_chip *this, int block);
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int flexonenand_region(struct mtd_info *mtd, loff_t addr);
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2008-04-14 22:20:38 +08:00
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2009-09-19 03:51:44 +08:00
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struct mtd_partition;
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struct onenand_platform_data {
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void (*mmcontrol)(struct mtd_info *mtd, int sync_read);
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struct mtd_partition *parts;
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unsigned int nr_parts;
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};
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2005-07-11 18:41:53 +08:00
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#endif /* __LINUX_MTD_ONENAND_H */
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