2015-09-30 20:55:47 +08:00
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/*
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* i.MX6 OCOTP fusebox driver
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*
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* Copyright (c) 2015 Pengutronix, Philipp Zabel <p.zabel@pengutronix.de>
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*
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* Based on the barebox ocotp driver,
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* Copyright (c) 2010 Baruch Siach <baruch@tkos.co.il>,
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* Orex Computed Radiography
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation.
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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2016-06-02 19:05:11 +08:00
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#include <linux/clk.h>
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2015-09-30 20:55:47 +08:00
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/nvmem-provider.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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2017-03-31 20:44:54 +08:00
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#define IMX_OCOTP_OFFSET_B0W0 0x400 /* Offset from base address of the
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* OTP Bank0 Word0
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*/
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#define IMX_OCOTP_OFFSET_PER_WORD 0x10 /* Offset between the start addr
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* of two consecutive OTP words.
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*/
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#define IMX_OCOTP_ADDR_CTRL 0x0000
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#define IMX_OCOTP_ADDR_CTRL_CLR 0x0008
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#define IMX_OCOTP_BM_CTRL_ERROR 0x00000200
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#define IMX_OCOTP_READ_LOCKED_VAL 0xBADABADA
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2015-09-30 20:55:47 +08:00
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struct ocotp_priv {
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struct device *dev;
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2016-06-02 19:05:11 +08:00
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struct clk *clk;
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2015-09-30 20:55:47 +08:00
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void __iomem *base;
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unsigned int nregs;
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};
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2017-03-31 20:44:54 +08:00
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static void imx_ocotp_clr_err_if_set(void __iomem *base)
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{
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u32 c;
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c = readl(base + IMX_OCOTP_ADDR_CTRL);
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if (!(c & IMX_OCOTP_BM_CTRL_ERROR))
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return;
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writel(IMX_OCOTP_BM_CTRL_ERROR, base + IMX_OCOTP_ADDR_CTRL_CLR);
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}
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2016-04-25 03:28:13 +08:00
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static int imx_ocotp_read(void *context, unsigned int offset,
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void *val, size_t bytes)
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2015-09-30 20:55:47 +08:00
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{
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struct ocotp_priv *priv = context;
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unsigned int count;
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2016-04-25 03:28:13 +08:00
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u32 *buf = val;
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2016-06-02 19:05:11 +08:00
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int i, ret;
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2015-09-30 20:55:47 +08:00
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u32 index;
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index = offset >> 2;
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2016-04-25 03:28:13 +08:00
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count = bytes >> 2;
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2015-09-30 20:55:47 +08:00
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if (count > (priv->nregs - index))
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count = priv->nregs - index;
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2016-06-02 19:05:11 +08:00
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ret = clk_prepare_enable(priv->clk);
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if (ret < 0) {
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dev_err(priv->dev, "failed to prepare/enable ocotp clk\n");
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return ret;
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}
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2015-09-30 20:55:47 +08:00
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2017-03-31 20:44:54 +08:00
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for (i = index; i < (index + count); i++) {
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*buf++ = readl(priv->base + IMX_OCOTP_OFFSET_B0W0 +
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i * IMX_OCOTP_OFFSET_PER_WORD);
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2016-06-02 19:05:11 +08:00
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2017-03-31 20:44:54 +08:00
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/* 47.3.1.2
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* For "read locked" registers 0xBADABADA will be returned and
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* HW_OCOTP_CTRL[ERROR] will be set. It must be cleared by
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* software before any new write, read or reload access can be
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* issued
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*/
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if (*(buf - 1) == IMX_OCOTP_READ_LOCKED_VAL)
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imx_ocotp_clr_err_if_set(priv->base);
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}
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clk_disable_unprepare(priv->clk);
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2016-02-22 19:23:52 +08:00
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return 0;
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2015-09-30 20:55:47 +08:00
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}
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static struct nvmem_config imx_ocotp_nvmem_config = {
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.name = "imx-ocotp",
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.read_only = true,
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2016-04-25 03:28:13 +08:00
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.word_size = 4,
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.stride = 4,
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2015-09-30 20:55:47 +08:00
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.owner = THIS_MODULE,
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2016-04-25 03:28:13 +08:00
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.reg_read = imx_ocotp_read,
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2015-09-30 20:55:47 +08:00
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};
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static const struct of_device_id imx_ocotp_dt_ids[] = {
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{ .compatible = "fsl,imx6q-ocotp", (void *)128 },
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2017-01-05 00:18:10 +08:00
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{ .compatible = "fsl,imx6sl-ocotp", (void *)64 },
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2015-09-30 20:55:47 +08:00
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{ .compatible = "fsl,imx6sx-ocotp", (void *)128 },
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2017-01-23 07:02:36 +08:00
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{ .compatible = "fsl,imx6ul-ocotp", (void *)128 },
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2017-03-31 20:44:53 +08:00
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{ .compatible = "fsl,imx7d-ocotp", (void *)64 },
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2015-09-30 20:55:47 +08:00
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{ },
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};
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MODULE_DEVICE_TABLE(of, imx_ocotp_dt_ids);
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static int imx_ocotp_probe(struct platform_device *pdev)
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{
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const struct of_device_id *of_id;
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struct device *dev = &pdev->dev;
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struct resource *res;
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struct ocotp_priv *priv;
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struct nvmem_device *nvmem;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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2017-03-31 20:44:49 +08:00
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priv->dev = dev;
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2015-09-30 20:55:47 +08:00
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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priv->base = devm_ioremap_resource(dev, res);
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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2017-03-31 20:44:49 +08:00
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priv->clk = devm_clk_get(dev, NULL);
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2016-06-02 19:05:11 +08:00
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if (IS_ERR(priv->clk))
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return PTR_ERR(priv->clk);
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2015-09-30 20:55:47 +08:00
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of_id = of_match_device(imx_ocotp_dt_ids, dev);
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2016-06-02 19:19:44 +08:00
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priv->nregs = (unsigned long)of_id->data;
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2016-04-25 03:28:13 +08:00
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imx_ocotp_nvmem_config.size = 4 * priv->nregs;
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2015-09-30 20:55:47 +08:00
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imx_ocotp_nvmem_config.dev = dev;
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2016-04-25 03:28:13 +08:00
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imx_ocotp_nvmem_config.priv = priv;
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2015-09-30 20:55:47 +08:00
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nvmem = nvmem_register(&imx_ocotp_nvmem_config);
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if (IS_ERR(nvmem))
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return PTR_ERR(nvmem);
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platform_set_drvdata(pdev, nvmem);
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return 0;
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}
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static int imx_ocotp_remove(struct platform_device *pdev)
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{
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struct nvmem_device *nvmem = platform_get_drvdata(pdev);
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return nvmem_unregister(nvmem);
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}
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static struct platform_driver imx_ocotp_driver = {
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.probe = imx_ocotp_probe,
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.remove = imx_ocotp_remove,
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.driver = {
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.name = "imx_ocotp",
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.of_match_table = imx_ocotp_dt_ids,
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},
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};
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module_platform_driver(imx_ocotp_driver);
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MODULE_AUTHOR("Philipp Zabel <p.zabel@pengutronix.de>");
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MODULE_DESCRIPTION("i.MX6 OCOTP fuse box driver");
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MODULE_LICENSE("GPL v2");
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