2020-02-13 23:51:56 +08:00
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// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (c) 2020 BayLibre, SAS.
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// Author: Jerome Brunet <jbrunet@baylibre.com>
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#include <linux/bitfield.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dai.h>
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#include <dt-bindings/sound/meson-aiu.h>
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#include "aiu.h"
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#include "meson-codec-glue.h"
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#define CTRL_DIN_EN 15
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#define CTRL_CLK_INV BIT(14)
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#define CTRL_LRCLK_INV BIT(13)
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#define CTRL_I2S_IN_BCLK_SRC BIT(11)
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#define CTRL_DIN_LRCLK_SRC_SHIFT 6
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#define CTRL_DIN_LRCLK_SRC (0x3 << CTRL_DIN_LRCLK_SRC_SHIFT)
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#define CTRL_BCLK_MCLK_SRC GENMASK(5, 4)
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#define CTRL_DIN_SKEW GENMASK(3, 2)
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#define CTRL_I2S_OUT_LANE_SRC 0
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#define AIU_ACODEC_OUT_CHMAX 2
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static const char * const aiu_acodec_ctrl_mux_texts[] = {
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"DISABLED", "I2S", "PCM",
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};
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static int aiu_acodec_ctrl_mux_put_enum(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *component =
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snd_soc_dapm_kcontrol_component(kcontrol);
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struct snd_soc_dapm_context *dapm =
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snd_soc_dapm_kcontrol_dapm(kcontrol);
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struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
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unsigned int mux, changed;
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mux = snd_soc_enum_item_to_val(e, ucontrol->value.enumerated.item[0]);
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changed = snd_soc_component_test_bits(component, e->reg,
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CTRL_DIN_LRCLK_SRC,
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FIELD_PREP(CTRL_DIN_LRCLK_SRC,
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mux));
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if (!changed)
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return 0;
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/* Force disconnect of the mux while updating */
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snd_soc_dapm_mux_update_power(dapm, kcontrol, 0, NULL, NULL);
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snd_soc_component_update_bits(component, e->reg,
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CTRL_DIN_LRCLK_SRC |
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CTRL_BCLK_MCLK_SRC,
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FIELD_PREP(CTRL_DIN_LRCLK_SRC, mux) |
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FIELD_PREP(CTRL_BCLK_MCLK_SRC, mux));
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snd_soc_dapm_mux_update_power(dapm, kcontrol, mux, e, NULL);
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2022-04-21 20:38:01 +08:00
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return 1;
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2020-02-13 23:51:56 +08:00
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}
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static SOC_ENUM_SINGLE_DECL(aiu_acodec_ctrl_mux_enum, AIU_ACODEC_CTRL,
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CTRL_DIN_LRCLK_SRC_SHIFT,
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aiu_acodec_ctrl_mux_texts);
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static const struct snd_kcontrol_new aiu_acodec_ctrl_mux =
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SOC_DAPM_ENUM_EXT("ACodec Source", aiu_acodec_ctrl_mux_enum,
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snd_soc_dapm_get_enum_double,
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aiu_acodec_ctrl_mux_put_enum);
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static const struct snd_kcontrol_new aiu_acodec_ctrl_out_enable =
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SOC_DAPM_SINGLE_AUTODISABLE("Switch", AIU_ACODEC_CTRL,
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CTRL_DIN_EN, 1, 0);
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static const struct snd_soc_dapm_widget aiu_acodec_ctrl_widgets[] = {
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SND_SOC_DAPM_MUX("ACODEC SRC", SND_SOC_NOPM, 0, 0,
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&aiu_acodec_ctrl_mux),
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SND_SOC_DAPM_SWITCH("ACODEC OUT EN", SND_SOC_NOPM, 0, 0,
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&aiu_acodec_ctrl_out_enable),
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};
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static int aiu_acodec_ctrl_input_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct meson_codec_glue_input *data;
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int ret;
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ret = meson_codec_glue_input_hw_params(substream, params, dai);
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if (ret)
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return ret;
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/* The glue will provide 1 lane out of the 4 to the output */
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data = meson_codec_glue_input_get_data(dai);
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data->params.channels_min = min_t(unsigned int, AIU_ACODEC_OUT_CHMAX,
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data->params.channels_min);
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data->params.channels_max = min_t(unsigned int, AIU_ACODEC_OUT_CHMAX,
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data->params.channels_max);
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return 0;
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}
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static const struct snd_soc_dai_ops aiu_acodec_ctrl_input_ops = {
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.hw_params = aiu_acodec_ctrl_input_hw_params,
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.set_fmt = meson_codec_glue_input_set_fmt,
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};
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static const struct snd_soc_dai_ops aiu_acodec_ctrl_output_ops = {
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.startup = meson_codec_glue_output_startup,
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};
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#define AIU_ACODEC_CTRL_FORMATS \
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(SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
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SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_LE | \
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SNDRV_PCM_FMTBIT_S32_LE)
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#define AIU_ACODEC_STREAM(xname, xsuffix, xchmax) \
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{ \
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.stream_name = xname " " xsuffix, \
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.channels_min = 1, \
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.channels_max = (xchmax), \
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.rate_min = 5512, \
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.rate_max = 192000, \
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.formats = AIU_ACODEC_CTRL_FORMATS, \
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}
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#define AIU_ACODEC_INPUT(xname) { \
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.name = "ACODEC CTRL " xname, \
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.playback = AIU_ACODEC_STREAM(xname, "Playback", 8), \
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.ops = &aiu_acodec_ctrl_input_ops, \
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.probe = meson_codec_glue_input_dai_probe, \
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.remove = meson_codec_glue_input_dai_remove, \
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}
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#define AIU_ACODEC_OUTPUT(xname) { \
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.name = "ACODEC CTRL " xname, \
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.capture = AIU_ACODEC_STREAM(xname, "Capture", AIU_ACODEC_OUT_CHMAX), \
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.ops = &aiu_acodec_ctrl_output_ops, \
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}
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static struct snd_soc_dai_driver aiu_acodec_ctrl_dai_drv[] = {
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[CTRL_I2S] = AIU_ACODEC_INPUT("ACODEC I2S IN"),
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[CTRL_PCM] = AIU_ACODEC_INPUT("ACODEC PCM IN"),
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[CTRL_OUT] = AIU_ACODEC_OUTPUT("ACODEC OUT"),
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};
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static const struct snd_soc_dapm_route aiu_acodec_ctrl_routes[] = {
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{ "ACODEC SRC", "I2S", "ACODEC I2S IN Playback" },
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{ "ACODEC SRC", "PCM", "ACODEC PCM IN Playback" },
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{ "ACODEC OUT EN", "Switch", "ACODEC SRC" },
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{ "ACODEC OUT Capture", NULL, "ACODEC OUT EN" },
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};
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static const struct snd_kcontrol_new aiu_acodec_ctrl_controls[] = {
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SOC_SINGLE("ACODEC I2S Lane Select", AIU_ACODEC_CTRL,
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CTRL_I2S_OUT_LANE_SRC, 3, 0),
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};
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static int aiu_acodec_of_xlate_dai_name(struct snd_soc_component *component,
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2021-02-21 23:30:24 +08:00
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const struct of_phandle_args *args,
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2020-02-13 23:51:56 +08:00
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const char **dai_name)
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{
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return aiu_of_xlate_dai_name(component, args, dai_name, AIU_ACODEC);
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}
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static int aiu_acodec_ctrl_component_probe(struct snd_soc_component *component)
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{
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/*
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* NOTE: Din Skew setting
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* According to the documentation, the following update adds one delay
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* to the din line. Without this, the output saturates. This happens
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* regardless of the link format (i2s or left_j) so it is not clear what
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* it actually does but it seems to be required
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*/
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snd_soc_component_update_bits(component, AIU_ACODEC_CTRL,
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CTRL_DIN_SKEW,
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FIELD_PREP(CTRL_DIN_SKEW, 2));
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return 0;
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}
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static const struct snd_soc_component_driver aiu_acodec_ctrl_component = {
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.name = "AIU Internal DAC Codec Control",
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.probe = aiu_acodec_ctrl_component_probe,
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.controls = aiu_acodec_ctrl_controls,
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.num_controls = ARRAY_SIZE(aiu_acodec_ctrl_controls),
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.dapm_widgets = aiu_acodec_ctrl_widgets,
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.num_dapm_widgets = ARRAY_SIZE(aiu_acodec_ctrl_widgets),
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.dapm_routes = aiu_acodec_ctrl_routes,
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.num_dapm_routes = ARRAY_SIZE(aiu_acodec_ctrl_routes),
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.of_xlate_dai_name = aiu_acodec_of_xlate_dai_name,
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.endianness = 1,
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2022-03-10 04:23:06 +08:00
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#ifdef CONFIG_DEBUG_FS
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.debugfs_prefix = "acodec",
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#endif
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2020-02-13 23:51:56 +08:00
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};
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int aiu_acodec_ctrl_register_component(struct device *dev)
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{
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2020-02-17 17:20:19 +08:00
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return snd_soc_register_component(dev, &aiu_acodec_ctrl_component,
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aiu_acodec_ctrl_dai_drv,
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ARRAY_SIZE(aiu_acodec_ctrl_dai_drv));
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2020-02-13 23:51:56 +08:00
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}
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