2019-05-19 20:07:45 +08:00
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# SPDX-License-Identifier: GPL-2.0-only
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2017-05-11 14:47:42 +08:00
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#
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# Phy drivers for Hisilicon platforms
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#
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config PHY_HI6220_USB
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tristate "hi6220 USB PHY support"
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depends on (ARCH_HISI && ARM64) || COMPILE_TEST
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2018-03-06 19:18:49 +08:00
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depends on HAS_IOMEM
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2017-05-11 14:47:42 +08:00
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select GENERIC_PHY
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select MFD_SYSCON
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help
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Enable this to support the HISILICON HI6220 USB PHY.
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To compile this driver as a module, choose M here.
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2019-03-29 12:14:03 +08:00
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config PHY_HI3660_USB
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tristate "hi3660 USB PHY support"
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depends on (ARCH_HISI && ARM64) || COMPILE_TEST
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select GENERIC_PHY
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select MFD_SYSCON
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help
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Enable this to support the HISILICON HI3660 USB PHY.
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To compile this driver as a module, choose M here.
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phy: add combo phy driver for HiSilicon STB SoCs
Add combo phy driver for HiSilicon STB SoCs. This phy can be
used as pcie-phy, sata-phy or usb-phy.
Changes for v5:
- Add bindings doc for Hi3798CV200 peripheral controller, and refer to
the bindings of this parent node in combphy bindings doc.
Changes for v4:
- Instead of relying on device id, add a new property
hisilicon,fixed-mode for combphy device that doesn't support mode
select but a fixed phy mode.
- Move combphy mode select register bits definition to device tree, as
it may vary from one device to another.
Changes for v3:
- Make combphy device be child of peripheral controller and use 'reg'
property for mapping combphy configuration registers.
- Kill "hisilicon,peripheral-syscon" property, since parent node is
just the syscon controller now.
- Check combphy id to handle the quirk that combphy0 can not configure
mode but always works in USB3 mode.
- Unify phy .init and .exit hooks for different combphy instances and
work modes, as the only quirk we need to handle is that combphy0 can
only work in USB3 mode.
- Better naming for clock and reset, 'ref' to 'ref_clk', 'por' to
'por_rst'.
Changes for v2:
- Move DT bindings into a separate patch.
- Drop the spurious newline from drivers/phy/Makefile.
- Use the phy type defines in dt-bindings/phy/phy.h.
- Use PTR_ERR_OR_ZERO() for checking return from
devm_of_phy_provider_register().
- Add USB3 phy support.
Signed-off-by: Jianguo Sun <sunjianguo1@huawei.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-01-24 13:47:37 +08:00
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config PHY_HISTB_COMBPHY
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tristate "HiSilicon STB SoCs COMBPHY support"
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depends on (ARCH_HISI && ARM64) || COMPILE_TEST
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select GENERIC_PHY
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select MFD_SYSCON
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help
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Enable this to support the HISILICON STB SoCs COMBPHY.
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If unsure, say N.
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2018-03-09 22:47:01 +08:00
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config PHY_HISI_INNO_USB2
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2019-11-21 11:19:47 +08:00
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tristate "HiSilicon INNO USB2 PHY support"
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depends on (ARCH_HISI && ARM64) || COMPILE_TEST
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select GENERIC_PHY
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select MFD_SYSCON
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help
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Support for INNO USB2 PHY on HiSilicon SoCs. This Phy supports
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USB 1.5Mb/s, USB 12Mb/s, USB 480Mb/s speeds. It supports one
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USB host port to accept one USB device.
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2018-03-09 22:47:01 +08:00
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2017-05-11 14:47:42 +08:00
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config PHY_HIX5HD2_SATA
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tristate "HIX5HD2 SATA PHY Driver"
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depends on ARCH_HIX5HD2 && OF && HAS_IOMEM
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select GENERIC_PHY
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select MFD_SYSCON
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help
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Support for SATA PHY on Hisilicon hix5hd2 Soc.
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