2012-10-31 20:01:42 +08:00
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/*
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* Copyright (c) 2003-2012 Broadcom Corporation
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* All Rights Reserved
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the Broadcom
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* license below:
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <linux/kernel.h>
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#include <linux/irqreturn.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <asm/mipsregs.h>
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#include <asm/netlogic/interrupt.h>
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#include <asm/netlogic/xlr/fmn.h>
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#include <asm/netlogic/common.h>
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#define COP2_CC_INIT_CPU_DEST(dest, conf) \
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do { \
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nlm_write_c2_cc##dest(0, conf[(dest * 8) + 0]); \
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nlm_write_c2_cc##dest(1, conf[(dest * 8) + 1]); \
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nlm_write_c2_cc##dest(2, conf[(dest * 8) + 2]); \
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nlm_write_c2_cc##dest(3, conf[(dest * 8) + 3]); \
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nlm_write_c2_cc##dest(4, conf[(dest * 8) + 4]); \
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nlm_write_c2_cc##dest(5, conf[(dest * 8) + 5]); \
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nlm_write_c2_cc##dest(6, conf[(dest * 8) + 6]); \
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nlm_write_c2_cc##dest(7, conf[(dest * 8) + 7]); \
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} while (0)
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struct fmn_message_handler {
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void (*action)(int, int, int, int, struct nlm_fmn_msg *, void *);
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void *arg;
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} msg_handlers[128];
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/*
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* FMN interrupt handler. We configure the FMN so that any messages in
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* any of the CPU buckets will trigger an interrupt on the CPU.
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* The message can be from any device on the FMN (like NAE/SAE/DMA).
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* The source station id is used to figure out which of the registered
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* handlers have to be called.
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*/
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static irqreturn_t fmn_message_handler(int irq, void *data)
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{
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struct fmn_message_handler *hndlr;
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int bucket, rv;
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int size = 0, code = 0, src_stnid = 0;
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struct nlm_fmn_msg msg;
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uint32_t mflags, bkt_status;
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2013-06-10 14:30:03 +08:00
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mflags = nlm_cop2_enable_irqsave();
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2012-10-31 20:01:42 +08:00
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/* Disable message ring interrupt */
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nlm_fmn_setup_intr(irq, 0);
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while (1) {
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/* 8 bkts per core, [24:31] each bit represents one bucket
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* Bit is Zero if bucket is not empty */
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2013-06-10 14:30:02 +08:00
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bkt_status = (nlm_read_c2_status0() >> 24) & 0xff;
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2012-10-31 20:01:42 +08:00
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if (bkt_status == 0xff)
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break;
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for (bucket = 0; bucket < 8; bucket++) {
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/* Continue on empty bucket */
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if (bkt_status & (1 << bucket))
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continue;
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rv = nlm_fmn_receive(bucket, &size, &code, &src_stnid,
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&msg);
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if (rv != 0)
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continue;
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hndlr = &msg_handlers[src_stnid];
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if (hndlr->action == NULL)
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pr_warn("No msgring handler for stnid %d\n",
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src_stnid);
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else {
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2013-06-10 14:30:03 +08:00
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nlm_cop2_disable_irqrestore(mflags);
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2012-10-31 20:01:42 +08:00
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hndlr->action(bucket, src_stnid, size, code,
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&msg, hndlr->arg);
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2013-06-10 14:30:03 +08:00
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mflags = nlm_cop2_enable_irqsave();
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2012-10-31 20:01:42 +08:00
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}
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}
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};
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/* Enable message ring intr, to any thread in core */
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nlm_fmn_setup_intr(irq, (1 << nlm_threads_per_core) - 1);
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2013-06-10 14:30:03 +08:00
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nlm_cop2_disable_irqrestore(mflags);
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2012-10-31 20:01:42 +08:00
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return IRQ_HANDLED;
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}
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struct irqaction fmn_irqaction = {
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.handler = fmn_message_handler,
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.flags = IRQF_PERCPU,
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.name = "fmn",
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};
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void xlr_percpu_fmn_init(void)
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{
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struct xlr_fmn_info *cpu_fmn_info;
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int *bucket_sizes;
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uint32_t flags;
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int id;
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BUG_ON(nlm_thread_id() != 0);
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id = nlm_core_id();
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bucket_sizes = xlr_board_fmn_config.bucket_size;
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cpu_fmn_info = &xlr_board_fmn_config.cpu[id];
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2013-06-10 14:30:03 +08:00
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flags = nlm_cop2_enable_irqsave();
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2012-10-31 20:01:42 +08:00
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/* Setup bucket sizes for the core. */
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nlm_write_c2_bucksize(0, bucket_sizes[id * 8 + 0]);
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nlm_write_c2_bucksize(1, bucket_sizes[id * 8 + 1]);
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nlm_write_c2_bucksize(2, bucket_sizes[id * 8 + 2]);
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nlm_write_c2_bucksize(3, bucket_sizes[id * 8 + 3]);
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nlm_write_c2_bucksize(4, bucket_sizes[id * 8 + 4]);
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nlm_write_c2_bucksize(5, bucket_sizes[id * 8 + 5]);
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nlm_write_c2_bucksize(6, bucket_sizes[id * 8 + 6]);
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nlm_write_c2_bucksize(7, bucket_sizes[id * 8 + 7]);
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/*
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* For sending FMN messages, we need credits on the destination
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* bucket. Program the credits this core has on the 128 possible
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* destination buckets.
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* We cannot use a loop here, because the the first argument has
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* to be a constant integer value.
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*/
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COP2_CC_INIT_CPU_DEST(0, cpu_fmn_info->credit_config);
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COP2_CC_INIT_CPU_DEST(1, cpu_fmn_info->credit_config);
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COP2_CC_INIT_CPU_DEST(2, cpu_fmn_info->credit_config);
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COP2_CC_INIT_CPU_DEST(3, cpu_fmn_info->credit_config);
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COP2_CC_INIT_CPU_DEST(4, cpu_fmn_info->credit_config);
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COP2_CC_INIT_CPU_DEST(5, cpu_fmn_info->credit_config);
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COP2_CC_INIT_CPU_DEST(6, cpu_fmn_info->credit_config);
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COP2_CC_INIT_CPU_DEST(7, cpu_fmn_info->credit_config);
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COP2_CC_INIT_CPU_DEST(8, cpu_fmn_info->credit_config);
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COP2_CC_INIT_CPU_DEST(9, cpu_fmn_info->credit_config);
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COP2_CC_INIT_CPU_DEST(10, cpu_fmn_info->credit_config);
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COP2_CC_INIT_CPU_DEST(11, cpu_fmn_info->credit_config);
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COP2_CC_INIT_CPU_DEST(12, cpu_fmn_info->credit_config);
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COP2_CC_INIT_CPU_DEST(13, cpu_fmn_info->credit_config);
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COP2_CC_INIT_CPU_DEST(14, cpu_fmn_info->credit_config);
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COP2_CC_INIT_CPU_DEST(15, cpu_fmn_info->credit_config);
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/* enable FMN interrupts on this CPU */
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nlm_fmn_setup_intr(IRQ_FMN, (1 << nlm_threads_per_core) - 1);
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2013-06-10 14:30:03 +08:00
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nlm_cop2_disable_irqrestore(flags);
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2012-10-31 20:01:42 +08:00
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}
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/*
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* Register a FMN message handler with respect to the source station id
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* @stnid: source station id
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* @action: Handler function pointer
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*/
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int nlm_register_fmn_handler(int start_stnid, int end_stnid,
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void (*action)(int, int, int, int, struct nlm_fmn_msg *, void *),
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void *arg)
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{
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int sstnid;
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for (sstnid = start_stnid; sstnid <= end_stnid; sstnid++) {
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msg_handlers[sstnid].arg = arg;
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smp_wmb();
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msg_handlers[sstnid].action = action;
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}
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pr_debug("Registered FMN msg handler for stnid %d-%d\n",
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start_stnid, end_stnid);
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return 0;
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}
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void nlm_setup_fmn_irq(void)
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{
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uint32_t flags;
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/* setup irq only once */
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setup_irq(IRQ_FMN, &fmn_irqaction);
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2013-06-10 14:30:03 +08:00
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flags = nlm_cop2_enable_irqsave();
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2012-10-31 20:01:42 +08:00
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nlm_fmn_setup_intr(IRQ_FMN, (1 << nlm_threads_per_core) - 1);
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2013-06-10 14:30:03 +08:00
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nlm_cop2_disable_irqrestore(flags);
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2012-10-31 20:01:42 +08:00
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}
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