2011-10-02 15:09:11 +08:00
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/*
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* Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#ifndef __MACH_MX6Q_H__
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#define __MACH_MX6Q_H__
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#define MX6Q_IO_P2V(x) IMX_IO_P2V(x)
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#define MX6Q_IO_ADDRESS(x) IOMEM(MX6Q_IO_P2V(x))
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/*
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* The following are the blocks that need to be statically mapped.
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* For other blocks, the base address really should be retrieved from
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* device tree.
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*/
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#define MX6Q_SCU_BASE_ADDR 0x00a00000
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#define MX6Q_SCU_SIZE 0x1000
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#define MX6Q_CCM_BASE_ADDR 0x020c4000
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#define MX6Q_CCM_SIZE 0x4000
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#define MX6Q_ANATOP_BASE_ADDR 0x020c8000
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#define MX6Q_ANATOP_SIZE 0x1000
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2012-04-27 16:15:45 +08:00
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#define MX6Q_UART2_BASE_ADDR 0x021e8000
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#define MX6Q_UART2_SIZE 0x4000
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2011-10-02 15:09:11 +08:00
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#define MX6Q_UART4_BASE_ADDR 0x021f0000
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#define MX6Q_UART4_SIZE 0x4000
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#endif /* __MACH_MX6Q_H__ */
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