2015-07-03 20:01:34 +08:00
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/*
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* KVM Microsoft Hyper-V emulation
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*
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* derived from arch/x86/kvm/x86.c
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*
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* Copyright (C) 2006 Qumranet, Inc.
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* Copyright (C) 2008 Qumranet, Inc.
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* Copyright IBM Corporation, 2008
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* Copyright 2010 Red Hat, Inc. and/or its affiliates.
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* Copyright (C) 2015 Andrey Smetanin <asmetanin@virtuozzo.com>
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*
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* Authors:
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* Avi Kivity <avi@qumranet.com>
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* Yaniv Kamay <yaniv@qumranet.com>
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* Amit Shah <amit.shah@qumranet.com>
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* Ben-Ami Yassour <benami@il.ibm.com>
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* Andrey Smetanin <asmetanin@virtuozzo.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See
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* the COPYING file in the top-level directory.
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*
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*/
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#include "x86.h"
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#include "lapic.h"
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2015-11-10 20:36:34 +08:00
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#include "ioapic.h"
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2015-07-03 20:01:34 +08:00
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#include "hyperv.h"
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#include <linux/kvm_host.h>
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2015-11-10 20:36:34 +08:00
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#include <asm/apicdef.h>
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2015-07-03 20:01:34 +08:00
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#include <trace/events/kvm.h>
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#include "trace.h"
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2015-11-10 20:36:34 +08:00
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static inline u64 synic_read_sint(struct kvm_vcpu_hv_synic *synic, int sint)
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{
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return atomic64_read(&synic->sint[sint]);
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}
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static inline int synic_get_sint_vector(u64 sint_value)
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{
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if (sint_value & HV_SYNIC_SINT_MASKED)
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return -1;
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return sint_value & HV_SYNIC_SINT_VECTOR_MASK;
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}
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static bool synic_has_vector_connected(struct kvm_vcpu_hv_synic *synic,
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int vector)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
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if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector)
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return true;
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}
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return false;
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}
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static bool synic_has_vector_auto_eoi(struct kvm_vcpu_hv_synic *synic,
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int vector)
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{
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int i;
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u64 sint_value;
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for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
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sint_value = synic_read_sint(synic, i);
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if (synic_get_sint_vector(sint_value) == vector &&
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sint_value & HV_SYNIC_SINT_AUTO_EOI)
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return true;
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}
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return false;
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}
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static int synic_set_sint(struct kvm_vcpu_hv_synic *synic, int sint, u64 data)
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{
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int vector;
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vector = data & HV_SYNIC_SINT_VECTOR_MASK;
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if (vector < 16)
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return 1;
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/*
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* Guest may configure multiple SINTs to use the same vector, so
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* we maintain a bitmap of vectors handled by synic, and a
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* bitmap of vectors with auto-eoi behavior. The bitmaps are
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* updated here, and atomically queried on fast paths.
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*/
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atomic64_set(&synic->sint[sint], data);
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if (synic_has_vector_connected(synic, vector))
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__set_bit(vector, synic->vec_bitmap);
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else
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__clear_bit(vector, synic->vec_bitmap);
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if (synic_has_vector_auto_eoi(synic, vector))
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__set_bit(vector, synic->auto_eoi_bitmap);
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else
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__clear_bit(vector, synic->auto_eoi_bitmap);
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/* Load SynIC vectors into EOI exit bitmap */
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kvm_make_request(KVM_REQ_SCAN_IOAPIC, synic_to_vcpu(synic));
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return 0;
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}
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static struct kvm_vcpu_hv_synic *synic_get(struct kvm *kvm, u32 vcpu_id)
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{
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struct kvm_vcpu *vcpu;
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struct kvm_vcpu_hv_synic *synic;
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if (vcpu_id >= atomic_read(&kvm->online_vcpus))
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return NULL;
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vcpu = kvm_get_vcpu(kvm, vcpu_id);
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if (!vcpu)
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return NULL;
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synic = vcpu_to_synic(vcpu);
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return (synic->active) ? synic : NULL;
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}
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static void kvm_hv_notify_acked_sint(struct kvm_vcpu *vcpu, u32 sint)
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{
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struct kvm *kvm = vcpu->kvm;
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int gsi, idx;
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vcpu_debug(vcpu, "Hyper-V SynIC acked sint %d\n", sint);
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idx = srcu_read_lock(&kvm->irq_srcu);
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gsi = atomic_read(&vcpu_to_synic(vcpu)->sint_to_gsi[sint]);
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if (gsi != -1)
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kvm_notify_acked_gsi(kvm, gsi);
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srcu_read_unlock(&kvm->irq_srcu, idx);
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}
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2015-11-10 20:36:35 +08:00
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static void synic_exit(struct kvm_vcpu_hv_synic *synic, u32 msr)
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{
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struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
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struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv;
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hv_vcpu->exit.type = KVM_EXIT_HYPERV_SYNIC;
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hv_vcpu->exit.u.synic.msr = msr;
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hv_vcpu->exit.u.synic.control = synic->control;
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hv_vcpu->exit.u.synic.evt_page = synic->evt_page;
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hv_vcpu->exit.u.synic.msg_page = synic->msg_page;
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kvm_make_request(KVM_REQ_HV_EXIT, vcpu);
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}
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2015-11-10 20:36:34 +08:00
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static int synic_set_msr(struct kvm_vcpu_hv_synic *synic,
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u32 msr, u64 data, bool host)
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{
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struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
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int ret;
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if (!synic->active)
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return 1;
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vcpu_debug(vcpu, "Hyper-V SynIC set msr 0x%x 0x%llx host %d\n",
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msr, data, host);
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ret = 0;
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switch (msr) {
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case HV_X64_MSR_SCONTROL:
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synic->control = data;
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2015-11-10 20:36:35 +08:00
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if (!host)
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synic_exit(synic, msr);
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2015-11-10 20:36:34 +08:00
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break;
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case HV_X64_MSR_SVERSION:
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if (!host) {
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ret = 1;
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break;
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}
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synic->version = data;
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break;
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case HV_X64_MSR_SIEFP:
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if (data & HV_SYNIC_SIEFP_ENABLE)
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if (kvm_clear_guest(vcpu->kvm,
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data & PAGE_MASK, PAGE_SIZE)) {
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ret = 1;
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break;
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}
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synic->evt_page = data;
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2015-11-10 20:36:35 +08:00
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if (!host)
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synic_exit(synic, msr);
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2015-11-10 20:36:34 +08:00
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break;
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case HV_X64_MSR_SIMP:
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if (data & HV_SYNIC_SIMP_ENABLE)
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if (kvm_clear_guest(vcpu->kvm,
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data & PAGE_MASK, PAGE_SIZE)) {
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ret = 1;
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break;
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}
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synic->msg_page = data;
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2015-11-10 20:36:35 +08:00
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if (!host)
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synic_exit(synic, msr);
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2015-11-10 20:36:34 +08:00
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break;
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case HV_X64_MSR_EOM: {
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int i;
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for (i = 0; i < ARRAY_SIZE(synic->sint); i++)
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kvm_hv_notify_acked_sint(vcpu, i);
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break;
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}
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case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
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ret = synic_set_sint(synic, msr - HV_X64_MSR_SINT0, data);
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break;
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default:
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ret = 1;
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break;
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}
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return ret;
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}
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static int synic_get_msr(struct kvm_vcpu_hv_synic *synic, u32 msr, u64 *pdata)
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{
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int ret;
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if (!synic->active)
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return 1;
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ret = 0;
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switch (msr) {
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case HV_X64_MSR_SCONTROL:
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*pdata = synic->control;
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break;
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case HV_X64_MSR_SVERSION:
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*pdata = synic->version;
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break;
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case HV_X64_MSR_SIEFP:
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*pdata = synic->evt_page;
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break;
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case HV_X64_MSR_SIMP:
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*pdata = synic->msg_page;
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break;
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case HV_X64_MSR_EOM:
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*pdata = 0;
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break;
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case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
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*pdata = atomic64_read(&synic->sint[msr - HV_X64_MSR_SINT0]);
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break;
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default:
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ret = 1;
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break;
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}
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return ret;
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}
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int synic_set_irq(struct kvm_vcpu_hv_synic *synic, u32 sint)
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{
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struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
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struct kvm_lapic_irq irq;
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int ret, vector;
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if (sint >= ARRAY_SIZE(synic->sint))
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return -EINVAL;
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vector = synic_get_sint_vector(synic_read_sint(synic, sint));
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if (vector < 0)
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return -ENOENT;
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memset(&irq, 0, sizeof(irq));
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irq.dest_id = kvm_apic_id(vcpu->arch.apic);
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irq.dest_mode = APIC_DEST_PHYSICAL;
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irq.delivery_mode = APIC_DM_FIXED;
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irq.vector = vector;
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irq.level = 1;
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ret = kvm_irq_delivery_to_apic(vcpu->kvm, NULL, &irq, NULL);
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vcpu_debug(vcpu, "Hyper-V SynIC set irq ret %d\n", ret);
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return ret;
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}
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int kvm_hv_synic_set_irq(struct kvm *kvm, u32 vcpu_id, u32 sint)
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{
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struct kvm_vcpu_hv_synic *synic;
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synic = synic_get(kvm, vcpu_id);
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if (!synic)
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return -EINVAL;
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return synic_set_irq(synic, sint);
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}
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void kvm_hv_synic_send_eoi(struct kvm_vcpu *vcpu, int vector)
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{
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struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
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int i;
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vcpu_debug(vcpu, "Hyper-V SynIC send eoi vec %d\n", vector);
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for (i = 0; i < ARRAY_SIZE(synic->sint); i++)
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if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector)
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kvm_hv_notify_acked_sint(vcpu, i);
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}
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static int kvm_hv_set_sint_gsi(struct kvm *kvm, u32 vcpu_id, u32 sint, int gsi)
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{
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struct kvm_vcpu_hv_synic *synic;
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synic = synic_get(kvm, vcpu_id);
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if (!synic)
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return -EINVAL;
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if (sint >= ARRAY_SIZE(synic->sint_to_gsi))
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return -EINVAL;
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atomic_set(&synic->sint_to_gsi[sint], gsi);
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return 0;
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}
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void kvm_hv_irq_routing_update(struct kvm *kvm)
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{
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struct kvm_irq_routing_table *irq_rt;
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struct kvm_kernel_irq_routing_entry *e;
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u32 gsi;
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irq_rt = srcu_dereference_check(kvm->irq_routing, &kvm->irq_srcu,
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lockdep_is_held(&kvm->irq_lock));
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for (gsi = 0; gsi < irq_rt->nr_rt_entries; gsi++) {
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hlist_for_each_entry(e, &irq_rt->map[gsi], link) {
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if (e->type == KVM_IRQ_ROUTING_HV_SINT)
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kvm_hv_set_sint_gsi(kvm, e->hv_sint.vcpu,
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e->hv_sint.sint, gsi);
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}
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}
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}
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static void synic_init(struct kvm_vcpu_hv_synic *synic)
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{
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int i;
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memset(synic, 0, sizeof(*synic));
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synic->version = HV_SYNIC_VERSION_1;
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for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
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atomic64_set(&synic->sint[i], HV_SYNIC_SINT_MASKED);
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atomic_set(&synic->sint_to_gsi[i], -1);
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}
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}
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2015-12-01 00:22:19 +08:00
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static u64 get_time_ref_counter(struct kvm *kvm)
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{
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return div_u64(get_kernel_ns() + kvm->arch.kvmclock_offset, 100);
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}
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2015-11-10 20:36:34 +08:00
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void kvm_hv_vcpu_init(struct kvm_vcpu *vcpu)
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|
{
|
|
|
|
synic_init(vcpu_to_synic(vcpu));
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_hv_activate_synic(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Hyper-V SynIC auto EOI SINT's are
|
|
|
|
* not compatible with APICV, so deactivate APICV
|
|
|
|
*/
|
|
|
|
kvm_vcpu_deactivate_apicv(vcpu);
|
|
|
|
vcpu_to_synic(vcpu)->active = true;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-07-03 20:01:34 +08:00
|
|
|
static bool kvm_hv_msr_partition_wide(u32 msr)
|
|
|
|
{
|
|
|
|
bool r = false;
|
|
|
|
|
|
|
|
switch (msr) {
|
|
|
|
case HV_X64_MSR_GUEST_OS_ID:
|
|
|
|
case HV_X64_MSR_HYPERCALL:
|
|
|
|
case HV_X64_MSR_REFERENCE_TSC:
|
|
|
|
case HV_X64_MSR_TIME_REF_COUNT:
|
2015-07-03 20:01:37 +08:00
|
|
|
case HV_X64_MSR_CRASH_CTL:
|
|
|
|
case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
|
2015-09-16 17:29:48 +08:00
|
|
|
case HV_X64_MSR_RESET:
|
2015-07-03 20:01:34 +08:00
|
|
|
r = true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
2015-07-03 20:01:37 +08:00
|
|
|
static int kvm_hv_msr_get_crash_data(struct kvm_vcpu *vcpu,
|
|
|
|
u32 index, u64 *pdata)
|
|
|
|
{
|
|
|
|
struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
|
|
|
|
|
|
|
|
if (WARN_ON_ONCE(index >= ARRAY_SIZE(hv->hv_crash_param)))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
*pdata = hv->hv_crash_param[index];
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kvm_hv_msr_get_crash_ctl(struct kvm_vcpu *vcpu, u64 *pdata)
|
|
|
|
{
|
|
|
|
struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
|
|
|
|
|
|
|
|
*pdata = hv->hv_crash_ctl;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kvm_hv_msr_set_crash_ctl(struct kvm_vcpu *vcpu, u64 data, bool host)
|
|
|
|
{
|
|
|
|
struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
|
|
|
|
|
|
|
|
if (host)
|
|
|
|
hv->hv_crash_ctl = data & HV_X64_MSR_CRASH_CTL_NOTIFY;
|
|
|
|
|
|
|
|
if (!host && (data & HV_X64_MSR_CRASH_CTL_NOTIFY)) {
|
|
|
|
|
|
|
|
vcpu_debug(vcpu, "hv crash (0x%llx 0x%llx 0x%llx 0x%llx 0x%llx)\n",
|
|
|
|
hv->hv_crash_param[0],
|
|
|
|
hv->hv_crash_param[1],
|
|
|
|
hv->hv_crash_param[2],
|
|
|
|
hv->hv_crash_param[3],
|
|
|
|
hv->hv_crash_param[4]);
|
|
|
|
|
|
|
|
/* Send notification about crash to user space */
|
|
|
|
kvm_make_request(KVM_REQ_HV_CRASH, vcpu);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kvm_hv_msr_set_crash_data(struct kvm_vcpu *vcpu,
|
|
|
|
u32 index, u64 data)
|
|
|
|
{
|
|
|
|
struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
|
|
|
|
|
|
|
|
if (WARN_ON_ONCE(index >= ARRAY_SIZE(hv->hv_crash_param)))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
hv->hv_crash_param[index] = data;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kvm_hv_set_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data,
|
|
|
|
bool host)
|
2015-07-03 20:01:34 +08:00
|
|
|
{
|
|
|
|
struct kvm *kvm = vcpu->kvm;
|
|
|
|
struct kvm_hv *hv = &kvm->arch.hyperv;
|
|
|
|
|
|
|
|
switch (msr) {
|
|
|
|
case HV_X64_MSR_GUEST_OS_ID:
|
|
|
|
hv->hv_guest_os_id = data;
|
|
|
|
/* setting guest os id to zero disables hypercall page */
|
|
|
|
if (!hv->hv_guest_os_id)
|
|
|
|
hv->hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
|
|
|
|
break;
|
|
|
|
case HV_X64_MSR_HYPERCALL: {
|
|
|
|
u64 gfn;
|
|
|
|
unsigned long addr;
|
|
|
|
u8 instructions[4];
|
|
|
|
|
|
|
|
/* if guest os id is not set hypercall should remain disabled */
|
|
|
|
if (!hv->hv_guest_os_id)
|
|
|
|
break;
|
|
|
|
if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
|
|
|
|
hv->hv_hypercall = data;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
|
|
|
|
addr = gfn_to_hva(kvm, gfn);
|
|
|
|
if (kvm_is_error_hva(addr))
|
|
|
|
return 1;
|
|
|
|
kvm_x86_ops->patch_hypercall(vcpu, instructions);
|
|
|
|
((unsigned char *)instructions)[3] = 0xc3; /* ret */
|
|
|
|
if (__copy_to_user((void __user *)addr, instructions, 4))
|
|
|
|
return 1;
|
|
|
|
hv->hv_hypercall = data;
|
|
|
|
mark_page_dirty(kvm, gfn);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case HV_X64_MSR_REFERENCE_TSC: {
|
|
|
|
u64 gfn;
|
|
|
|
HV_REFERENCE_TSC_PAGE tsc_ref;
|
|
|
|
|
|
|
|
memset(&tsc_ref, 0, sizeof(tsc_ref));
|
|
|
|
hv->hv_tsc_page = data;
|
|
|
|
if (!(data & HV_X64_MSR_TSC_REFERENCE_ENABLE))
|
|
|
|
break;
|
|
|
|
gfn = data >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
|
|
|
|
if (kvm_write_guest(
|
|
|
|
kvm,
|
|
|
|
gfn << HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT,
|
|
|
|
&tsc_ref, sizeof(tsc_ref)))
|
|
|
|
return 1;
|
|
|
|
mark_page_dirty(kvm, gfn);
|
|
|
|
break;
|
|
|
|
}
|
2015-07-03 20:01:37 +08:00
|
|
|
case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
|
|
|
|
return kvm_hv_msr_set_crash_data(vcpu,
|
|
|
|
msr - HV_X64_MSR_CRASH_P0,
|
|
|
|
data);
|
|
|
|
case HV_X64_MSR_CRASH_CTL:
|
|
|
|
return kvm_hv_msr_set_crash_ctl(vcpu, data, host);
|
2015-09-16 17:29:48 +08:00
|
|
|
case HV_X64_MSR_RESET:
|
|
|
|
if (data == 1) {
|
|
|
|
vcpu_debug(vcpu, "hyper-v reset requested\n");
|
|
|
|
kvm_make_request(KVM_REQ_HV_RESET, vcpu);
|
|
|
|
}
|
|
|
|
break;
|
2015-07-03 20:01:34 +08:00
|
|
|
default:
|
|
|
|
vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n",
|
|
|
|
msr, data);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-09-16 17:29:50 +08:00
|
|
|
/* Calculate cpu time spent by current task in 100ns units */
|
|
|
|
static u64 current_task_runtime_100ns(void)
|
|
|
|
{
|
|
|
|
cputime_t utime, stime;
|
|
|
|
|
|
|
|
task_cputime_adjusted(current, &utime, &stime);
|
|
|
|
return div_u64(cputime_to_nsecs(utime + stime), 100);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kvm_hv_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)
|
2015-07-03 20:01:34 +08:00
|
|
|
{
|
|
|
|
struct kvm_vcpu_hv *hv = &vcpu->arch.hyperv;
|
|
|
|
|
|
|
|
switch (msr) {
|
|
|
|
case HV_X64_MSR_APIC_ASSIST_PAGE: {
|
|
|
|
u64 gfn;
|
|
|
|
unsigned long addr;
|
|
|
|
|
|
|
|
if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
|
|
|
|
hv->hv_vapic = data;
|
|
|
|
if (kvm_lapic_enable_pv_eoi(vcpu, 0))
|
|
|
|
return 1;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
gfn = data >> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT;
|
|
|
|
addr = kvm_vcpu_gfn_to_hva(vcpu, gfn);
|
|
|
|
if (kvm_is_error_hva(addr))
|
|
|
|
return 1;
|
|
|
|
if (__clear_user((void __user *)addr, PAGE_SIZE))
|
|
|
|
return 1;
|
|
|
|
hv->hv_vapic = data;
|
|
|
|
kvm_vcpu_mark_page_dirty(vcpu, gfn);
|
|
|
|
if (kvm_lapic_enable_pv_eoi(vcpu,
|
|
|
|
gfn_to_gpa(gfn) | KVM_MSR_ENABLED))
|
|
|
|
return 1;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case HV_X64_MSR_EOI:
|
|
|
|
return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
|
|
|
|
case HV_X64_MSR_ICR:
|
|
|
|
return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
|
|
|
|
case HV_X64_MSR_TPR:
|
|
|
|
return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
|
2015-09-16 17:29:50 +08:00
|
|
|
case HV_X64_MSR_VP_RUNTIME:
|
|
|
|
if (!host)
|
|
|
|
return 1;
|
|
|
|
hv->runtime_offset = data - current_task_runtime_100ns();
|
|
|
|
break;
|
2015-11-10 20:36:34 +08:00
|
|
|
case HV_X64_MSR_SCONTROL:
|
|
|
|
case HV_X64_MSR_SVERSION:
|
|
|
|
case HV_X64_MSR_SIEFP:
|
|
|
|
case HV_X64_MSR_SIMP:
|
|
|
|
case HV_X64_MSR_EOM:
|
|
|
|
case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
|
|
|
|
return synic_set_msr(vcpu_to_synic(vcpu), msr, data, host);
|
2015-07-03 20:01:34 +08:00
|
|
|
default:
|
|
|
|
vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n",
|
|
|
|
msr, data);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kvm_hv_get_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
|
|
|
|
{
|
|
|
|
u64 data = 0;
|
|
|
|
struct kvm *kvm = vcpu->kvm;
|
|
|
|
struct kvm_hv *hv = &kvm->arch.hyperv;
|
|
|
|
|
|
|
|
switch (msr) {
|
|
|
|
case HV_X64_MSR_GUEST_OS_ID:
|
|
|
|
data = hv->hv_guest_os_id;
|
|
|
|
break;
|
|
|
|
case HV_X64_MSR_HYPERCALL:
|
|
|
|
data = hv->hv_hypercall;
|
|
|
|
break;
|
2015-12-01 00:22:19 +08:00
|
|
|
case HV_X64_MSR_TIME_REF_COUNT:
|
|
|
|
data = get_time_ref_counter(kvm);
|
2015-07-03 20:01:34 +08:00
|
|
|
break;
|
|
|
|
case HV_X64_MSR_REFERENCE_TSC:
|
|
|
|
data = hv->hv_tsc_page;
|
|
|
|
break;
|
2015-07-03 20:01:37 +08:00
|
|
|
case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
|
|
|
|
return kvm_hv_msr_get_crash_data(vcpu,
|
|
|
|
msr - HV_X64_MSR_CRASH_P0,
|
|
|
|
pdata);
|
|
|
|
case HV_X64_MSR_CRASH_CTL:
|
|
|
|
return kvm_hv_msr_get_crash_ctl(vcpu, pdata);
|
2015-09-16 17:29:48 +08:00
|
|
|
case HV_X64_MSR_RESET:
|
|
|
|
data = 0;
|
|
|
|
break;
|
2015-07-03 20:01:34 +08:00
|
|
|
default:
|
|
|
|
vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
*pdata = data;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
|
|
|
|
{
|
|
|
|
u64 data = 0;
|
|
|
|
struct kvm_vcpu_hv *hv = &vcpu->arch.hyperv;
|
|
|
|
|
|
|
|
switch (msr) {
|
|
|
|
case HV_X64_MSR_VP_INDEX: {
|
|
|
|
int r;
|
|
|
|
struct kvm_vcpu *v;
|
|
|
|
|
|
|
|
kvm_for_each_vcpu(r, v, vcpu->kvm) {
|
|
|
|
if (v == vcpu) {
|
|
|
|
data = r;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case HV_X64_MSR_EOI:
|
|
|
|
return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
|
|
|
|
case HV_X64_MSR_ICR:
|
|
|
|
return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
|
|
|
|
case HV_X64_MSR_TPR:
|
|
|
|
return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
|
|
|
|
case HV_X64_MSR_APIC_ASSIST_PAGE:
|
|
|
|
data = hv->hv_vapic;
|
|
|
|
break;
|
2015-09-16 17:29:50 +08:00
|
|
|
case HV_X64_MSR_VP_RUNTIME:
|
|
|
|
data = current_task_runtime_100ns() + hv->runtime_offset;
|
|
|
|
break;
|
2015-11-10 20:36:34 +08:00
|
|
|
case HV_X64_MSR_SCONTROL:
|
|
|
|
case HV_X64_MSR_SVERSION:
|
|
|
|
case HV_X64_MSR_SIEFP:
|
|
|
|
case HV_X64_MSR_SIMP:
|
|
|
|
case HV_X64_MSR_EOM:
|
|
|
|
case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
|
|
|
|
return synic_get_msr(vcpu_to_synic(vcpu), msr, pdata);
|
2015-07-03 20:01:34 +08:00
|
|
|
default:
|
|
|
|
vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
*pdata = data;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-07-03 20:01:37 +08:00
|
|
|
int kvm_hv_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)
|
2015-07-03 20:01:34 +08:00
|
|
|
{
|
|
|
|
if (kvm_hv_msr_partition_wide(msr)) {
|
|
|
|
int r;
|
|
|
|
|
|
|
|
mutex_lock(&vcpu->kvm->lock);
|
2015-07-03 20:01:37 +08:00
|
|
|
r = kvm_hv_set_msr_pw(vcpu, msr, data, host);
|
2015-07-03 20:01:34 +08:00
|
|
|
mutex_unlock(&vcpu->kvm->lock);
|
|
|
|
return r;
|
|
|
|
} else
|
2015-09-16 17:29:50 +08:00
|
|
|
return kvm_hv_set_msr(vcpu, msr, data, host);
|
2015-07-03 20:01:34 +08:00
|
|
|
}
|
|
|
|
|
|
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int kvm_hv_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
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{
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if (kvm_hv_msr_partition_wide(msr)) {
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int r;
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mutex_lock(&vcpu->kvm->lock);
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r = kvm_hv_get_msr_pw(vcpu, msr, pdata);
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mutex_unlock(&vcpu->kvm->lock);
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return r;
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} else
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return kvm_hv_get_msr(vcpu, msr, pdata);
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}
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bool kvm_hv_hypercall_enabled(struct kvm *kvm)
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{
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return kvm->arch.hyperv.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
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}
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int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
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{
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u64 param, ingpa, outgpa, ret;
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uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
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bool fast, longmode;
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/*
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* hypercall generates UD from non zero cpl and real mode
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* per HYPER-V spec
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*/
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if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
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kvm_queue_exception(vcpu, UD_VECTOR);
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return 0;
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}
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longmode = is_64_bit_mode(vcpu);
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if (!longmode) {
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param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
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(kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
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ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
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(kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
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outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
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(kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
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}
|
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#ifdef CONFIG_X86_64
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else {
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param = kvm_register_read(vcpu, VCPU_REGS_RCX);
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|
ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
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|
outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
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}
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#endif
|
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code = param & 0xffff;
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|
fast = (param >> 16) & 0x1;
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|
rep_cnt = (param >> 32) & 0xfff;
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|
|
|
rep_idx = (param >> 48) & 0xfff;
|
|
|
|
|
|
|
|
trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
|
|
|
|
|
|
|
|
switch (code) {
|
|
|
|
case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
|
|
|
|
kvm_vcpu_on_spin(vcpu);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
res = HV_STATUS_INVALID_HYPERCALL_CODE;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = res | (((u64)rep_done & 0xfff) << 32);
|
|
|
|
if (longmode) {
|
|
|
|
kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
|
|
|
|
} else {
|
|
|
|
kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
|
|
|
|
kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|