2017-05-16 23:46:48 +08:00
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/*
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* cros_ec_lpc_reg - LPC access to the Chrome OS Embedded Controller
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*
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* Copyright (C) 2016 Google, Inc
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* This driver uses the Chrome OS EC byte-level message-based protocol for
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* communicating the keyboard state (which keys are pressed) from a keyboard EC
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* to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing,
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* but everything else (including deghosting) is done here. The main
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* motivation for this is to keep the EC firmware as simple as possible, since
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* it cannot be easily upgraded and EC flash/IRAM space is relatively
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* expensive.
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*/
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#ifndef __LINUX_MFD_CROS_EC_REG_H
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#define __LINUX_MFD_CROS_EC_REG_H
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/**
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* cros_ec_lpc_read_bytes - Read bytes from a given LPC-mapped address.
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* Returns 8-bit checksum of all bytes read.
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*
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* @offset: Base read address
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* @length: Number of bytes to read
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* @dest: Destination buffer
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*/
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u8 cros_ec_lpc_read_bytes(unsigned int offset, unsigned int length, u8 *dest);
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/**
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* cros_ec_lpc_write_bytes - Write bytes to a given LPC-mapped address.
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* Returns 8-bit checksum of all bytes written.
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*
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* @offset: Base write address
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* @length: Number of bytes to write
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* @msg: Write data buffer
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*/
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u8 cros_ec_lpc_write_bytes(unsigned int offset, unsigned int length, u8 *msg);
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2017-05-16 23:46:48 +08:00
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/**
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* cros_ec_lpc_reg_init
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*
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* Initialize register I/O.
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*/
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void cros_ec_lpc_reg_init(void);
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/**
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* cros_ec_lpc_reg_destroy
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*
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* Cleanup reg I/O.
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*/
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void cros_ec_lpc_reg_destroy(void);
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2017-05-16 23:46:48 +08:00
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#endif /* __LINUX_MFD_CROS_EC_REG_H */
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