2018-04-20 22:49:46 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_S390_NOSPEC_ASM_H
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#define _ASM_S390_NOSPEC_ASM_H
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2018-04-26 00:35:26 +08:00
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#include <asm/alternative-asm.h>
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#include <asm/asm-offsets.h>
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2018-04-20 22:49:46 +08:00
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#include <asm/dwarf.h>
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#ifdef __ASSEMBLY__
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2018-06-15 16:22:18 +08:00
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#ifdef CC_USING_EXPOLINE
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2018-04-20 22:49:46 +08:00
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2018-04-26 00:35:26 +08:00
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_LC_BR_R1 = __LC_BR_R1
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2018-04-20 22:49:46 +08:00
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/*
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* The expoline macros are used to create thunks in the same format
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* as gcc generates them. The 'comdat' section flag makes sure that
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* the various thunks are merged into a single copy.
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*/
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.macro __THUNK_PROLOG_NAME name
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.pushsection .text.\name,"axG",@progbits,\name,comdat
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.globl \name
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.hidden \name
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.type \name,@function
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\name:
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CFI_STARTPROC
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.endm
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.macro __THUNK_EPILOG
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CFI_ENDPROC
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.popsection
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.endm
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.macro __THUNK_PROLOG_BR r1,r2
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2019-02-01 23:33:37 +08:00
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__THUNK_PROLOG_NAME __s390_indirect_jump_r\r2\()use_r\r1
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2018-04-20 22:49:46 +08:00
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.endm
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2018-04-24 21:32:08 +08:00
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.macro __THUNK_PROLOG_BC d0,r1,r2
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2019-02-01 23:33:37 +08:00
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__THUNK_PROLOG_NAME __s390_indirect_branch_\d0\()_\r2\()use_\r1
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2018-04-24 21:32:08 +08:00
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.endm
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2018-04-20 22:49:46 +08:00
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.macro __THUNK_BR r1,r2
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2019-02-01 23:33:37 +08:00
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jg __s390_indirect_jump_r\r2\()use_r\r1
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2018-04-20 22:49:46 +08:00
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.endm
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2018-04-24 21:32:08 +08:00
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.macro __THUNK_BC d0,r1,r2
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2019-02-01 23:33:37 +08:00
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jg __s390_indirect_branch_\d0\()_\r2\()use_\r1
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2018-04-24 21:32:08 +08:00
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.endm
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2018-04-20 22:49:46 +08:00
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.macro __THUNK_BRASL r1,r2,r3
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brasl \r1,__s390_indirect_jump_r\r3\()use_r\r2
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2018-04-20 22:49:46 +08:00
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.endm
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.macro __DECODE_RR expand,reg,ruse
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.set __decode_fail,1
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.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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.ifc \reg,%r\r1
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.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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.ifc \ruse,%r\r2
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\expand \r1,\r2
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.set __decode_fail,0
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.endif
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.endr
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.endif
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.endr
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.if __decode_fail == 1
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.error "__DECODE_RR failed"
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.endif
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.endm
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.macro __DECODE_RRR expand,rsave,rtarget,ruse
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.set __decode_fail,1
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.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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.ifc \rsave,%r\r1
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.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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.ifc \rtarget,%r\r2
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.irp r3,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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.ifc \ruse,%r\r3
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\expand \r1,\r2,\r3
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.set __decode_fail,0
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.endif
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.endr
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.endif
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.endr
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.endif
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.endr
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.if __decode_fail == 1
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.error "__DECODE_RRR failed"
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.endif
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.endm
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2018-04-24 21:32:08 +08:00
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.macro __DECODE_DRR expand,disp,reg,ruse
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.set __decode_fail,1
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.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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.ifc \reg,%r\r1
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.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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.ifc \ruse,%r\r2
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\expand \disp,\r1,\r2
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.set __decode_fail,0
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.endif
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.endr
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.endif
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.endr
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.if __decode_fail == 1
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.error "__DECODE_DRR failed"
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.endif
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.endm
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2018-04-20 22:49:46 +08:00
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.macro __THUNK_EX_BR reg,ruse
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2018-04-26 00:35:26 +08:00
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# Be very careful when adding instructions to this macro!
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# The ALTERNATIVE replacement code has a .+10 which targets
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# the "br \reg" after the code has been patched.
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2018-04-20 22:49:46 +08:00
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#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
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exrl 0,555f
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j .
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#else
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2018-04-26 00:35:26 +08:00
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.ifc \reg,%r1
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ALTERNATIVE "ex %r0,_LC_BR_R1", ".insn ril,0xc60000000000,0,.+10", 35
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j .
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.else
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2018-04-20 22:49:46 +08:00
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larl \ruse,555f
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ex 0,0(\ruse)
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j .
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2018-04-26 00:35:26 +08:00
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.endif
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2018-04-20 22:49:46 +08:00
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#endif
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555: br \reg
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.endm
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2018-04-24 21:32:08 +08:00
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.macro __THUNK_EX_BC disp,reg,ruse
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#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
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exrl 0,556f
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j .
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#else
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larl \ruse,556f
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ex 0,0(\ruse)
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j .
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#endif
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556: b \disp(\reg)
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.endm
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2018-04-20 22:49:46 +08:00
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.macro GEN_BR_THUNK reg,ruse=%r1
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__DECODE_RR __THUNK_PROLOG_BR,\reg,\ruse
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__THUNK_EX_BR \reg,\ruse
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__THUNK_EPILOG
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.endm
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2018-04-24 21:32:08 +08:00
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.macro GEN_B_THUNK disp,reg,ruse=%r1
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__DECODE_DRR __THUNK_PROLOG_BC,\disp,\reg,\ruse
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__THUNK_EX_BC \disp,\reg,\ruse
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__THUNK_EPILOG
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.endm
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2018-04-20 22:49:46 +08:00
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.macro BR_EX reg,ruse=%r1
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557: __DECODE_RR __THUNK_BR,\reg,\ruse
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.pushsection .s390_indirect_branches,"a",@progbits
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.long 557b-.
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.popsection
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2018-04-24 21:32:08 +08:00
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.endm
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.macro B_EX disp,reg,ruse=%r1
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558: __DECODE_DRR __THUNK_BC,\disp,\reg,\ruse
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.pushsection .s390_indirect_branches,"a",@progbits
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.long 558b-.
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.popsection
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2018-04-20 22:49:46 +08:00
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.endm
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.macro BASR_EX rsave,rtarget,ruse=%r1
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559: __DECODE_RRR __THUNK_BRASL,\rsave,\rtarget,\ruse
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.pushsection .s390_indirect_branches,"a",@progbits
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.long 559b-.
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.popsection
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.endm
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#else
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.macro GEN_BR_THUNK reg,ruse=%r1
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2018-04-24 21:32:08 +08:00
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.endm
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.macro GEN_B_THUNK disp,reg,ruse=%r1
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2018-04-20 22:49:46 +08:00
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.endm
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.macro BR_EX reg,ruse=%r1
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br \reg
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.endm
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.macro B_EX disp,reg,ruse=%r1
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b \disp(\reg)
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2018-04-20 22:49:46 +08:00
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.endm
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.macro BASR_EX rsave,rtarget,ruse=%r1
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basr \rsave,\rtarget
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.endm
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2018-06-15 16:22:18 +08:00
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#endif /* CC_USING_EXPOLINE */
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2018-04-20 22:49:46 +08:00
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_S390_NOSPEC_ASM_H */
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