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OpenCloudOS-Kernel/arch/arm/mach-sti/board-dt.c

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ARM: sti: Add STiH415 SOC support The STiH415 is the next generation of HD, AVC set-top box processors for satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9 1.0 GHz, dual-core CPU. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25 19:15:10 +08:00
/*
* Copyright (C) 2013 STMicroelectronics (R&D) Limited.
* Author(s): Srinivas Kandagatla <srinivas.kandagatla@st.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/irq.h>
ARM: sti: remove custom .init_time hook With arch/arm calling of_clk_init(NULL) from time_init(), we can now remove custom .init_time hooks. To get rid of it, move l2cc init to .init_machine hook instead. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
2013-08-27 21:23:07 +08:00
#include <linux/of_platform.h>
ARM: sti: Add STiH415 SOC support The STiH415 is the next generation of HD, AVC set-top box processors for satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9 1.0 GHz, dual-core CPU. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25 19:15:10 +08:00
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/arch.h>
#include "smp.h"
ARM: appropriate __init annotation for const data Init data marked const should be annotated with __initconst for correctness and not __initdata. In some cases the array gathering references to that data has to be marked const as well. This fixes LTO builds that otherwise fail with section mismatch errors. Signed-off-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-28 06:27:52 +08:00
static const char *const stih41x_dt_match[] __initconst = {
ARM: sti: Add STiH415 SOC support The STiH415 is the next generation of HD, AVC set-top box processors for satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9 1.0 GHz, dual-core CPU. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25 19:15:10 +08:00
"st,stih415",
ARM: sti: Add STiH416 SOC support The STiH416 is advanced HD AVC processor with 3D graphics acceleration and 1.2-GHz ARM Cortex-A9 SMP CPU. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25 19:15:23 +08:00
"st,stih416",
ARM: STi: Add STiH407 SoC support This patch adds support to STiH407 SoC. Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-02-27 20:17:27 +08:00
"st,stih407",
ARM: STi: Add STiH410 SoC support This patch adds support to STiH410 SoC. Please note "st,stih410" is already present in device tree. The problem is that it is missing the entry in the match table, and so the L2 cache and other cpus than 0 don't get initialized. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Tested-by: Maxime Coquelin <maxime.coquelin@st.com> Acked-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-03-05 23:53:54 +08:00
"st,stih410",
ARM: STi: Add STiH418 SoC support This patch adds support to STiH418 SoC. Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-01-09 23:11:00 +08:00
"st,stih418",
ARM: sti: Add STiH415 SOC support The STiH415 is the next generation of HD, AVC set-top box processors for satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9 1.0 GHz, dual-core CPU. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25 19:15:10 +08:00
NULL
};
ARM: sti: Implement dummy L2 cache's write_sec This patch implements the write_sec callback that handle PL310 secure registers writes. This callback is just a stub for now, to avoid system crash. Later, it could handle SMC calls so that TZ handles the needed writes. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2016-06-28 17:21:52 +08:00
static void sti_l2_write_sec(unsigned long val, unsigned reg)
{
/*
* We can't write to secure registers as we are in non-secure
* mode, until we have some SMI service available.
*/
}
ARM: STi: Update machine _namestr to be more generic. This string is used by dump_stack and as we now support more SoC's than just STiH415/6 it is misleading to have the current string in the stack trace. This patch updates it to be more generic for the STi family of SoCs. So instead of looking like this [ 271.672555] Hardware name: STiH415/416 SoC with Flattened Device Tree [ 271.678998] [<c0310490>] (unwind_backtrace) from [<c030bb54>] (show_stack+0x10/0x14) [ 271.686746] [<c030bb54>] (show_stack) from [<c058bc4c>] (dump_stack+0x98/0xac) [snip] it now looks like this: [ 2.669879] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.6.0-rc3-00026-g38a1ce6-dirty #76 [ 2.677973] Hardware name: STi SoC with Flattened Device Tree [ 2.683723] [<c0310490>] (unwind_backtrace) from [<c030bb54>] (show_stack+0x10/0x14) [ 2.691472] [<c030bb54>] (show_stack) from [<c058bc0c>] (dump_stack+0x98/0xac) [snip] Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Patrice Chotard <patrice.chotard@st.com>
2016-05-12 00:40:00 +08:00
DT_MACHINE_START(STM, "STi SoC with Flattened Device Tree")
ARM: sti: Add STiH415 SOC support The STiH415 is the next generation of HD, AVC set-top box processors for satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9 1.0 GHz, dual-core CPU. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25 19:15:10 +08:00
.dt_compat = stih41x_dt_match,
ARM: l2c: sti: convert to generic l2c OF initialisation Remove the explicit call to l2x0_of_init(), converting to the generic infrastructure instead. We can remove the .init_machine as it becomes the same as the generic version. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-04-28 22:49:48 +08:00
.l2c_aux_val = L2C_AUX_CTRL_SHARED_OVERRIDE |
L310_AUX_CTRL_DATA_PREFETCH |
L310_AUX_CTRL_INSTR_PREFETCH |
L2C_AUX_CTRL_WAY_SIZE(4),
.l2c_aux_mask = 0xc0000fff,
.smp = smp_ops(sti_smp_ops),
ARM: sti: Implement dummy L2 cache's write_sec This patch implements the write_sec callback that handle PL310 secure registers writes. This callback is just a stub for now, to avoid system crash. Later, it could handle SMC calls so that TZ handles the needed writes. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2016-06-28 17:21:52 +08:00
.l2c_write_sec = sti_l2_write_sec,
ARM: sti: Add STiH415 SOC support The STiH415 is the next generation of HD, AVC set-top box processors for satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9 1.0 GHz, dual-core CPU. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25 19:15:10 +08:00
MACHINE_END