License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 22:07:57 +08:00
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// SPDX-License-Identifier: GPL-2.0
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2009-10-27 03:24:31 +08:00
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/*
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* PPC64 Huge TLB Page Support for hash based MMUs (POWER4 and later)
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*
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* Copyright (C) 2003 David Gibson, IBM Corporation.
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*
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* Based on the IA-32 version:
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* Copyright (C) 2002, Rohit Seth <rohit.seth@intel.com>
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*/
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#include <linux/mm.h>
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#include <linux/hugetlb.h>
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#include <asm/pgtable.h>
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#include <asm/pgalloc.h>
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#include <asm/cacheflush.h>
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#include <asm/machdep.h>
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2019-04-26 13:59:48 +08:00
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unsigned int hpage_shift;
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EXPORT_SYMBOL(hpage_shift);
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2013-04-16 00:53:19 +08:00
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extern long hpte_insert_repeating(unsigned long hash, unsigned long vpn,
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unsigned long pa, unsigned long rlags,
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unsigned long vflags, int psize, int ssize);
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2009-10-27 03:24:31 +08:00
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int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid,
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2014-12-04 13:30:14 +08:00
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pte_t *ptep, unsigned long trap, unsigned long flags,
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int ssize, unsigned int shift, unsigned int mmu_psize)
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2009-10-27 03:24:31 +08:00
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{
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powerpc: Free up four 64K PTE bits in 64K backed HPTE pages
Rearrange 64K PTE bits to free up bits 3, 4, 5 and 6
in the 64K backed HPTE pages. This along with the earlier
patch will entirely free up the four bits from 64K PTE.
The bit numbers are big-endian as defined in the ISA3.0
This patch does the following change to 64K PTE backed
by 64K HPTE.
H_PAGE_F_SECOND (S) which occupied bit 4 moves to the
second part of the pte to bit 60.
H_PAGE_F_GIX (G,I,X) which occupied bit 5, 6 and 7 also
moves to the second part of the pte to bit 61,
62, 63, 64 respectively
since bit 7 is now freed up, we move H_PAGE_BUSY (B) from
bit 9 to bit 7.
The second part of the PTE will hold
(H_PAGE_F_SECOND|H_PAGE_F_GIX) at bit 60,61,62,63.
NOTE: None of the bits in the secondary PTE were not used
by 64k-HPTE backed PTE.
Before the patch, the 64K HPTE backed 64k PTE format was
as follows
0 1 2 3 4 5 6 7 8 9 10...........................63
: : : : : : : : : : : :
v v v v v v v v v v v v
,-,-,-,-,--,--,--,--,-,-,-,-,-,------------------,-,-,-,
|x|x|x| |S |G |I |X |x|B| |x|x|................|x|x|x|x| <- primary pte
'_'_'_'_'__'__'__'__'_'_'_'_'_'________________'_'_'_'_'
| | | | | | | | | | | | |..................| | | | | <- secondary pte
'_'_'_'_'__'__'__'__'_'_'_'_'__________________'_'_'_'_'
After the patch, the 64k HPTE backed 64k PTE format is
as follows
0 1 2 3 4 5 6 7 8 9 10...........................63
: : : : : : : : : : : :
v v v v v v v v v v v v
,-,-,-,-,--,--,--,--,-,-,-,-,-,------------------,-,-,-,
|x|x|x| | | | |B |x| | |x|x|................|.|.|.|.| <- primary pte
'_'_'_'_'__'__'__'__'_'_'_'_'_'________________'_'_'_'_'
| | | | | | | | | | | | |..................|S|G|I|X| <- secondary pte
'_'_'_'_'__'__'__'__'_'_'_'_'__________________'_'_'_'_'
The above PTE changes is applicable to hugetlbpages aswell.
The patch does the following code changes:
a) moves the H_PAGE_F_SECOND and H_PAGE_F_GIX to 4k PTE
header since it is no more needed b the 64k PTEs.
b) abstracts out __real_pte() and __rpte_to_hidx() so the
caller need not know the bit location of the slot.
c) moves the slot bits to the secondary pte.
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Ram Pai <linuxram@us.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-11-06 16:50:48 +08:00
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real_pte_t rpte;
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2012-09-10 10:52:50 +08:00
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unsigned long vpn;
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2009-10-27 03:24:31 +08:00
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unsigned long old_pte, new_pte;
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2019-02-28 10:35:05 +08:00
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unsigned long rflags, pa;
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2018-02-11 23:00:08 +08:00
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long slot, offset;
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2009-10-27 03:24:31 +08:00
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BUG_ON(shift != mmu_psize_defs[mmu_psize].shift);
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/* Search the Linux page table for a match with va */
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2012-09-10 10:52:50 +08:00
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vpn = hpt_vpn(ea, vsid, ssize);
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2009-10-27 03:24:31 +08:00
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2019-03-29 18:00:00 +08:00
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/*
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* At this point, we have a pte (old_pte) which can be used to build
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2009-10-27 03:24:31 +08:00
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* or update an HPTE. There are 2 cases:
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*
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* 1. There is a valid (present) pte with no associated HPTE (this is
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* the most common case)
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* 2. There is a valid (present) pte with an associated HPTE. The
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* current values of the pp bits in the HPTE prevent access
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* because we are doing software DIRTY bit management and the
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* page is currently not DIRTY.
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*/
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do {
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old_pte = pte_val(*ptep);
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2010-07-23 07:02:27 +08:00
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/* If PTE busy, retry the access */
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2016-04-29 21:25:45 +08:00
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if (unlikely(old_pte & H_PAGE_BUSY))
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2010-07-23 07:02:27 +08:00
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return 0;
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/* If PTE permissions don't match, take page fault */
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2016-04-29 21:25:34 +08:00
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if (unlikely(!check_pte_access(access, old_pte)))
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2010-07-23 07:02:27 +08:00
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return 1;
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2016-04-29 21:25:34 +08:00
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2019-03-29 18:00:00 +08:00
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/*
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* Try to lock the PTE, add ACCESSED and DIRTY if it was
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* a write access
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*/
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2016-04-29 21:25:45 +08:00
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new_pte = old_pte | H_PAGE_BUSY | _PAGE_ACCESSED;
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2016-04-29 21:25:30 +08:00
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if (access & _PAGE_WRITE)
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2010-07-23 07:02:27 +08:00
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new_pte |= _PAGE_DIRTY;
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2016-04-29 21:25:27 +08:00
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} while(!pte_xchg(ptep, __pte(old_pte), __pte(new_pte)));
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2018-09-21 02:09:45 +08:00
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/* Make sure this is a hugetlb entry */
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if (old_pte & (H_PAGE_THP_HUGE | _PAGE_DEVMAP))
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return 0;
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2015-12-01 11:36:50 +08:00
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rflags = htab_convert_pte_flags(new_pte);
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2018-02-11 23:00:08 +08:00
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if (unlikely(mmu_psize == MMU_PAGE_16G))
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offset = PTRS_PER_PUD;
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else
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offset = PTRS_PER_PMD;
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rpte = __real_pte(__pte(old_pte), ptep, offset);
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2009-10-27 03:24:31 +08:00
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if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
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2019-03-29 18:00:00 +08:00
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/*
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* No CPU has hugepages but lacks no execute, so we
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* don't need to worry about that case
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*/
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2009-10-27 03:24:31 +08:00
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rflags = hash_page_do_lazy_icache(rflags, __pte(old_pte), trap);
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2009-10-27 03:24:31 +08:00
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/* Check if pte already has an hpte (case 2) */
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2016-04-29 21:25:45 +08:00
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if (unlikely(old_pte & H_PAGE_HASHPTE)) {
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2009-10-27 03:24:31 +08:00
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/* There MIGHT be an HPTE for this pte */
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powerpc: Free up four 64K PTE bits in 64K backed HPTE pages
Rearrange 64K PTE bits to free up bits 3, 4, 5 and 6
in the 64K backed HPTE pages. This along with the earlier
patch will entirely free up the four bits from 64K PTE.
The bit numbers are big-endian as defined in the ISA3.0
This patch does the following change to 64K PTE backed
by 64K HPTE.
H_PAGE_F_SECOND (S) which occupied bit 4 moves to the
second part of the pte to bit 60.
H_PAGE_F_GIX (G,I,X) which occupied bit 5, 6 and 7 also
moves to the second part of the pte to bit 61,
62, 63, 64 respectively
since bit 7 is now freed up, we move H_PAGE_BUSY (B) from
bit 9 to bit 7.
The second part of the PTE will hold
(H_PAGE_F_SECOND|H_PAGE_F_GIX) at bit 60,61,62,63.
NOTE: None of the bits in the secondary PTE were not used
by 64k-HPTE backed PTE.
Before the patch, the 64K HPTE backed 64k PTE format was
as follows
0 1 2 3 4 5 6 7 8 9 10...........................63
: : : : : : : : : : : :
v v v v v v v v v v v v
,-,-,-,-,--,--,--,--,-,-,-,-,-,------------------,-,-,-,
|x|x|x| |S |G |I |X |x|B| |x|x|................|x|x|x|x| <- primary pte
'_'_'_'_'__'__'__'__'_'_'_'_'_'________________'_'_'_'_'
| | | | | | | | | | | | |..................| | | | | <- secondary pte
'_'_'_'_'__'__'__'__'_'_'_'_'__________________'_'_'_'_'
After the patch, the 64k HPTE backed 64k PTE format is
as follows
0 1 2 3 4 5 6 7 8 9 10...........................63
: : : : : : : : : : : :
v v v v v v v v v v v v
,-,-,-,-,--,--,--,--,-,-,-,-,-,------------------,-,-,-,
|x|x|x| | | | |B |x| | |x|x|................|.|.|.|.| <- primary pte
'_'_'_'_'__'__'__'__'_'_'_'_'_'________________'_'_'_'_'
| | | | | | | | | | | | |..................|S|G|I|X| <- secondary pte
'_'_'_'_'__'__'__'__'_'_'_'_'__________________'_'_'_'_'
The above PTE changes is applicable to hugetlbpages aswell.
The patch does the following code changes:
a) moves the H_PAGE_F_SECOND and H_PAGE_F_GIX to 4k PTE
header since it is no more needed b the 64k PTEs.
b) abstracts out __real_pte() and __rpte_to_hidx() so the
caller need not know the bit location of the slot.
c) moves the slot bits to the secondary pte.
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Ram Pai <linuxram@us.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-11-06 16:50:48 +08:00
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unsigned long gslot;
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2009-10-27 03:24:31 +08:00
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powerpc: Free up four 64K PTE bits in 64K backed HPTE pages
Rearrange 64K PTE bits to free up bits 3, 4, 5 and 6
in the 64K backed HPTE pages. This along with the earlier
patch will entirely free up the four bits from 64K PTE.
The bit numbers are big-endian as defined in the ISA3.0
This patch does the following change to 64K PTE backed
by 64K HPTE.
H_PAGE_F_SECOND (S) which occupied bit 4 moves to the
second part of the pte to bit 60.
H_PAGE_F_GIX (G,I,X) which occupied bit 5, 6 and 7 also
moves to the second part of the pte to bit 61,
62, 63, 64 respectively
since bit 7 is now freed up, we move H_PAGE_BUSY (B) from
bit 9 to bit 7.
The second part of the PTE will hold
(H_PAGE_F_SECOND|H_PAGE_F_GIX) at bit 60,61,62,63.
NOTE: None of the bits in the secondary PTE were not used
by 64k-HPTE backed PTE.
Before the patch, the 64K HPTE backed 64k PTE format was
as follows
0 1 2 3 4 5 6 7 8 9 10...........................63
: : : : : : : : : : : :
v v v v v v v v v v v v
,-,-,-,-,--,--,--,--,-,-,-,-,-,------------------,-,-,-,
|x|x|x| |S |G |I |X |x|B| |x|x|................|x|x|x|x| <- primary pte
'_'_'_'_'__'__'__'__'_'_'_'_'_'________________'_'_'_'_'
| | | | | | | | | | | | |..................| | | | | <- secondary pte
'_'_'_'_'__'__'__'__'_'_'_'_'__________________'_'_'_'_'
After the patch, the 64k HPTE backed 64k PTE format is
as follows
0 1 2 3 4 5 6 7 8 9 10...........................63
: : : : : : : : : : : :
v v v v v v v v v v v v
,-,-,-,-,--,--,--,--,-,-,-,-,-,------------------,-,-,-,
|x|x|x| | | | |B |x| | |x|x|................|.|.|.|.| <- primary pte
'_'_'_'_'__'__'__'__'_'_'_'_'_'________________'_'_'_'_'
| | | | | | | | | | | | |..................|S|G|I|X| <- secondary pte
'_'_'_'_'__'__'__'__'_'_'_'_'__________________'_'_'_'_'
The above PTE changes is applicable to hugetlbpages aswell.
The patch does the following code changes:
a) moves the H_PAGE_F_SECOND and H_PAGE_F_GIX to 4k PTE
header since it is no more needed b the 64k PTEs.
b) abstracts out __real_pte() and __rpte_to_hidx() so the
caller need not know the bit location of the slot.
c) moves the slot bits to the secondary pte.
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Ram Pai <linuxram@us.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-11-06 16:50:48 +08:00
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gslot = pte_get_hash_gslot(vpn, shift, ssize, rpte, 0);
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if (mmu_hash_ops.hpte_updatepp(gslot, rflags, vpn, mmu_psize,
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2016-07-05 13:03:58 +08:00
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mmu_psize, ssize, flags) == -1)
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2009-10-27 03:24:31 +08:00
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old_pte &= ~_PAGE_HPTEFLAGS;
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}
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2016-04-29 21:25:45 +08:00
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if (likely(!(old_pte & H_PAGE_HASHPTE))) {
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2012-09-10 10:52:50 +08:00
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unsigned long hash = hpt_hash(vpn, shift, ssize);
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2009-10-27 03:24:31 +08:00
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pa = pte_pfn(__pte(old_pte)) << PAGE_SHIFT;
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/* clear HPTE slot informations in new PTE */
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2016-04-29 21:25:45 +08:00
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new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | H_PAGE_HASHPTE;
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2015-12-01 11:36:45 +08:00
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2013-04-16 00:53:19 +08:00
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slot = hpte_insert_repeating(hash, vpn, pa, rflags, 0,
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mmu_psize, ssize);
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2009-10-27 03:24:31 +08:00
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2010-07-15 03:31:48 +08:00
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/*
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* Hypervisor failure. Restore old pte and return -1
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* similar to __hash_page_*
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*/
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if (unlikely(slot == -2)) {
|
|
|
|
|
*ptep = __pte(old_pte);
|
2010-07-23 08:31:13 +08:00
|
|
|
hash_failure_debug(ea, access, vsid, trap, ssize,
|
2013-04-28 17:37:37 +08:00
|
|
|
mmu_psize, mmu_psize, old_pte);
|
2010-07-23 07:02:27 +08:00
|
|
|
return -1;
|
2010-07-15 03:31:48 +08:00
|
|
|
}
|
2009-10-27 03:24:31 +08:00
|
|
|
|
2018-02-11 23:00:08 +08:00
|
|
|
new_pte |= pte_set_hidx(ptep, rpte, 0, slot, offset);
|
2009-10-27 03:24:31 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* No need to use ldarx/stdcx here
|
|
|
|
|
*/
|
2016-04-29 21:25:45 +08:00
|
|
|
*ptep = __pte(new_pte & ~H_PAGE_BUSY);
|
2010-07-23 07:02:27 +08:00
|
|
|
return 0;
|
2009-10-27 03:24:31 +08:00
|
|
|
}
|
2019-03-06 07:46:40 +08:00
|
|
|
|
|
|
|
|
pte_t huge_ptep_modify_prot_start(struct vm_area_struct *vma,
|
|
|
|
|
unsigned long addr, pte_t *ptep)
|
|
|
|
|
{
|
|
|
|
|
unsigned long pte_val;
|
|
|
|
|
/*
|
|
|
|
|
* Clear the _PAGE_PRESENT so that no hardware parallel update is
|
|
|
|
|
* possible. Also keep the pte_present true so that we don't take
|
|
|
|
|
* wrong fault.
|
|
|
|
|
*/
|
|
|
|
|
pte_val = pte_update(vma->vm_mm, addr, ptep,
|
|
|
|
|
_PAGE_PRESENT, _PAGE_INVALID, 1);
|
|
|
|
|
|
|
|
|
|
return __pte(pte_val);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void huge_ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr,
|
|
|
|
|
pte_t *ptep, pte_t old_pte, pte_t pte)
|
|
|
|
|
{
|
|
|
|
|
|
|
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__huge_ptep_modify_prot_commit(vma, addr, ptep,
|
|
|
|
|
old_pte, pte);
|
|
|
|
|
set_huge_pte_at(vma->vm_mm, addr, ptep, pte);
|
|
|
|
|
}
|
2019-04-26 13:59:48 +08:00
|
|
|
|
|
|
|
|
void hugetlbpage_init_default(void)
|
|
|
|
|
{
|
|
|
|
|
/* Set default large page size. Currently, we pick 16M or 1M
|
|
|
|
|
* depending on what is available
|
|
|
|
|
*/
|
|
|
|
|
if (mmu_psize_defs[MMU_PAGE_16M].shift)
|
|
|
|
|
hpage_shift = mmu_psize_defs[MMU_PAGE_16M].shift;
|
|
|
|
|
else if (mmu_psize_defs[MMU_PAGE_1M].shift)
|
|
|
|
|
hpage_shift = mmu_psize_defs[MMU_PAGE_1M].shift;
|
|
|
|
|
else if (mmu_psize_defs[MMU_PAGE_2M].shift)
|
|
|
|
|
hpage_shift = mmu_psize_defs[MMU_PAGE_2M].shift;
|
|
|
|
|
}
|