2019-07-24 16:58:20 +08:00
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// SPDX-License-Identifier: ISC
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2017-11-21 17:50:52 +08:00
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/*
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* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
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*/
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#include "mt76.h"
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static struct mt76_txwi_cache *
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mt76_alloc_txwi(struct mt76_dev *dev)
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{
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struct mt76_txwi_cache *t;
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dma_addr_t addr;
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2019-04-02 17:47:56 +08:00
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u8 *txwi;
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2017-11-21 17:50:52 +08:00
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int size;
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2019-04-02 17:47:56 +08:00
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size = L1_CACHE_ALIGN(dev->drv->txwi_size + sizeof(*t));
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txwi = devm_kzalloc(dev->dev, size, GFP_ATOMIC);
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if (!txwi)
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2017-11-21 17:50:52 +08:00
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return NULL;
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2019-04-02 17:47:56 +08:00
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addr = dma_map_single(dev->dev, txwi, dev->drv->txwi_size,
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2017-11-21 17:50:52 +08:00
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DMA_TO_DEVICE);
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2019-04-02 17:47:56 +08:00
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t = (struct mt76_txwi_cache *)(txwi + dev->drv->txwi_size);
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2017-11-21 17:50:52 +08:00
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t->dma_addr = addr;
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return t;
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}
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static struct mt76_txwi_cache *
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__mt76_get_txwi(struct mt76_dev *dev)
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{
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struct mt76_txwi_cache *t = NULL;
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spin_lock_bh(&dev->lock);
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if (!list_empty(&dev->txwi_cache)) {
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t = list_first_entry(&dev->txwi_cache, struct mt76_txwi_cache,
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list);
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list_del(&t->list);
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}
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spin_unlock_bh(&dev->lock);
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return t;
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}
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2018-07-31 16:09:10 +08:00
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struct mt76_txwi_cache *
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2017-11-21 17:50:52 +08:00
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mt76_get_txwi(struct mt76_dev *dev)
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{
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struct mt76_txwi_cache *t = __mt76_get_txwi(dev);
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if (t)
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return t;
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return mt76_alloc_txwi(dev);
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}
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void
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mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t)
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{
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if (!t)
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return;
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spin_lock_bh(&dev->lock);
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list_add(&t->list, &dev->txwi_cache);
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spin_unlock_bh(&dev->lock);
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}
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2019-04-02 17:47:58 +08:00
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EXPORT_SYMBOL_GPL(mt76_put_txwi);
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2017-11-21 17:50:52 +08:00
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void mt76_tx_free(struct mt76_dev *dev)
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{
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struct mt76_txwi_cache *t;
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while ((t = __mt76_get_txwi(dev)) != NULL)
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2019-04-02 17:47:56 +08:00
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dma_unmap_single(dev->dev, t->dma_addr, dev->drv->txwi_size,
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2017-11-21 17:50:52 +08:00
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DMA_TO_DEVICE);
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}
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static int
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mt76_txq_get_qid(struct ieee80211_txq *txq)
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{
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if (!txq->sta)
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return MT_TXQ_BE;
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return txq->ac;
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}
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2018-09-29 19:15:32 +08:00
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static void
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mt76_check_agg_ssn(struct mt76_txq *mtxq, struct sk_buff *skb)
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{
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2019-08-21 11:11:15 +08:00
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struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
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2018-09-29 19:15:32 +08:00
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2018-10-08 16:39:24 +08:00
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if (!ieee80211_is_data_qos(hdr->frame_control) ||
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!ieee80211_is_data_present(hdr->frame_control))
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2018-09-29 19:15:32 +08:00
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return;
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mtxq->agg_ssn = le16_to_cpu(hdr->seq_ctrl) + 0x10;
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}
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2018-11-06 04:11:39 +08:00
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void
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mt76_tx_status_lock(struct mt76_dev *dev, struct sk_buff_head *list)
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__acquires(&dev->status_list.lock)
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{
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__skb_queue_head_init(list);
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spin_lock_bh(&dev->status_list.lock);
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__acquire(&dev->status_list.lock);
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}
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EXPORT_SYMBOL_GPL(mt76_tx_status_lock);
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void
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mt76_tx_status_unlock(struct mt76_dev *dev, struct sk_buff_head *list)
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__releases(&dev->status_list.unlock)
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{
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struct sk_buff *skb;
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spin_unlock_bh(&dev->status_list.lock);
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__release(&dev->status_list.unlock);
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while ((skb = __skb_dequeue(list)) != NULL)
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ieee80211_tx_status(dev->hw, skb);
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}
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EXPORT_SYMBOL_GPL(mt76_tx_status_unlock);
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2018-10-25 22:11:34 +08:00
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static void
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2018-11-06 04:11:39 +08:00
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__mt76_tx_status_skb_done(struct mt76_dev *dev, struct sk_buff *skb, u8 flags,
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struct sk_buff_head *list)
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2018-10-25 22:11:34 +08:00
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{
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struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
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struct mt76_tx_cb *cb = mt76_tx_skb_cb(skb);
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u8 done = MT_TX_CB_DMA_DONE | MT_TX_CB_TXS_DONE;
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flags |= cb->flags;
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cb->flags = flags;
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if ((flags & done) != done)
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return;
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__skb_unlink(skb, &dev->status_list);
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/* Tx status can be unreliable. if it fails, mark the frame as ACKed */
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if (flags & MT_TX_CB_TXS_FAILED) {
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ieee80211_tx_info_clear_status(info);
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info->status.rates[0].idx = -1;
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info->flags |= IEEE80211_TX_STAT_ACK;
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}
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2018-11-06 04:11:39 +08:00
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__skb_queue_tail(list, skb);
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2018-10-25 22:11:34 +08:00
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}
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void
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2018-11-06 04:11:39 +08:00
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mt76_tx_status_skb_done(struct mt76_dev *dev, struct sk_buff *skb,
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struct sk_buff_head *list)
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2018-10-25 22:11:34 +08:00
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{
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2018-11-06 04:11:39 +08:00
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__mt76_tx_status_skb_done(dev, skb, MT_TX_CB_TXS_DONE, list);
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2018-10-25 22:11:34 +08:00
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}
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EXPORT_SYMBOL_GPL(mt76_tx_status_skb_done);
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int
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mt76_tx_status_skb_add(struct mt76_dev *dev, struct mt76_wcid *wcid,
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struct sk_buff *skb)
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{
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struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
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struct mt76_tx_cb *cb = mt76_tx_skb_cb(skb);
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int pid;
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if (!wcid)
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2019-01-11 20:37:43 +08:00
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return MT_PACKET_ID_NO_ACK;
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2018-10-25 22:11:34 +08:00
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if (info->flags & IEEE80211_TX_CTL_NO_ACK)
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return MT_PACKET_ID_NO_ACK;
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if (!(info->flags & (IEEE80211_TX_CTL_REQ_TX_STATUS |
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IEEE80211_TX_CTL_RATE_CTRL_PROBE)))
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2019-01-11 20:37:43 +08:00
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return MT_PACKET_ID_NO_SKB;
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2018-10-25 22:11:34 +08:00
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spin_lock_bh(&dev->status_list.lock);
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memset(cb, 0, sizeof(*cb));
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wcid->packet_id = (wcid->packet_id + 1) & MT_PACKET_ID_MASK;
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2019-01-11 20:37:43 +08:00
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if (wcid->packet_id == MT_PACKET_ID_NO_ACK ||
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wcid->packet_id == MT_PACKET_ID_NO_SKB)
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wcid->packet_id = MT_PACKET_ID_FIRST;
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2018-10-25 22:11:34 +08:00
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pid = wcid->packet_id;
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cb->wcid = wcid->idx;
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cb->pktid = pid;
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cb->jiffies = jiffies;
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__skb_queue_tail(&dev->status_list, skb);
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spin_unlock_bh(&dev->status_list.lock);
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return pid;
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}
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EXPORT_SYMBOL_GPL(mt76_tx_status_skb_add);
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struct sk_buff *
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2018-11-06 04:11:39 +08:00
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mt76_tx_status_skb_get(struct mt76_dev *dev, struct mt76_wcid *wcid, int pktid,
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struct sk_buff_head *list)
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2018-10-25 22:11:34 +08:00
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{
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struct sk_buff *skb, *tmp;
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skb_queue_walk_safe(&dev->status_list, skb, tmp) {
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struct mt76_tx_cb *cb = mt76_tx_skb_cb(skb);
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if (wcid && cb->wcid != wcid->idx)
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continue;
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if (cb->pktid == pktid)
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return skb;
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2019-08-21 11:11:15 +08:00
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if (pktid >= 0 && !time_after(jiffies, cb->jiffies +
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MT_TX_STATUS_SKB_TIMEOUT))
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2018-10-25 22:11:34 +08:00
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continue;
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__mt76_tx_status_skb_done(dev, skb, MT_TX_CB_TXS_FAILED |
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2018-11-06 04:11:39 +08:00
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MT_TX_CB_TXS_DONE, list);
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2018-10-25 22:11:34 +08:00
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}
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return NULL;
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}
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EXPORT_SYMBOL_GPL(mt76_tx_status_skb_get);
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2018-11-06 04:11:39 +08:00
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void
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mt76_tx_status_check(struct mt76_dev *dev, struct mt76_wcid *wcid, bool flush)
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{
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struct sk_buff_head list;
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mt76_tx_status_lock(dev, &list);
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mt76_tx_status_skb_get(dev, wcid, flush ? -1 : 0, &list);
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mt76_tx_status_unlock(dev, &list);
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}
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EXPORT_SYMBOL_GPL(mt76_tx_status_check);
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2018-10-25 22:11:34 +08:00
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void mt76_tx_complete_skb(struct mt76_dev *dev, struct sk_buff *skb)
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{
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2018-11-06 04:11:39 +08:00
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struct sk_buff_head list;
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2018-10-25 22:11:34 +08:00
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if (!skb->prev) {
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ieee80211_free_txskb(dev->hw, skb);
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return;
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}
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2018-11-06 04:11:39 +08:00
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mt76_tx_status_lock(dev, &list);
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__mt76_tx_status_skb_done(dev, skb, MT_TX_CB_DMA_DONE, &list);
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mt76_tx_status_unlock(dev, &list);
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2018-10-25 22:11:34 +08:00
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}
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EXPORT_SYMBOL_GPL(mt76_tx_complete_skb);
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2017-11-21 17:50:52 +08:00
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void
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mt76_tx(struct mt76_dev *dev, struct ieee80211_sta *sta,
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struct mt76_wcid *wcid, struct sk_buff *skb)
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{
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struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
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2019-08-21 11:11:15 +08:00
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struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
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2017-11-21 17:50:52 +08:00
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struct mt76_queue *q;
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int qid = skb_get_queue_mapping(skb);
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if (WARN_ON(qid >= MT_TXQ_PSD)) {
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qid = MT_TXQ_BE;
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skb_set_queue_mapping(skb, qid);
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}
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2019-03-13 21:20:06 +08:00
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if (!(wcid->tx_info & MT_WCID_TX_INFO_SET))
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2017-11-21 17:50:52 +08:00
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ieee80211_get_tx_rates(info->control.vif, sta, skb,
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info->control.rates, 1);
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2018-09-29 19:15:32 +08:00
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if (sta && ieee80211_is_data_qos(hdr->frame_control)) {
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struct ieee80211_txq *txq;
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struct mt76_txq *mtxq;
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u8 tid;
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tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
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txq = sta->txq[tid];
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2019-08-21 11:11:15 +08:00
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mtxq = (struct mt76_txq *)txq->drv_priv;
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2018-09-29 19:15:32 +08:00
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if (mtxq->aggr)
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mt76_check_agg_ssn(mtxq, skb);
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}
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2019-03-02 21:47:41 +08:00
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q = dev->q_tx[qid].q;
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2017-11-21 17:50:52 +08:00
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spin_lock_bh(&q->lock);
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2019-03-02 21:47:38 +08:00
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dev->queue_ops->tx_queue_skb(dev, qid, skb, wcid, sta);
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2017-11-21 17:50:52 +08:00
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dev->queue_ops->kick(dev, q);
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2019-02-28 21:31:31 +08:00
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if (q->queued > q->ndesc - 8 && !q->stopped) {
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2017-11-21 17:50:52 +08:00
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ieee80211_stop_queue(dev->hw, skb_get_queue_mapping(skb));
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2019-02-28 21:31:31 +08:00
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q->stopped = true;
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}
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2017-11-21 17:50:52 +08:00
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spin_unlock_bh(&q->lock);
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}
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EXPORT_SYMBOL_GPL(mt76_tx);
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static struct sk_buff *
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mt76_txq_dequeue(struct mt76_dev *dev, struct mt76_txq *mtxq, bool ps)
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{
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struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
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struct sk_buff *skb;
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skb = skb_dequeue(&mtxq->retry_q);
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if (skb) {
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u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
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if (ps && skb_queue_empty(&mtxq->retry_q))
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ieee80211_sta_set_buffered(txq->sta, tid, false);
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return skb;
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}
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skb = ieee80211_tx_dequeue(dev->hw, txq);
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if (!skb)
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return NULL;
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return skb;
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}
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static void
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mt76_queue_ps_skb(struct mt76_dev *dev, struct ieee80211_sta *sta,
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struct sk_buff *skb, bool last)
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{
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2019-08-21 11:11:15 +08:00
|
|
|
struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
|
2017-11-21 17:50:52 +08:00
|
|
|
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
|
|
|
|
|
|
|
|
info->control.flags |= IEEE80211_TX_CTRL_PS_RESPONSE;
|
|
|
|
if (last)
|
2018-11-14 03:54:17 +08:00
|
|
|
info->flags |= IEEE80211_TX_STATUS_EOSP |
|
|
|
|
IEEE80211_TX_CTL_REQ_TX_STATUS;
|
2017-11-21 17:50:52 +08:00
|
|
|
|
|
|
|
mt76_skb_set_moredata(skb, !last);
|
2019-03-02 21:47:38 +08:00
|
|
|
dev->queue_ops->tx_queue_skb(dev, MT_TXQ_PSD, skb, wcid, sta);
|
2017-11-21 17:50:52 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
mt76_release_buffered_frames(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
|
|
|
|
u16 tids, int nframes,
|
|
|
|
enum ieee80211_frame_release_type reason,
|
|
|
|
bool more_data)
|
|
|
|
{
|
|
|
|
struct mt76_dev *dev = hw->priv;
|
|
|
|
struct sk_buff *last_skb = NULL;
|
2019-03-02 21:47:41 +08:00
|
|
|
struct mt76_queue *hwq = dev->q_tx[MT_TXQ_PSD].q;
|
2017-11-21 17:50:52 +08:00
|
|
|
int i;
|
|
|
|
|
|
|
|
spin_lock_bh(&hwq->lock);
|
|
|
|
for (i = 0; tids && nframes; i++, tids >>= 1) {
|
|
|
|
struct ieee80211_txq *txq = sta->txq[i];
|
2019-08-21 11:11:15 +08:00
|
|
|
struct mt76_txq *mtxq = (struct mt76_txq *)txq->drv_priv;
|
2017-11-21 17:50:52 +08:00
|
|
|
struct sk_buff *skb;
|
|
|
|
|
|
|
|
if (!(tids & 1))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
do {
|
|
|
|
skb = mt76_txq_dequeue(dev, mtxq, true);
|
|
|
|
if (!skb)
|
|
|
|
break;
|
|
|
|
|
|
|
|
if (mtxq->aggr)
|
|
|
|
mt76_check_agg_ssn(mtxq, skb);
|
|
|
|
|
|
|
|
nframes--;
|
|
|
|
if (last_skb)
|
|
|
|
mt76_queue_ps_skb(dev, sta, last_skb, false);
|
|
|
|
|
|
|
|
last_skb = skb;
|
|
|
|
} while (nframes);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (last_skb) {
|
|
|
|
mt76_queue_ps_skb(dev, sta, last_skb, true);
|
|
|
|
dev->queue_ops->kick(dev, hwq);
|
2019-03-04 02:19:21 +08:00
|
|
|
} else {
|
|
|
|
ieee80211_sta_eosp(sta);
|
2017-11-21 17:50:52 +08:00
|
|
|
}
|
2019-03-04 02:19:21 +08:00
|
|
|
|
2017-11-21 17:50:52 +08:00
|
|
|
spin_unlock_bh(&hwq->lock);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(mt76_release_buffered_frames);
|
|
|
|
|
|
|
|
static int
|
2019-03-02 21:47:41 +08:00
|
|
|
mt76_txq_send_burst(struct mt76_dev *dev, struct mt76_sw_queue *sq,
|
2019-08-22 17:49:10 +08:00
|
|
|
struct mt76_txq *mtxq)
|
2017-11-21 17:50:52 +08:00
|
|
|
{
|
|
|
|
struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
|
2019-03-02 21:47:38 +08:00
|
|
|
enum mt76_txq_id qid = mt76_txq_get_qid(txq);
|
2017-11-21 17:50:52 +08:00
|
|
|
struct mt76_wcid *wcid = mtxq->wcid;
|
2019-03-02 21:47:41 +08:00
|
|
|
struct mt76_queue *hwq = sq->q;
|
|
|
|
struct ieee80211_tx_info *info;
|
2017-11-21 17:50:52 +08:00
|
|
|
struct sk_buff *skb;
|
|
|
|
int n_frames = 1, limit;
|
|
|
|
struct ieee80211_tx_rate tx_rate;
|
|
|
|
bool ampdu;
|
|
|
|
bool probe;
|
|
|
|
int idx;
|
|
|
|
|
2019-08-22 17:49:10 +08:00
|
|
|
if (test_bit(MT_WCID_FLAG_PS, &wcid->flags))
|
2019-01-22 00:33:38 +08:00
|
|
|
return 0;
|
|
|
|
|
2017-11-21 17:50:52 +08:00
|
|
|
skb = mt76_txq_dequeue(dev, mtxq, false);
|
2019-08-22 17:49:10 +08:00
|
|
|
if (!skb)
|
2017-11-21 17:50:52 +08:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
info = IEEE80211_SKB_CB(skb);
|
2019-03-13 21:20:06 +08:00
|
|
|
if (!(wcid->tx_info & MT_WCID_TX_INFO_SET))
|
2017-11-21 17:50:52 +08:00
|
|
|
ieee80211_get_tx_rates(txq->vif, txq->sta, skb,
|
|
|
|
info->control.rates, 1);
|
|
|
|
tx_rate = info->control.rates[0];
|
|
|
|
|
|
|
|
probe = (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
|
|
|
|
ampdu = IEEE80211_SKB_CB(skb)->flags & IEEE80211_TX_CTL_AMPDU;
|
|
|
|
limit = ampdu ? 16 : 3;
|
|
|
|
|
|
|
|
if (ampdu)
|
|
|
|
mt76_check_agg_ssn(mtxq, skb);
|
|
|
|
|
2019-03-02 21:47:38 +08:00
|
|
|
idx = dev->queue_ops->tx_queue_skb(dev, qid, skb, wcid, txq->sta);
|
2017-11-21 17:50:52 +08:00
|
|
|
|
|
|
|
if (idx < 0)
|
|
|
|
return idx;
|
|
|
|
|
|
|
|
do {
|
|
|
|
bool cur_ampdu;
|
|
|
|
|
|
|
|
if (probe)
|
|
|
|
break;
|
|
|
|
|
2019-08-22 16:08:56 +08:00
|
|
|
if (test_bit(MT76_RESET, &dev->state))
|
2017-11-21 17:50:52 +08:00
|
|
|
return -EBUSY;
|
|
|
|
|
|
|
|
skb = mt76_txq_dequeue(dev, mtxq, false);
|
2019-08-22 17:49:10 +08:00
|
|
|
if (!skb)
|
2017-11-21 17:50:52 +08:00
|
|
|
break;
|
|
|
|
|
|
|
|
info = IEEE80211_SKB_CB(skb);
|
|
|
|
cur_ampdu = info->flags & IEEE80211_TX_CTL_AMPDU;
|
|
|
|
|
|
|
|
if (ampdu != cur_ampdu ||
|
|
|
|
(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) {
|
|
|
|
skb_queue_tail(&mtxq->retry_q, skb);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
info->control.rates[0] = tx_rate;
|
|
|
|
|
|
|
|
if (cur_ampdu)
|
|
|
|
mt76_check_agg_ssn(mtxq, skb);
|
|
|
|
|
2019-03-02 21:47:38 +08:00
|
|
|
idx = dev->queue_ops->tx_queue_skb(dev, qid, skb, wcid,
|
2018-07-31 16:09:11 +08:00
|
|
|
txq->sta);
|
2017-11-21 17:50:52 +08:00
|
|
|
if (idx < 0)
|
|
|
|
return idx;
|
|
|
|
|
|
|
|
n_frames++;
|
|
|
|
} while (n_frames < limit);
|
|
|
|
|
|
|
|
if (!probe) {
|
2019-03-02 21:47:42 +08:00
|
|
|
hwq->entry[idx].qid = sq - dev->q_tx;
|
2017-11-21 17:50:52 +08:00
|
|
|
hwq->entry[idx].schedule = true;
|
2019-03-02 21:47:41 +08:00
|
|
|
sq->swq_queued++;
|
2017-11-21 17:50:52 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
dev->queue_ops->kick(dev, hwq);
|
|
|
|
|
|
|
|
return n_frames;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
2019-03-13 07:51:36 +08:00
|
|
|
mt76_txq_schedule_list(struct mt76_dev *dev, enum mt76_txq_id qid)
|
2017-11-21 17:50:52 +08:00
|
|
|
{
|
2019-03-13 07:51:36 +08:00
|
|
|
struct mt76_sw_queue *sq = &dev->q_tx[qid];
|
2019-03-02 21:47:41 +08:00
|
|
|
struct mt76_queue *hwq = sq->q;
|
2019-03-13 07:51:36 +08:00
|
|
|
struct ieee80211_txq *txq;
|
|
|
|
struct mt76_txq *mtxq;
|
|
|
|
struct mt76_wcid *wcid;
|
|
|
|
int ret = 0;
|
2017-11-21 17:50:52 +08:00
|
|
|
|
2019-03-13 07:51:36 +08:00
|
|
|
spin_lock_bh(&hwq->lock);
|
|
|
|
while (1) {
|
|
|
|
if (sq->swq_queued >= 4)
|
|
|
|
break;
|
2017-11-21 17:50:52 +08:00
|
|
|
|
2019-08-22 16:08:56 +08:00
|
|
|
if (test_bit(MT76_RESET, &dev->state)) {
|
2019-03-13 07:51:36 +08:00
|
|
|
ret = -EBUSY;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
txq = ieee80211_next_txq(dev->hw, qid);
|
|
|
|
if (!txq)
|
|
|
|
break;
|
|
|
|
|
|
|
|
mtxq = (struct mt76_txq *)txq->drv_priv;
|
|
|
|
wcid = mtxq->wcid;
|
|
|
|
if (wcid && test_bit(MT_WCID_FLAG_PS, &wcid->flags))
|
|
|
|
continue;
|
2018-04-25 17:11:24 +08:00
|
|
|
|
2017-11-21 17:50:52 +08:00
|
|
|
if (mtxq->send_bar && mtxq->aggr) {
|
|
|
|
struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
|
|
|
|
struct ieee80211_sta *sta = txq->sta;
|
|
|
|
struct ieee80211_vif *vif = txq->vif;
|
|
|
|
u16 agg_ssn = mtxq->agg_ssn;
|
|
|
|
u8 tid = txq->tid;
|
|
|
|
|
|
|
|
mtxq->send_bar = false;
|
|
|
|
spin_unlock_bh(&hwq->lock);
|
|
|
|
ieee80211_send_bar(vif, sta->addr, tid, agg_ssn);
|
|
|
|
spin_lock_bh(&hwq->lock);
|
|
|
|
}
|
|
|
|
|
2019-08-22 17:49:10 +08:00
|
|
|
ret += mt76_txq_send_burst(dev, sq, mtxq);
|
|
|
|
ieee80211_return_txq(dev->hw, txq,
|
|
|
|
!skb_queue_empty(&mtxq->retry_q));
|
2017-11-21 17:50:52 +08:00
|
|
|
}
|
2019-03-13 07:51:36 +08:00
|
|
|
spin_unlock_bh(&hwq->lock);
|
2017-11-21 17:50:52 +08:00
|
|
|
|
2019-03-13 07:51:36 +08:00
|
|
|
return ret;
|
2017-11-21 17:50:52 +08:00
|
|
|
}
|
|
|
|
|
2019-03-13 07:51:36 +08:00
|
|
|
void mt76_txq_schedule(struct mt76_dev *dev, enum mt76_txq_id qid)
|
2017-11-21 17:50:52 +08:00
|
|
|
{
|
2019-03-13 07:51:36 +08:00
|
|
|
struct mt76_sw_queue *sq = &dev->q_tx[qid];
|
2017-11-21 17:50:52 +08:00
|
|
|
int len;
|
|
|
|
|
2019-03-13 07:51:36 +08:00
|
|
|
if (qid >= 4)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (sq->swq_queued >= 4)
|
|
|
|
return;
|
|
|
|
|
2018-04-25 17:11:23 +08:00
|
|
|
rcu_read_lock();
|
2017-11-21 17:50:52 +08:00
|
|
|
|
2019-03-13 07:51:36 +08:00
|
|
|
do {
|
|
|
|
ieee80211_txq_schedule_start(dev->hw, qid);
|
|
|
|
len = mt76_txq_schedule_list(dev, qid);
|
|
|
|
ieee80211_txq_schedule_end(dev->hw, qid);
|
2017-11-21 17:50:52 +08:00
|
|
|
} while (len > 0);
|
2019-03-13 07:51:36 +08:00
|
|
|
|
2018-04-25 17:11:23 +08:00
|
|
|
rcu_read_unlock();
|
2017-11-21 17:50:52 +08:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(mt76_txq_schedule);
|
|
|
|
|
|
|
|
void mt76_txq_schedule_all(struct mt76_dev *dev)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
2019-03-13 07:51:36 +08:00
|
|
|
for (i = 0; i <= MT_TXQ_BK; i++)
|
|
|
|
mt76_txq_schedule(dev, i);
|
2017-11-21 17:50:52 +08:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(mt76_txq_schedule_all);
|
|
|
|
|
2019-08-10 01:06:02 +08:00
|
|
|
void mt76_tx_tasklet(unsigned long data)
|
|
|
|
{
|
|
|
|
struct mt76_dev *dev = (struct mt76_dev *)data;
|
|
|
|
|
|
|
|
mt76_txq_schedule_all(dev);
|
|
|
|
}
|
|
|
|
|
2017-11-21 17:50:52 +08:00
|
|
|
void mt76_stop_tx_queues(struct mt76_dev *dev, struct ieee80211_sta *sta,
|
|
|
|
bool send_bar)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(sta->txq); i++) {
|
|
|
|
struct ieee80211_txq *txq = sta->txq[i];
|
2019-03-02 21:47:41 +08:00
|
|
|
struct mt76_queue *hwq;
|
2018-11-17 00:19:21 +08:00
|
|
|
struct mt76_txq *mtxq;
|
|
|
|
|
|
|
|
if (!txq)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
mtxq = (struct mt76_txq *)txq->drv_priv;
|
2019-03-02 21:47:41 +08:00
|
|
|
hwq = mtxq->swq->q;
|
2017-11-21 17:50:52 +08:00
|
|
|
|
2019-03-02 21:47:41 +08:00
|
|
|
spin_lock_bh(&hwq->lock);
|
2017-11-21 17:50:52 +08:00
|
|
|
mtxq->send_bar = mtxq->aggr && send_bar;
|
2019-03-02 21:47:41 +08:00
|
|
|
spin_unlock_bh(&hwq->lock);
|
2017-11-21 17:50:52 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(mt76_stop_tx_queues);
|
|
|
|
|
|
|
|
void mt76_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq)
|
|
|
|
{
|
|
|
|
struct mt76_dev *dev = hw->priv;
|
|
|
|
|
2019-02-28 02:42:39 +08:00
|
|
|
if (!test_bit(MT76_STATE_RUNNING, &dev->state))
|
|
|
|
return;
|
|
|
|
|
2019-03-14 03:18:56 +08:00
|
|
|
tasklet_schedule(&dev->tx_tasklet);
|
2017-11-21 17:50:52 +08:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(mt76_wake_tx_queue);
|
|
|
|
|
|
|
|
void mt76_txq_remove(struct mt76_dev *dev, struct ieee80211_txq *txq)
|
|
|
|
{
|
2019-03-02 21:47:41 +08:00
|
|
|
struct mt76_txq *mtxq;
|
2017-11-21 17:50:52 +08:00
|
|
|
struct sk_buff *skb;
|
|
|
|
|
|
|
|
if (!txq)
|
|
|
|
return;
|
|
|
|
|
2019-08-21 11:11:15 +08:00
|
|
|
mtxq = (struct mt76_txq *)txq->drv_priv;
|
2017-11-21 17:50:52 +08:00
|
|
|
|
|
|
|
while ((skb = skb_dequeue(&mtxq->retry_q)) != NULL)
|
|
|
|
ieee80211_free_txskb(dev->hw, skb);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(mt76_txq_remove);
|
|
|
|
|
|
|
|
void mt76_txq_init(struct mt76_dev *dev, struct ieee80211_txq *txq)
|
|
|
|
{
|
2019-08-21 11:11:15 +08:00
|
|
|
struct mt76_txq *mtxq = (struct mt76_txq *)txq->drv_priv;
|
2017-11-21 17:50:52 +08:00
|
|
|
|
|
|
|
skb_queue_head_init(&mtxq->retry_q);
|
|
|
|
|
2019-03-02 21:47:41 +08:00
|
|
|
mtxq->swq = &dev->q_tx[mt76_txq_get_qid(txq)];
|
2017-11-21 17:50:52 +08:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(mt76_txq_init);
|
2018-09-04 22:41:01 +08:00
|
|
|
|
|
|
|
u8 mt76_ac_to_hwq(u8 ac)
|
|
|
|
{
|
|
|
|
static const u8 wmm_queue_map[] = {
|
|
|
|
[IEEE80211_AC_BE] = 0,
|
|
|
|
[IEEE80211_AC_BK] = 1,
|
|
|
|
[IEEE80211_AC_VI] = 2,
|
|
|
|
[IEEE80211_AC_VO] = 3,
|
|
|
|
};
|
|
|
|
|
|
|
|
if (WARN_ON(ac >= IEEE80211_NUM_ACS))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
return wmm_queue_map[ac];
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(mt76_ac_to_hwq);
|