OpenCloudOS-Kernel/arch/arm/boot/dts/armada-370-db.dts

/*
 * Device Tree file for Marvell Armada 370 evaluation board
 * (DB-88F6710-BP-DDR3)
 *
 *  Copyright (C) 2012 Marvell
 *
 * Lior Amsalem <alior@marvell.com>
 * Gregory CLEMENT <gregory.clement@free-electrons.com>
 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

/dts-v1/;
/include/ "armada-370.dtsi"

/ {
	model = "Marvell Armada 370 Evaluation Board";
	compatible = "marvell,a370-db", "marvell,armada370", "marvell,armada-370-xp";

	chosen {
		bootargs = "console=ttyS0,115200 earlyprintk";
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x40000000>; /* 1 GB */
	};

	soc {
		serial@12000 {
			clock-frequency = <200000000>;
			status = "okay";
		};
		sata@a0000 {
			nr-ports = <2>;
			status = "okay";
		};

		mdio {
			phy0: ethernet-phy@0 {
				reg = <0>;
			};

			phy1: ethernet-phy@1 {
				reg = <1>;
			};
		};

		ethernet@70000 {
			status = "okay";
			phy = <&phy0>;
			phy-mode = "rgmii-id";
		};
		ethernet@74000 {
			status = "okay";
			phy = <&phy1>;
			phy-mode = "rgmii-id";
		};

		mvsdio@d4000 {
			pinctrl-0 = <&sdio_pins1>;
			pinctrl-names = "default";
			/*
			 * This device is disabled by default, because
			 * using the SD card connector requires
			 * changing the default CON40 connector
			 * "DB-88F6710_MPP_2xRGMII_DEVICE_Jumper" to a
			 * different connector
			 * "DB-88F6710_MPP_RGMII_SD_Jumper".
			 */
			status = "disabled";
			/* No CD or WP GPIOs */
		};

		usb@50000 {
			status = "okay";
		};

		usb@51000 {
			status = "okay";
		};

		spi0: spi@10600 {
			status = "okay";

			spi-flash@0 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "mx25l25635e";
				reg = <0>; /* Chip select 0 */
				spi-max-frequency = <50000000>;
			};
		};

		pcie-controller {
			status = "okay";
			/*
			 * The two PCIe units are accessible through
			 * both standard PCIe slots and mini-PCIe
			 * slots on the board.
			 */
			pcie@1,0 {
				/* Port 0, Lane 0 */
				status = "okay";
			};
			pcie@2,0 {
				/* Port 1, Lane 0 */
				status = "okay";
			};
		};
	};
};