2016-03-29 09:57:30 +08:00
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/*
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* Rockchip SoC DP (Display Port) interface driver.
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*
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* Copyright (C) Fuzhou Rockchip Electronics Co., Ltd.
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* Author: Andy Yan <andy.yan@rock-chips.com>
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* Yakir Yang <ykk@rock-chips.com>
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* Jeff Chen <jeff.chen@rock-chips.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/component.h>
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#include <linux/mfd/syscon.h>
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2016-06-29 17:15:01 +08:00
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#include <linux/of_device.h>
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2016-03-29 09:57:30 +08:00
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#include <linux/of_graph.h>
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#include <linux/regmap.h>
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#include <linux/reset.h>
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#include <linux/clk.h>
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_dp_helper.h>
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#include <drm/drm_of.h>
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#include <drm/drm_panel.h>
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#include <video/of_videomode.h>
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#include <video/videomode.h>
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#include <drm/bridge/analogix_dp.h>
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#include "rockchip_drm_drv.h"
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#include "rockchip_drm_vop.h"
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2016-06-29 17:15:01 +08:00
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#define RK3288_GRF_SOC_CON6 0x25c
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#define RK3288_EDP_LCDC_SEL BIT(5)
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2016-06-29 17:15:26 +08:00
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#define RK3399_GRF_SOC_CON20 0x6250
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#define RK3399_EDP_LCDC_SEL BIT(5)
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2016-06-29 17:15:01 +08:00
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#define HIWORD_UPDATE(val, mask) (val | (mask) << 16)
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2016-03-29 09:57:30 +08:00
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#define to_dp(nm) container_of(nm, struct rockchip_dp_device, nm)
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2016-06-29 17:15:01 +08:00
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/**
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* struct rockchip_dp_chip_data - splite the grf setting of kind of chips
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* @lcdsel_grf_reg: grf register offset of lcdc select
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* @lcdsel_big: reg value of selecting vop big for eDP
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* @lcdsel_lit: reg value of selecting vop little for eDP
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* @chip_type: specific chip type
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*/
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struct rockchip_dp_chip_data {
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u32 lcdsel_grf_reg;
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u32 lcdsel_big;
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u32 lcdsel_lit;
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u32 chip_type;
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};
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2016-03-29 09:57:30 +08:00
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struct rockchip_dp_device {
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struct drm_device *drm_dev;
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struct device *dev;
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struct drm_encoder encoder;
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struct drm_display_mode mode;
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struct clk *pclk;
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struct regmap *grf;
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struct reset_control *rst;
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2016-06-29 17:15:01 +08:00
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const struct rockchip_dp_chip_data *data;
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2016-03-29 09:57:30 +08:00
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struct analogix_dp_plat_data plat_data;
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};
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static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
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{
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reset_control_assert(dp->rst);
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usleep_range(10, 20);
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reset_control_deassert(dp->rst);
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return 0;
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}
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static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
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{
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struct rockchip_dp_device *dp = to_dp(plat_data);
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int ret;
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ret = clk_prepare_enable(dp->pclk);
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if (ret < 0) {
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dev_err(dp->dev, "failed to enable pclk %d\n", ret);
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return ret;
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}
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ret = rockchip_dp_pre_init(dp);
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if (ret < 0) {
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dev_err(dp->dev, "failed to dp pre init %d\n", ret);
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return ret;
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}
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return 0;
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}
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static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data)
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{
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struct rockchip_dp_device *dp = to_dp(plat_data);
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clk_disable_unprepare(dp->pclk);
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return 0;
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}
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static bool
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rockchip_dp_drm_encoder_mode_fixup(struct drm_encoder *encoder,
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const struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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/* do nothing */
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return true;
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}
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static void rockchip_dp_drm_encoder_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted)
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{
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/* do nothing */
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}
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static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder)
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{
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struct rockchip_dp_device *dp = to_dp(encoder);
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int ret;
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u32 val;
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ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, encoder);
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if (ret < 0)
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return;
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if (ret)
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2016-06-29 17:15:01 +08:00
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val = dp->data->lcdsel_lit;
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2016-03-29 09:57:30 +08:00
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else
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2016-06-29 17:15:01 +08:00
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val = dp->data->lcdsel_big;
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2016-03-29 09:57:30 +08:00
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dev_dbg(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
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2016-06-29 17:15:01 +08:00
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ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
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2016-03-29 09:57:30 +08:00
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if (ret != 0) {
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dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
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return;
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}
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}
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static void rockchip_dp_drm_encoder_nop(struct drm_encoder *encoder)
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{
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/* do nothing */
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}
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2016-04-20 10:41:42 +08:00
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static int
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rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
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struct drm_crtc_state *crtc_state,
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struct drm_connector_state *conn_state)
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{
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struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
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2016-06-29 17:15:26 +08:00
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struct rockchip_dp_device *dp = to_dp(encoder);
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int ret;
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2016-04-20 10:41:42 +08:00
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/*
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* FIXME(Yakir): driver should configure the CRTC output video
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* mode with the display information which indicated the monitor
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* support colorimetry.
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*
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* But don't know why the CRTC driver seems could only output the
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* RGBaaa rightly. For example, if connect the "innolux,n116bge"
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* eDP screen, EDID would indicated that screen only accepted the
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* 6bpc mode. But if I configure CRTC to RGB666 output, then eDP
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* screen would show a blue picture (RGB888 show a green picture).
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* But if I configure CTRC to RGBaaa, and eDP driver still keep
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* RGB666 input video mode, then screen would works prefect.
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*/
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2016-06-29 17:15:26 +08:00
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2016-04-20 10:41:42 +08:00
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s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
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s->output_type = DRM_MODE_CONNECTOR_eDP;
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2016-06-29 17:15:26 +08:00
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if (dp->data->chip_type == RK3399_EDP) {
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/*
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* For RK3399, VOP Lit must code the out mode to RGB888,
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* VOP Big must code the out mode to RGB10.
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*/
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ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node,
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encoder);
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if (ret > 0)
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s->output_mode = ROCKCHIP_OUT_MODE_P888;
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}
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2016-04-20 10:41:42 +08:00
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return 0;
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}
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2016-03-29 09:57:30 +08:00
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static struct drm_encoder_helper_funcs rockchip_dp_encoder_helper_funcs = {
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.mode_fixup = rockchip_dp_drm_encoder_mode_fixup,
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.mode_set = rockchip_dp_drm_encoder_mode_set,
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.enable = rockchip_dp_drm_encoder_enable,
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.disable = rockchip_dp_drm_encoder_nop,
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2016-04-20 10:41:42 +08:00
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.atomic_check = rockchip_dp_drm_encoder_atomic_check,
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2016-03-29 09:57:30 +08:00
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};
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static void rockchip_dp_drm_encoder_destroy(struct drm_encoder *encoder)
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{
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drm_encoder_cleanup(encoder);
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}
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static struct drm_encoder_funcs rockchip_dp_encoder_funcs = {
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.destroy = rockchip_dp_drm_encoder_destroy,
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};
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static int rockchip_dp_init(struct rockchip_dp_device *dp)
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{
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struct device *dev = dp->dev;
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struct device_node *np = dev->of_node;
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int ret;
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dp->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
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if (IS_ERR(dp->grf)) {
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dev_err(dev, "failed to get rockchip,grf property\n");
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return PTR_ERR(dp->grf);
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}
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dp->pclk = devm_clk_get(dev, "pclk");
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if (IS_ERR(dp->pclk)) {
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dev_err(dev, "failed to get pclk property\n");
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return PTR_ERR(dp->pclk);
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}
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dp->rst = devm_reset_control_get(dev, "dp");
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if (IS_ERR(dp->rst)) {
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dev_err(dev, "failed to get dp reset control\n");
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return PTR_ERR(dp->rst);
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}
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ret = clk_prepare_enable(dp->pclk);
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if (ret < 0) {
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dev_err(dp->dev, "failed to enable pclk %d\n", ret);
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return ret;
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}
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ret = rockchip_dp_pre_init(dp);
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if (ret < 0) {
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dev_err(dp->dev, "failed to pre init %d\n", ret);
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return ret;
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}
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return 0;
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}
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static int rockchip_dp_drm_create_encoder(struct rockchip_dp_device *dp)
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{
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struct drm_encoder *encoder = &dp->encoder;
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struct drm_device *drm_dev = dp->drm_dev;
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struct device *dev = dp->dev;
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int ret;
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encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev,
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dev->of_node);
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DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs);
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ret = drm_encoder_init(drm_dev, encoder, &rockchip_dp_encoder_funcs,
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DRM_MODE_ENCODER_TMDS, NULL);
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if (ret) {
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DRM_ERROR("failed to initialize encoder with drm\n");
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return ret;
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}
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drm_encoder_helper_add(encoder, &rockchip_dp_encoder_helper_funcs);
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return 0;
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}
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static int rockchip_dp_bind(struct device *dev, struct device *master,
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void *data)
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{
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struct rockchip_dp_device *dp = dev_get_drvdata(dev);
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2016-06-29 17:15:01 +08:00
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const struct rockchip_dp_chip_data *dp_data;
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2016-03-29 09:57:30 +08:00
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struct drm_device *drm_dev = data;
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int ret;
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/*
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* Just like the probe function said, we don't need the
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* device drvrate anymore, we should leave the charge to
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* analogix dp driver, set the device drvdata to NULL.
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*/
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dev_set_drvdata(dev, NULL);
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2016-06-29 17:15:01 +08:00
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dp_data = of_device_get_match_data(dev);
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if (!dp_data)
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return -ENODEV;
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2016-03-29 09:57:30 +08:00
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ret = rockchip_dp_init(dp);
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if (ret < 0)
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return ret;
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2016-06-29 17:15:01 +08:00
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dp->data = dp_data;
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2016-03-29 09:57:30 +08:00
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dp->drm_dev = drm_dev;
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ret = rockchip_dp_drm_create_encoder(dp);
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if (ret) {
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DRM_ERROR("failed to create drm encoder\n");
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return ret;
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}
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dp->plat_data.encoder = &dp->encoder;
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2016-06-29 17:15:01 +08:00
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dp->plat_data.dev_type = dp->data->chip_type;
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2016-03-29 09:57:30 +08:00
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dp->plat_data.power_on = rockchip_dp_poweron;
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dp->plat_data.power_off = rockchip_dp_powerdown;
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return analogix_dp_bind(dev, dp->drm_dev, &dp->plat_data);
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}
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static void rockchip_dp_unbind(struct device *dev, struct device *master,
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void *data)
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{
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return analogix_dp_unbind(dev, master, data);
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}
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static const struct component_ops rockchip_dp_component_ops = {
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.bind = rockchip_dp_bind,
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.unbind = rockchip_dp_unbind,
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};
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static int rockchip_dp_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *panel_node, *port, *endpoint;
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struct rockchip_dp_device *dp;
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struct drm_panel *panel;
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port = of_graph_get_port_by_id(dev->of_node, 1);
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if (!port) {
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dev_err(dev, "can't find output port\n");
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return -EINVAL;
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}
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endpoint = of_get_child_by_name(port, "endpoint");
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of_node_put(port);
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if (!endpoint) {
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dev_err(dev, "no output endpoint found\n");
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return -EINVAL;
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}
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|
|
panel_node = of_graph_get_remote_port_parent(endpoint);
|
|
|
|
of_node_put(endpoint);
|
|
|
|
if (!panel_node) {
|
|
|
|
dev_err(dev, "no output node found\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
panel = of_drm_find_panel(panel_node);
|
|
|
|
if (!panel) {
|
|
|
|
DRM_ERROR("failed to find panel\n");
|
|
|
|
of_node_put(panel_node);
|
|
|
|
return -EPROBE_DEFER;
|
|
|
|
}
|
|
|
|
|
|
|
|
of_node_put(panel_node);
|
|
|
|
|
|
|
|
dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL);
|
|
|
|
if (!dp)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
dp->dev = dev;
|
|
|
|
|
|
|
|
dp->plat_data.panel = panel;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We just use the drvdata until driver run into component
|
|
|
|
* add function, and then we would set drvdata to null, so
|
|
|
|
* that analogix dp driver could take charge of the drvdata.
|
|
|
|
*/
|
|
|
|
platform_set_drvdata(pdev, dp);
|
|
|
|
|
|
|
|
return component_add(dev, &rockchip_dp_component_ops);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int rockchip_dp_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
component_del(&pdev->dev, &rockchip_dp_component_ops);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-06-06 22:53:33 +08:00
|
|
|
static const struct dev_pm_ops rockchip_dp_pm_ops = {
|
2016-03-29 09:57:30 +08:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
2016-06-06 22:53:33 +08:00
|
|
|
.suspend = analogix_dp_suspend,
|
|
|
|
.resume_early = analogix_dp_resume,
|
2016-03-29 09:57:30 +08:00
|
|
|
#endif
|
|
|
|
};
|
|
|
|
|
2016-06-29 17:15:26 +08:00
|
|
|
static const struct rockchip_dp_chip_data rk3399_edp = {
|
|
|
|
.lcdsel_grf_reg = RK3399_GRF_SOC_CON20,
|
|
|
|
.lcdsel_big = HIWORD_UPDATE(0, RK3399_EDP_LCDC_SEL),
|
|
|
|
.lcdsel_lit = HIWORD_UPDATE(RK3399_EDP_LCDC_SEL, RK3399_EDP_LCDC_SEL),
|
|
|
|
.chip_type = RK3399_EDP,
|
|
|
|
};
|
|
|
|
|
2016-06-29 17:15:01 +08:00
|
|
|
static const struct rockchip_dp_chip_data rk3288_dp = {
|
|
|
|
.lcdsel_grf_reg = RK3288_GRF_SOC_CON6,
|
|
|
|
.lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL),
|
|
|
|
.lcdsel_lit = HIWORD_UPDATE(RK3288_EDP_LCDC_SEL, RK3288_EDP_LCDC_SEL),
|
|
|
|
.chip_type = RK3288_DP,
|
|
|
|
};
|
|
|
|
|
2016-03-29 09:57:30 +08:00
|
|
|
static const struct of_device_id rockchip_dp_dt_ids[] = {
|
2016-06-29 17:15:01 +08:00
|
|
|
{.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp },
|
2016-06-29 17:15:26 +08:00
|
|
|
{.compatible = "rockchip,rk3399-edp", .data = &rk3399_edp },
|
2016-03-29 09:57:30 +08:00
|
|
|
{}
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids);
|
|
|
|
|
|
|
|
static struct platform_driver rockchip_dp_driver = {
|
|
|
|
.probe = rockchip_dp_probe,
|
|
|
|
.remove = rockchip_dp_remove,
|
|
|
|
.driver = {
|
|
|
|
.name = "rockchip-dp",
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.pm = &rockchip_dp_pm_ops,
|
|
|
|
.of_match_table = of_match_ptr(rockchip_dp_dt_ids),
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
module_platform_driver(rockchip_dp_driver);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
|
|
|
|
MODULE_AUTHOR("Jeff chen <jeff.chen@rock-chips.com>");
|
|
|
|
MODULE_DESCRIPTION("Rockchip Specific Analogix-DP Driver Extension");
|
|
|
|
MODULE_LICENSE("GPL v2");
|