2005-04-17 06:20:36 +08:00
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/*
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* linux/arch/arm/mm/flush.c
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*
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* Copyright (C) 1995-2002 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/pagemap.h>
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2010-12-16 04:14:45 +08:00
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#include <linux/highmem.h>
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2005-04-17 06:20:36 +08:00
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#include <asm/cacheflush.h>
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2008-08-11 01:10:19 +08:00
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#include <asm/cachetype.h>
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2010-03-30 04:46:02 +08:00
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#include <asm/highmem.h>
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2009-11-05 21:29:36 +08:00
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#include <asm/smp_plat.h>
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2005-05-11 00:31:43 +08:00
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#include <asm/tlbflush.h>
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2013-05-17 19:33:28 +08:00
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#include <linux/hugetlb.h>
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2005-05-11 00:31:43 +08:00
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2006-08-22 00:06:38 +08:00
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#include "mm.h"
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2005-05-11 00:31:43 +08:00
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#ifdef CONFIG_CPU_CACHE_VIPT
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2005-09-08 22:32:23 +08:00
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2005-09-30 23:07:04 +08:00
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static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
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{
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2011-07-02 21:46:27 +08:00
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unsigned long to = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
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2006-03-11 06:26:47 +08:00
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const int zero = 0;
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2005-09-30 23:07:04 +08:00
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2011-07-02 22:20:44 +08:00
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set_top_pte(to, pfn_pte(pfn, PAGE_KERNEL));
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2005-09-30 23:07:04 +08:00
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asm( "mcrr p15, 0, %1, %0, c14\n"
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2009-10-25 05:36:36 +08:00
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" mcr p15, 0, %2, c7, c10, 4"
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2005-09-30 23:07:04 +08:00
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:
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2006-03-11 06:26:47 +08:00
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: "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero)
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2005-09-30 23:07:04 +08:00
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: "cc");
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}
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2010-09-13 23:19:41 +08:00
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static void flush_icache_alias(unsigned long pfn, unsigned long vaddr, unsigned long len)
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{
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2011-07-02 22:20:44 +08:00
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unsigned long va = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
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2010-09-13 23:19:41 +08:00
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unsigned long offset = vaddr & (PAGE_SIZE - 1);
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unsigned long to;
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2011-07-02 22:20:44 +08:00
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set_top_pte(va, pfn_pte(pfn, PAGE_KERNEL));
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to = va + offset;
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2010-09-13 23:19:41 +08:00
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flush_icache_range(to, to + len);
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}
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2005-09-08 22:32:23 +08:00
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void flush_cache_mm(struct mm_struct *mm)
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{
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if (cache_is_vivt()) {
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2009-10-25 18:40:02 +08:00
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vivt_flush_cache_mm(mm);
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2005-09-08 22:32:23 +08:00
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return;
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}
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if (cache_is_vipt_aliasing()) {
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asm( "mcr p15, 0, %0, c7, c14, 0\n"
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2009-10-25 05:36:36 +08:00
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" mcr p15, 0, %0, c7, c10, 4"
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2005-09-08 22:32:23 +08:00
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:
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: "r" (0)
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: "cc");
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}
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}
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void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
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{
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if (cache_is_vivt()) {
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2009-10-25 18:40:02 +08:00
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vivt_flush_cache_range(vma, start, end);
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2005-09-08 22:32:23 +08:00
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return;
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}
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if (cache_is_vipt_aliasing()) {
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asm( "mcr p15, 0, %0, c7, c14, 0\n"
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2009-10-25 05:36:36 +08:00
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" mcr p15, 0, %0, c7, c10, 4"
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2005-09-08 22:32:23 +08:00
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:
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: "r" (0)
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: "cc");
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}
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2009-10-25 21:35:13 +08:00
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2009-10-25 22:12:27 +08:00
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if (vma->vm_flags & VM_EXEC)
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2009-10-25 21:35:13 +08:00
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__flush_icache_all();
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2005-09-08 22:32:23 +08:00
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}
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void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)
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{
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if (cache_is_vivt()) {
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2009-10-25 18:40:02 +08:00
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vivt_flush_cache_page(vma, user_addr, pfn);
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2005-09-08 22:32:23 +08:00
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return;
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}
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2009-10-25 05:58:40 +08:00
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if (cache_is_vipt_aliasing()) {
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2005-09-08 22:32:23 +08:00
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flush_pfn_alias(pfn, user_addr);
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2009-10-25 05:58:40 +08:00
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__flush_icache_all();
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}
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2009-10-25 21:35:13 +08:00
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if (vma->vm_flags & VM_EXEC && icache_is_vivt_asid_tagged())
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__flush_icache_all();
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2005-09-08 22:32:23 +08:00
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}
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2010-09-13 23:19:41 +08:00
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2009-11-05 21:29:36 +08:00
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#else
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2010-09-13 23:19:41 +08:00
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#define flush_pfn_alias(pfn,vaddr) do { } while (0)
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#define flush_icache_alias(pfn,vaddr,len) do { } while (0)
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2009-11-05 21:29:36 +08:00
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#endif
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2006-09-03 01:43:20 +08:00
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2014-04-29 11:20:52 +08:00
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#define FLAG_PA_IS_EXEC 1
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#define FLAG_PA_CORE_IN_MM 2
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2009-11-05 21:29:36 +08:00
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static void flush_ptrace_access_other(void *args)
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{
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__flush_icache_all();
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}
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2014-04-29 11:20:52 +08:00
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static inline
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void __flush_ptrace_access(struct page *page, unsigned long uaddr, void *kaddr,
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unsigned long len, unsigned int flags)
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2006-09-03 01:43:20 +08:00
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{
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if (cache_is_vivt()) {
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2014-04-29 11:20:52 +08:00
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if (flags & FLAG_PA_CORE_IN_MM) {
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2009-11-05 21:29:36 +08:00
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unsigned long addr = (unsigned long)kaddr;
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__cpuc_coherent_kern_range(addr, addr + len);
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}
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2006-09-03 01:43:20 +08:00
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return;
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}
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if (cache_is_vipt_aliasing()) {
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flush_pfn_alias(page_to_pfn(page), uaddr);
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2009-10-25 05:58:40 +08:00
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__flush_icache_all();
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2006-09-03 01:43:20 +08:00
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return;
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}
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2010-09-13 23:19:41 +08:00
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/* VIPT non-aliasing D-cache */
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2014-04-29 11:20:52 +08:00
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if (flags & FLAG_PA_IS_EXEC) {
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2006-09-03 01:43:20 +08:00
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unsigned long addr = (unsigned long)kaddr;
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2010-09-13 23:19:41 +08:00
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if (icache_is_vipt_aliasing())
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flush_icache_alias(page_to_pfn(page), uaddr, len);
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else
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__cpuc_coherent_kern_range(addr, addr + len);
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2009-11-05 21:29:36 +08:00
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if (cache_ops_need_broadcast())
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smp_call_function(flush_ptrace_access_other,
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NULL, 1);
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2006-09-03 01:43:20 +08:00
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}
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}
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2009-11-05 21:29:36 +08:00
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2014-04-29 11:20:52 +08:00
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static
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void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
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unsigned long uaddr, void *kaddr, unsigned long len)
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{
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unsigned int flags = 0;
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if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm)))
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flags |= FLAG_PA_CORE_IN_MM;
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if (vma->vm_flags & VM_EXEC)
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flags |= FLAG_PA_IS_EXEC;
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__flush_ptrace_access(page, uaddr, kaddr, len, flags);
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}
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void flush_uprobe_xol_access(struct page *page, unsigned long uaddr,
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void *kaddr, unsigned long len)
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{
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unsigned int flags = FLAG_PA_CORE_IN_MM|FLAG_PA_IS_EXEC;
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__flush_ptrace_access(page, uaddr, kaddr, len, flags);
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}
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2009-11-05 21:29:36 +08:00
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/*
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* Copy user data from/to a page which is mapped into a different
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* processes address space. Really, we want to allow our "user
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* space" model to handle this.
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*
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* Note that this code needs to run on the current CPU.
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*/
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void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
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unsigned long uaddr, void *dst, const void *src,
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unsigned long len)
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{
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#ifdef CONFIG_SMP
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preempt_disable();
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2005-05-11 00:31:43 +08:00
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#endif
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2009-11-05 21:29:36 +08:00
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memcpy(dst, src, len);
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flush_ptrace_access(vma, page, uaddr, dst, len);
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#ifdef CONFIG_SMP
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preempt_enable();
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#endif
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}
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2005-04-17 06:20:36 +08:00
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2005-06-20 16:51:03 +08:00
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void __flush_dcache_page(struct address_space *mapping, struct page *page)
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2005-04-17 06:20:36 +08:00
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{
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/*
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* Writeback any data associated with the kernel mapping of this
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* page. This ensures that data in the physical page is mutually
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* coherent with the kernels mapping.
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*/
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2010-03-30 04:46:02 +08:00
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if (!PageHighMem(page)) {
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2013-05-17 19:33:28 +08:00
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size_t page_size = PAGE_SIZE << compound_order(page);
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__cpuc_flush_dcache_area(page_address(page), page_size);
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2010-03-30 04:46:02 +08:00
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} else {
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2013-05-17 19:33:28 +08:00
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unsigned long i;
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2013-04-05 10:16:14 +08:00
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if (cache_is_vipt_nonaliasing()) {
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2013-05-17 19:33:28 +08:00
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for (i = 0; i < (1 << compound_order(page)); i++) {
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2013-12-17 00:25:52 +08:00
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void *addr = kmap_atomic(page + i);
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2013-04-05 10:16:14 +08:00
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__cpuc_flush_dcache_area(addr, PAGE_SIZE);
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2013-05-17 19:33:28 +08:00
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kunmap_atomic(addr);
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}
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} else {
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for (i = 0; i < (1 << compound_order(page)); i++) {
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2013-12-17 00:25:52 +08:00
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void *addr = kmap_high_get(page + i);
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2013-05-17 19:33:28 +08:00
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if (addr) {
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__cpuc_flush_dcache_area(addr, PAGE_SIZE);
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2013-12-17 00:25:52 +08:00
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kunmap_high(page + i);
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2013-05-17 19:33:28 +08:00
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}
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2013-04-05 10:16:14 +08:00
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}
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2010-03-30 04:46:02 +08:00
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}
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}
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2005-04-17 06:20:36 +08:00
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/*
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2005-06-20 16:51:03 +08:00
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* If this is a page cache page, and we have an aliasing VIPT cache,
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* we only need to do one flush - which would be at the relevant
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2005-05-11 00:31:43 +08:00
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* userspace colour, which is congruent with page->index.
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*/
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2009-10-25 06:05:34 +08:00
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if (mapping && cache_is_vipt_aliasing())
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2005-06-20 16:51:03 +08:00
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flush_pfn_alias(page_to_pfn(page),
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page->index << PAGE_CACHE_SHIFT);
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}
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static void __flush_dcache_aliases(struct address_space *mapping, struct page *page)
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{
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struct mm_struct *mm = current->active_mm;
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struct vm_area_struct *mpnt;
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pgoff_t pgoff;
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2005-05-11 00:31:43 +08:00
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2005-04-17 06:20:36 +08:00
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/*
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* There are possible user space mappings of this page:
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* - VIVT cache: we need to also write back and invalidate all user
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* data in the current VM view associated with this page.
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* - aliasing VIPT: we only need to find one mapping of this page.
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*/
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pgoff = page->index << (PAGE_CACHE_SHIFT - PAGE_SHIFT);
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flush_dcache_mmap_lock(mapping);
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2012-10-09 07:31:25 +08:00
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vma_interval_tree_foreach(mpnt, &mapping->i_mmap, pgoff, pgoff) {
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2005-04-17 06:20:36 +08:00
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unsigned long offset;
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/*
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* If this VMA is not in our MM, we can ignore it.
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*/
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if (mpnt->vm_mm != mm)
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continue;
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if (!(mpnt->vm_flags & VM_MAYSHARE))
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continue;
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offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
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flush_cache_page(mpnt, mpnt->vm_start + offset, page_to_pfn(page));
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}
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flush_dcache_mmap_unlock(mapping);
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}
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2010-09-13 22:58:06 +08:00
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#if __LINUX_ARM_ARCH__ >= 6
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void __sync_icache_dcache(pte_t pteval)
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{
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unsigned long pfn;
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struct page *page;
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struct address_space *mapping;
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if (cache_is_vipt_nonaliasing() && !pte_exec(pteval))
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/* only flush non-aliasing VIPT caches for exec mappings */
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return;
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pfn = pte_pfn(pteval);
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if (!pfn_valid(pfn))
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return;
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page = pfn_to_page(pfn);
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if (cache_is_vipt_aliasing())
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mapping = page_mapping(page);
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else
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mapping = NULL;
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if (!test_and_set_bit(PG_dcache_clean, &page->flags))
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__flush_dcache_page(mapping, page);
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2011-05-16 22:41:15 +08:00
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if (pte_exec(pteval))
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2010-09-13 22:58:06 +08:00
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__flush_icache_all();
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}
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#endif
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2005-04-17 06:20:36 +08:00
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/*
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* Ensure cache coherency between kernel mapping and userspace mapping
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* of this page.
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*
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* We have three cases to consider:
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* - VIPT non-aliasing cache: fully coherent so nothing required.
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* - VIVT: fully aliasing, so we need to handle every alias in our
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* current VM view.
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* - VIPT aliasing: need to handle one alias in our current VM view.
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*
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* If we need to handle aliasing:
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|
* If the page only exists in the page cache and there are no user
|
|
|
|
* space mappings, we can be lazy and remember that we may have dirty
|
|
|
|
* kernel cache lines for later. Otherwise, we assume we have
|
|
|
|
* aliasing mappings.
|
2005-12-01 00:02:54 +08:00
|
|
|
*
|
2011-05-16 18:25:21 +08:00
|
|
|
* Note that we disable the lazy flush for SMP configurations where
|
|
|
|
* the cache maintenance operations are not automatically broadcasted.
|
2005-04-17 06:20:36 +08:00
|
|
|
*/
|
|
|
|
void flush_dcache_page(struct page *page)
|
|
|
|
{
|
2009-10-25 18:23:04 +08:00
|
|
|
struct address_space *mapping;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The zero page is never written to, so never has any dirty
|
|
|
|
* cache lines, and therefore never needs to be flushed.
|
|
|
|
*/
|
|
|
|
if (page == ZERO_PAGE(0))
|
|
|
|
return;
|
|
|
|
|
|
|
|
mapping = page_mapping(page);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2010-09-13 22:58:37 +08:00
|
|
|
if (!cache_ops_need_broadcast() &&
|
ARM: 7746/1: mm: lazy cache flushing on non-mapped pages
Currently flush_dcache_page() thinks pages as non-mapped if
mapping_mapped(mapping) return false. This approach is very
coase:
- mmap on part of file may cause all pages backed on
the file being thought as mmaped
- file-backed pages aren't mapped into user space actually
if the memory mmaped on the file isn't accessed
This patch uses page_mapped() to decide if the page has been
mapped.
From the attached test code, I find there is much performance
improvement(>25%) when accessing page caches via read under this
situations, so memcpy benefits a lot from not flushing cache
under this situation.
No. read time without the patch No. read time with the patch
================================================================
No. 0, time 22615636 us No. 0, time 22014717 us
No. 1, time 4387851 us No. 1, time 3113184 us
No. 2, time 4276535 us No. 2, time 3005244 us
No. 3, time 4259821 us No. 3, time 3001565 us
No. 4, time 4263811 us No. 4, time 3002748 us
No. 5, time 4258486 us No. 5, time 3004104 us
No. 6, time 4253009 us No. 6, time 3002188 us
No. 7, time 4262809 us No. 7, time 2998196 us
No. 8, time 4264525 us No. 8, time 3007255 us
No. 9, time 4267795 us No. 9, time 3005094 us
1), No.0. is to read the file from storage device, and others are
to read the file from page caches basically.
2), file size is 512M, and is on ext4 over usb mass storage.
3), the test is done on Pandaboard.
unsigned int sum = 0;
unsigned long sum_val = 0;
static unsigned long tv_diff(struct timeval *tv1, struct timeval *tv2)
{
return (tv2->tv_sec - tv1->tv_sec) * 1000000 +
(tv2->tv_usec - tv1->tv_usec);
}
int main(int argc, char *argv[])
{
char *mbuf, fbuf;
int fd;
int i;
unsigned long page_size, size;
struct stat stat;
struct timeval t1, t2;
unsigned char *rbuf = malloc(32 * page_size);
if (!rbuf) {
printf(" %sn", "malloc failed");
exit(-1);
}
page_size = getpagesize();
fd = open(argv[1], O_RDWR);
assert(fd >= 0);
fstat(fd, &stat);
size = stat.st_size;
printf("%s: file %s, size %lu, page size %lun",
argv[0],
argv[1], size, page_size);
gettimeofday(&t1, NULL);
mbuf = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
if (!mbuf) {
printf(" %sn", "mmap failed");
exit(-1);
}
for (i = 0 ; i < size ; i += (page_size * 32)) {
int rcnt;
lseek(fd, i, SEEK_SET);
rcnt = read(fd, rbuf, page_size * 32);
if (rcnt != page_size * 32) {
printf("%s: read faildn", __func__);
exit(-1);
}
}
free(rbuf);
munmap(mbuf, size);
gettimeofday(&t2, NULL);
printf("tread mmaped time: %luusn", tv_diff(&t1, &t2));
close(fd);
}
Cc: Michel Lespinasse <walken@google.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Nicolas Pitre <nicolas.pitre@linaro.org>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ming Lei <ming.lei@canonical.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-05 09:44:00 +08:00
|
|
|
mapping && !page_mapped(page))
|
2010-09-13 22:57:36 +08:00
|
|
|
clear_bit(PG_dcache_clean, &page->flags);
|
2010-09-13 22:58:37 +08:00
|
|
|
else {
|
2005-04-17 06:20:36 +08:00
|
|
|
__flush_dcache_page(mapping, page);
|
2005-06-20 16:51:03 +08:00
|
|
|
if (mapping && cache_is_vivt())
|
|
|
|
__flush_dcache_aliases(mapping, page);
|
2008-06-13 17:28:36 +08:00
|
|
|
else if (mapping)
|
|
|
|
__flush_icache_all();
|
2010-09-13 22:57:36 +08:00
|
|
|
set_bit(PG_dcache_clean, &page->flags);
|
2005-06-20 16:51:03 +08:00
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(flush_dcache_page);
|
2013-06-11 04:10:12 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Ensure cache coherency for the kernel mapping of this page. We can
|
|
|
|
* assume that the page is pinned via kmap.
|
|
|
|
*
|
|
|
|
* If the page only exists in the page cache and there are no user
|
|
|
|
* space mappings, this is a no-op since the page was already marked
|
|
|
|
* dirty at creation. Otherwise, we need to flush the dirty kernel
|
|
|
|
* cache lines directly.
|
|
|
|
*/
|
|
|
|
void flush_kernel_dcache_page(struct page *page)
|
|
|
|
{
|
|
|
|
if (cache_is_vivt() || cache_is_vipt_aliasing()) {
|
|
|
|
struct address_space *mapping;
|
|
|
|
|
|
|
|
mapping = page_mapping(page);
|
|
|
|
|
|
|
|
if (!mapping || mapping_mapped(mapping)) {
|
|
|
|
void *addr;
|
|
|
|
|
|
|
|
addr = page_address(page);
|
|
|
|
/*
|
|
|
|
* kmap_atomic() doesn't set the page virtual
|
|
|
|
* address for highmem pages, and
|
|
|
|
* kunmap_atomic() takes care of cache
|
|
|
|
* flushing already.
|
|
|
|
*/
|
|
|
|
if (!IS_ENABLED(CONFIG_HIGHMEM) || addr)
|
|
|
|
__cpuc_flush_dcache_area(addr, PAGE_SIZE);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(flush_kernel_dcache_page);
|
2006-12-31 07:17:40 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Flush an anonymous page so that users of get_user_pages()
|
|
|
|
* can safely access the data. The expected sequence is:
|
|
|
|
*
|
|
|
|
* get_user_pages()
|
|
|
|
* -> flush_anon_page
|
|
|
|
* memcpy() to/from page
|
|
|
|
* if written to page, flush_dcache_page()
|
|
|
|
*/
|
|
|
|
void __flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
|
|
|
|
{
|
|
|
|
unsigned long pfn;
|
|
|
|
|
|
|
|
/* VIPT non-aliasing caches need do nothing */
|
|
|
|
if (cache_is_vipt_nonaliasing())
|
|
|
|
return;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Write back and invalidate userspace mapping.
|
|
|
|
*/
|
|
|
|
pfn = page_to_pfn(page);
|
|
|
|
if (cache_is_vivt()) {
|
|
|
|
flush_cache_page(vma, vmaddr, pfn);
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* For aliasing VIPT, we can flush an alias of the
|
|
|
|
* userspace address only.
|
|
|
|
*/
|
|
|
|
flush_pfn_alias(pfn, vmaddr);
|
2009-10-25 05:58:40 +08:00
|
|
|
__flush_icache_all();
|
2006-12-31 07:17:40 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Invalidate kernel mapping. No data should be contained
|
|
|
|
* in this mapping of the page. FIXME: this is overkill
|
|
|
|
* since we actually ask for a write-back and invalidate.
|
|
|
|
*/
|
2009-11-26 20:56:21 +08:00
|
|
|
__cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);
|
2006-12-31 07:17:40 +08:00
|
|
|
}
|
2014-10-10 06:29:20 +08:00
|
|
|
|
|
|
|
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
|
|
|
|
#ifdef CONFIG_HAVE_RCU_TABLE_FREE
|
|
|
|
void pmdp_splitting_flush(struct vm_area_struct *vma, unsigned long address,
|
|
|
|
pmd_t *pmdp)
|
|
|
|
{
|
|
|
|
pmd_t pmd = pmd_mksplitting(*pmdp);
|
|
|
|
VM_BUG_ON(address & ~PMD_MASK);
|
|
|
|
set_pmd_at(vma->vm_mm, address, pmdp, pmd);
|
|
|
|
|
|
|
|
/* dummy IPI to serialise against fast_gup */
|
|
|
|
kick_all_cpus_sync();
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_HAVE_RCU_TABLE_FREE */
|
|
|
|
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
|