bus: Add support for Moxtet bus
On the Turris Mox router different modules can be connected to the main
CPU board: currently a module with a SFP cage, a module with MiniPCIe
connector, a PCIe pass-through MiniPCIe connector module, a 4-port
switch module, an 8-port switch module, and a 4-port USB3 module.
For example:
[CPU]-[PCIe-pass-through]-[PCIe]-[8-port switch]-[8-port switch]-[SFP]
Each of this modules has an input and output shift register, and these
are connected via SPI to the CPU board.
Via SPI we are able to discover which modules are connected, in which
order, and we can also read some information about the modules (eg.
their interrupt status), and configure them.
From each module 8 bits can be read (of which low 4 bits identify the
module) and 8 bits can be written.
For example from the module with a SFP cage we can read the LOS,
TX-FAULT and MOD-DEF0 signals, while we can write TX-DISABLE and
RATE-SELECT signals.
This driver creates a new bus type, called "moxtet". For each Mox module
it finds via SPI, it creates a new device on the moxtet bus so that
drivers can be written for them.
It also implements a virtual interrupt controller for the modules which
send their interrupt status over the SPI shift register. These modules
do this in addition to sending their interrupt status via the shared
interrupt line. When the shared interrupt is triggered, we read from the
shift register and handle IRQs for all devices which are in interrupt.
The topology of how Mox modules are connected can then be read by
listing /sys/bus/moxtet/devices.
Link: https://lore.kernel.org/r/20190812161118.21476-2-marek.behun@nic.cz
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-13 00:11:14 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Turris Mox module configuration bus driver
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*
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2021-04-10 04:27:04 +08:00
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* Copyright (C) 2019 Marek Behún <kabel@kernel.org>
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bus: Add support for Moxtet bus
On the Turris Mox router different modules can be connected to the main
CPU board: currently a module with a SFP cage, a module with MiniPCIe
connector, a PCIe pass-through MiniPCIe connector module, a 4-port
switch module, an 8-port switch module, and a 4-port USB3 module.
For example:
[CPU]-[PCIe-pass-through]-[PCIe]-[8-port switch]-[8-port switch]-[SFP]
Each of this modules has an input and output shift register, and these
are connected via SPI to the CPU board.
Via SPI we are able to discover which modules are connected, in which
order, and we can also read some information about the modules (eg.
their interrupt status), and configure them.
From each module 8 bits can be read (of which low 4 bits identify the
module) and 8 bits can be written.
For example from the module with a SFP cage we can read the LOS,
TX-FAULT and MOD-DEF0 signals, while we can write TX-DISABLE and
RATE-SELECT signals.
This driver creates a new bus type, called "moxtet". For each Mox module
it finds via SPI, it creates a new device on the moxtet bus so that
drivers can be written for them.
It also implements a virtual interrupt controller for the modules which
send their interrupt status over the SPI shift register. These modules
do this in addition to sending their interrupt status via the shared
interrupt line. When the shared interrupt is triggered, we read from the
shift register and handle IRQs for all devices which are in interrupt.
The topology of how Mox modules are connected can then be read by
listing /sys/bus/moxtet/devices.
Link: https://lore.kernel.org/r/20190812161118.21476-2-marek.behun@nic.cz
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-13 00:11:14 +08:00
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*/
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#ifndef __LINUX_MOXTET_H
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#define __LINUX_MOXTET_H
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#include <linux/device.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/mutex.h>
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#define TURRIS_MOX_MAX_MODULES 10
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enum turris_mox_cpu_module_id {
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TURRIS_MOX_CPU_ID_EMMC = 0x00,
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TURRIS_MOX_CPU_ID_SD = 0x10,
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};
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enum turris_mox_module_id {
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TURRIS_MOX_MODULE_FIRST = 0x01,
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TURRIS_MOX_MODULE_SFP = 0x01,
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TURRIS_MOX_MODULE_PCI = 0x02,
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TURRIS_MOX_MODULE_TOPAZ = 0x03,
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TURRIS_MOX_MODULE_PERIDOT = 0x04,
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TURRIS_MOX_MODULE_USB3 = 0x05,
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TURRIS_MOX_MODULE_PCI_BRIDGE = 0x06,
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TURRIS_MOX_MODULE_LAST = 0x06,
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};
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#define MOXTET_NIRQS 16
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extern struct bus_type moxtet_type;
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struct moxtet {
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struct device *dev;
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struct mutex lock;
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u8 modules[TURRIS_MOX_MAX_MODULES];
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int count;
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u8 tx[TURRIS_MOX_MAX_MODULES];
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int dev_irq;
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struct {
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struct irq_domain *domain;
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struct irq_chip chip;
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unsigned long masked, exists;
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struct moxtet_irqpos {
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u8 idx;
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u8 bit;
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} position[MOXTET_NIRQS];
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} irq;
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#ifdef CONFIG_DEBUG_FS
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struct dentry *debugfs_root;
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#endif
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};
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struct moxtet_driver {
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const enum turris_mox_module_id *id_table;
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struct device_driver driver;
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};
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static inline struct moxtet_driver *
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to_moxtet_driver(struct device_driver *drv)
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{
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if (!drv)
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return NULL;
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return container_of(drv, struct moxtet_driver, driver);
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}
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extern int __moxtet_register_driver(struct module *owner,
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struct moxtet_driver *mdrv);
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static inline void moxtet_unregister_driver(struct moxtet_driver *mdrv)
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{
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if (mdrv)
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driver_unregister(&mdrv->driver);
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}
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#define moxtet_register_driver(driver) \
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__moxtet_register_driver(THIS_MODULE, driver)
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#define module_moxtet_driver(__moxtet_driver) \
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module_driver(__moxtet_driver, moxtet_register_driver, \
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moxtet_unregister_driver)
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struct moxtet_device {
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struct device dev;
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struct moxtet *moxtet;
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enum turris_mox_module_id id;
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unsigned int idx;
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};
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extern int moxtet_device_read(struct device *dev);
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extern int moxtet_device_write(struct device *dev, u8 val);
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extern int moxtet_device_written(struct device *dev);
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static inline struct moxtet_device *
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to_moxtet_device(struct device *dev)
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{
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if (!dev)
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return NULL;
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return container_of(dev, struct moxtet_device, dev);
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}
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#endif /* __LINUX_MOXTET_H */
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