85 lines
2.0 KiB
C
85 lines
2.0 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* S3C64XX - PM core support for arch/arm/plat-s3c/pm.c
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*/
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#ifndef __MACH_S3C64XX_PM_CORE_H
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#define __MACH_S3C64XX_PM_CORE_H __FILE__
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#include <linux/serial_s3c.h>
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#include <linux/delay.h>
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#include "regs-gpio.h"
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#include "regs-clock.h"
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#include "map.h"
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static inline void s3c_pm_debug_init_uart(void)
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{
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#ifdef CONFIG_SAMSUNG_PM_DEBUG
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u32 tmp = __raw_readl(S3C_PCLK_GATE);
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/* As a note, since the S3C64XX UARTs generally have multiple
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* clock sources, we simply enable PCLK at the moment and hope
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* that the resume settings for the UART are suitable for the
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* use with PCLK.
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*/
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tmp |= S3C_CLKCON_PCLK_UART0;
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tmp |= S3C_CLKCON_PCLK_UART1;
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tmp |= S3C_CLKCON_PCLK_UART2;
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tmp |= S3C_CLKCON_PCLK_UART3;
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__raw_writel(tmp, S3C_PCLK_GATE);
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udelay(10);
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#endif
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}
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static inline void s3c_pm_arch_prepare_irqs(void)
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{
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/* VIC should have already been taken care of */
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/* clear any pending EINT0 interrupts */
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__raw_writel(__raw_readl(S3C64XX_EINT0PEND), S3C64XX_EINT0PEND);
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}
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static inline void s3c_pm_arch_stop_clocks(void)
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{
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}
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static inline void s3c_pm_arch_show_resume_irqs(void)
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{
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}
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/* make these defines, we currently do not have any need to change
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* the IRQ wake controls depending on the CPU we are running on */
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#ifdef CONFIG_PM_SLEEP
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#define s3c_irqwake_eintallow ((1 << 28) - 1)
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#define s3c_irqwake_intallow (~0)
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#else
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#define s3c_irqwake_eintallow 0
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#define s3c_irqwake_intallow 0
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#endif
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static inline void s3c_pm_restored_gpios(void)
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{
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/* ensure sleep mode has been cleared from the system */
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__raw_writel(0, S3C64XX_SLPEN);
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}
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static inline void samsung_pm_saved_gpios(void)
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{
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/* turn on the sleep mode and keep it there, as it seems that during
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* suspend the xCON registers get re-set and thus you can end up with
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* problems between going to sleep and resuming.
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*/
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__raw_writel(S3C64XX_SLPEN_USE_xSLP, S3C64XX_SLPEN);
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}
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#endif /* __MACH_S3C64XX_PM_CORE_H */
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