2019-06-01 16:08:55 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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2012-02-17 10:49:03 +08:00
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/*
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* Copyright 2011-2012, Meador Inge, Mentor Graphics Corporation.
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*
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* Some ideas based on un-pushed work done by Vivek Mahajan, Jason Jin, and
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* Mingkai Hu from Freescale Semiconductor, Inc.
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*/
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#include <linux/list.h>
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#include <linux/of_platform.h>
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#include <linux/errno.h>
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2012-08-22 23:35:47 +08:00
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#include <linux/err.h>
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#include <linux/export.h>
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#include <linux/slab.h>
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2012-02-17 10:49:03 +08:00
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#include <asm/prom.h>
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#include <asm/hw_irq.h>
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#include <asm/ppc-pci.h>
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#include <asm/mpic_msgr.h>
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#define MPIC_MSGR_REGISTERS_PER_BLOCK 4
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#define MPIC_MSGR_STRIDE 0x10
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#define MPIC_MSGR_MER_OFFSET 0x100
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#define MSGR_INUSE 0
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#define MSGR_FREE 1
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static struct mpic_msgr **mpic_msgrs;
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static unsigned int mpic_msgr_count;
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2012-04-16 10:05:06 +08:00
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static DEFINE_RAW_SPINLOCK(msgrs_lock);
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2012-02-17 10:49:03 +08:00
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static inline void _mpic_msgr_mer_write(struct mpic_msgr *msgr, u32 value)
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{
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out_be32(msgr->mer, value);
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}
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static inline u32 _mpic_msgr_mer_read(struct mpic_msgr *msgr)
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{
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return in_be32(msgr->mer);
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}
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static inline void _mpic_msgr_disable(struct mpic_msgr *msgr)
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{
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u32 mer = _mpic_msgr_mer_read(msgr);
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_mpic_msgr_mer_write(msgr, mer & ~(1 << msgr->num));
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}
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struct mpic_msgr *mpic_msgr_get(unsigned int reg_num)
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{
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unsigned long flags;
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struct mpic_msgr *msgr;
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/* Assume busy until proven otherwise. */
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msgr = ERR_PTR(-EBUSY);
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if (reg_num >= mpic_msgr_count)
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return ERR_PTR(-ENODEV);
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2012-04-16 10:05:06 +08:00
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raw_spin_lock_irqsave(&msgrs_lock, flags);
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msgr = mpic_msgrs[reg_num];
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if (msgr->in_use == MSGR_FREE)
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2012-02-17 10:49:03 +08:00
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msgr->in_use = MSGR_INUSE;
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2012-04-16 10:05:06 +08:00
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raw_spin_unlock_irqrestore(&msgrs_lock, flags);
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2012-02-17 10:49:03 +08:00
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return msgr;
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}
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EXPORT_SYMBOL_GPL(mpic_msgr_get);
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void mpic_msgr_put(struct mpic_msgr *msgr)
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{
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unsigned long flags;
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raw_spin_lock_irqsave(&msgr->lock, flags);
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msgr->in_use = MSGR_FREE;
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_mpic_msgr_disable(msgr);
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raw_spin_unlock_irqrestore(&msgr->lock, flags);
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}
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EXPORT_SYMBOL_GPL(mpic_msgr_put);
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void mpic_msgr_enable(struct mpic_msgr *msgr)
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{
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unsigned long flags;
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u32 mer;
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raw_spin_lock_irqsave(&msgr->lock, flags);
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mer = _mpic_msgr_mer_read(msgr);
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_mpic_msgr_mer_write(msgr, mer | (1 << msgr->num));
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raw_spin_unlock_irqrestore(&msgr->lock, flags);
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}
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EXPORT_SYMBOL_GPL(mpic_msgr_enable);
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void mpic_msgr_disable(struct mpic_msgr *msgr)
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{
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unsigned long flags;
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raw_spin_lock_irqsave(&msgr->lock, flags);
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_mpic_msgr_disable(msgr);
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raw_spin_unlock_irqrestore(&msgr->lock, flags);
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}
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EXPORT_SYMBOL_GPL(mpic_msgr_disable);
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/* The following three functions are used to compute the order and number of
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* the message register blocks. They are clearly very inefficent. However,
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* they are called *only* a few times during device initialization.
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*/
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static unsigned int mpic_msgr_number_of_blocks(void)
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{
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unsigned int count;
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struct device_node *aliases;
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count = 0;
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aliases = of_find_node_by_name(NULL, "aliases");
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if (aliases) {
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char buf[32];
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for (;;) {
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snprintf(buf, sizeof(buf), "mpic-msgr-block%d", count);
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if (!of_find_property(aliases, buf, NULL))
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break;
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count += 1;
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}
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}
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return count;
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}
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static unsigned int mpic_msgr_number_of_registers(void)
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{
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return mpic_msgr_number_of_blocks() * MPIC_MSGR_REGISTERS_PER_BLOCK;
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}
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static int mpic_msgr_block_number(struct device_node *node)
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{
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struct device_node *aliases;
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unsigned int index, number_of_blocks;
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char buf[64];
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number_of_blocks = mpic_msgr_number_of_blocks();
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aliases = of_find_node_by_name(NULL, "aliases");
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if (!aliases)
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return -1;
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for (index = 0; index < number_of_blocks; ++index) {
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struct property *prop;
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snprintf(buf, sizeof(buf), "mpic-msgr-block%d", index);
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prop = of_find_property(aliases, buf, NULL);
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if (node == of_find_node_by_path(prop->value))
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break;
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}
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return index == number_of_blocks ? -1 : index;
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}
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/* The probe function for a single message register block.
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*/
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2012-12-22 06:04:10 +08:00
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static int mpic_msgr_probe(struct platform_device *dev)
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2012-02-17 10:49:03 +08:00
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{
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void __iomem *msgr_block_addr;
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int block_number;
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struct resource rsrc;
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unsigned int i;
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unsigned int irq_index;
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struct device_node *np = dev->dev.of_node;
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unsigned int receive_mask;
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const unsigned int *prop;
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if (!np) {
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dev_err(&dev->dev, "Device OF-Node is NULL");
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return -EFAULT;
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}
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/* Allocate the message register array upon the first device
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* registered.
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*/
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if (!mpic_msgrs) {
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mpic_msgr_count = mpic_msgr_number_of_registers();
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dev_info(&dev->dev, "Found %d message registers\n",
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mpic_msgr_count);
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2014-07-20 05:53:35 +08:00
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mpic_msgrs = kcalloc(mpic_msgr_count, sizeof(*mpic_msgrs),
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2012-02-17 10:49:03 +08:00
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GFP_KERNEL);
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if (!mpic_msgrs) {
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dev_err(&dev->dev,
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"No memory for message register blocks\n");
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return -ENOMEM;
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}
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}
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2017-08-21 23:16:47 +08:00
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dev_info(&dev->dev, "Of-device full name %pOF\n", np);
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2012-02-17 10:49:03 +08:00
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/* IO map the message register block. */
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of_address_to_resource(np, 0, &rsrc);
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2018-08-08 19:57:24 +08:00
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msgr_block_addr = ioremap(rsrc.start, resource_size(&rsrc));
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2012-02-17 10:49:03 +08:00
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if (!msgr_block_addr) {
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dev_err(&dev->dev, "Failed to iomap MPIC message registers");
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return -EFAULT;
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}
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/* Ensure the block has a defined order. */
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block_number = mpic_msgr_block_number(np);
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if (block_number < 0) {
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dev_err(&dev->dev,
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"Failed to find message register block alias\n");
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return -ENODEV;
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}
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dev_info(&dev->dev, "Setting up message register block %d\n",
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block_number);
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/* Grab the receive mask which specifies what registers can receive
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* interrupts.
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*/
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prop = of_get_property(np, "mpic-msgr-receive-mask", NULL);
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receive_mask = (prop) ? *prop : 0xF;
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/* Build up the appropriate message register data structures. */
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for (i = 0, irq_index = 0; i < MPIC_MSGR_REGISTERS_PER_BLOCK; ++i) {
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struct mpic_msgr *msgr;
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unsigned int reg_number;
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msgr = kzalloc(sizeof(struct mpic_msgr), GFP_KERNEL);
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if (!msgr) {
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dev_err(&dev->dev, "No memory for message register\n");
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return -ENOMEM;
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}
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reg_number = block_number * MPIC_MSGR_REGISTERS_PER_BLOCK + i;
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msgr->base = msgr_block_addr + i * MPIC_MSGR_STRIDE;
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2012-04-16 10:05:07 +08:00
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msgr->mer = (u32 *)((u8 *)msgr->base + MPIC_MSGR_MER_OFFSET);
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2012-02-17 10:49:03 +08:00
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msgr->in_use = MSGR_FREE;
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msgr->num = i;
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raw_spin_lock_init(&msgr->lock);
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if (receive_mask & (1 << i)) {
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2013-09-18 21:24:44 +08:00
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msgr->irq = irq_of_parse_and_map(np, irq_index);
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2016-09-06 19:53:24 +08:00
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if (!msgr->irq) {
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2012-02-17 10:49:03 +08:00
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dev_err(&dev->dev,
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"Missing interrupt specifier");
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kfree(msgr);
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return -EFAULT;
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}
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irq_index += 1;
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} else {
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2016-09-06 19:53:24 +08:00
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msgr->irq = 0;
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2012-02-17 10:49:03 +08:00
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}
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mpic_msgrs[reg_number] = msgr;
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mpic_msgr_disable(msgr);
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dev_info(&dev->dev, "Register %d initialized: irq %d\n",
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reg_number, msgr->irq);
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}
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return 0;
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}
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static const struct of_device_id mpic_msgr_ids[] = {
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{
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.compatible = "fsl,mpic-v3.1-msgr",
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.data = NULL,
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},
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{}
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};
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static struct platform_driver mpic_msgr_driver = {
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.driver = {
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.name = "mpic-msgr",
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.of_match_table = mpic_msgr_ids,
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},
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.probe = mpic_msgr_probe,
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};
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static __init int mpic_msgr_init(void)
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{
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return platform_driver_register(&mpic_msgr_driver);
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}
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subsys_initcall(mpic_msgr_init);
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