2019-06-21 15:07:41 +08:00
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/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_GT__
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#define __INTEL_GT__
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2019-06-21 15:07:44 +08:00
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#include "intel_engine_types.h"
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2019-06-21 15:07:41 +08:00
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#include "intel_gt_types.h"
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2019-07-13 03:29:53 +08:00
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#include "intel_reset.h"
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2019-06-21 15:07:41 +08:00
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2019-06-21 15:07:42 +08:00
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struct drm_i915_private;
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2020-07-08 08:39:47 +08:00
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struct drm_printer;
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2019-06-21 15:07:42 +08:00
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2019-12-17 02:53:32 +08:00
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#define GT_TRACE(gt, fmt, ...) do { \
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const struct intel_gt *gt__ __maybe_unused = (gt); \
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2020-01-16 20:57:49 +08:00
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GEM_TRACE("%s " fmt, dev_name(gt__->i915->drm.dev), \
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2019-12-13 23:51:52 +08:00
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##__VA_ARGS__); \
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} while (0)
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2022-03-19 07:39:32 +08:00
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static inline bool gt_is_root(struct intel_gt *gt)
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{
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return !gt->info.id;
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}
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2019-07-13 18:00:13 +08:00
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static inline struct intel_gt *uc_to_gt(struct intel_uc *uc)
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{
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return container_of(uc, struct intel_gt, uc);
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}
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2019-07-13 18:00:14 +08:00
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static inline struct intel_gt *guc_to_gt(struct intel_guc *guc)
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{
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return container_of(guc, struct intel_gt, uc.guc);
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}
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static inline struct intel_gt *huc_to_gt(struct intel_huc *huc)
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{
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return container_of(huc, struct intel_gt, uc.huc);
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}
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2022-04-20 03:33:08 +08:00
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static inline struct intel_gt *gsc_to_gt(struct intel_gsc *gsc)
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{
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return container_of(gsc, struct intel_gt, gsc);
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}
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2022-03-19 07:39:33 +08:00
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void intel_root_gt_init_early(struct drm_i915_private *i915);
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2021-12-20 05:25:00 +08:00
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int intel_gt_assign_ggtt(struct intel_gt *gt);
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2020-07-08 08:39:48 +08:00
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int intel_gt_init_mmio(struct intel_gt *gt);
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2019-09-10 22:38:20 +08:00
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int __must_check intel_gt_init_hw(struct intel_gt *gt);
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2019-09-05 19:14:03 +08:00
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int intel_gt_init(struct intel_gt *gt);
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void intel_gt_driver_register(struct intel_gt *gt);
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void intel_gt_driver_unregister(struct intel_gt *gt);
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void intel_gt_driver_remove(struct intel_gt *gt);
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void intel_gt_driver_release(struct intel_gt *gt);
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2019-06-21 15:07:41 +08:00
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2022-03-19 07:39:33 +08:00
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void intel_gt_driver_late_release_all(struct drm_i915_private *i915);
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2019-07-13 03:29:53 +08:00
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2021-07-22 05:50:58 +08:00
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int intel_gt_wait_for_idle(struct intel_gt *gt, long timeout);
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2019-06-21 15:07:44 +08:00
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void intel_gt_check_and_clear_faults(struct intel_gt *gt);
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void intel_gt_clear_error_registers(struct intel_gt *gt,
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intel_engine_mask_t engine_mask);
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2019-06-21 15:08:01 +08:00
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void intel_gt_flush_ggtt_writes(struct intel_gt *gt);
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2019-06-21 15:08:02 +08:00
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void intel_gt_chipset_flush(struct intel_gt *gt);
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2019-06-21 15:08:01 +08:00
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2019-07-09 20:33:43 +08:00
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static inline u32 intel_gt_scratch_offset(const struct intel_gt *gt,
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enum intel_gt_scratch_field field)
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2019-06-21 15:08:11 +08:00
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{
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2019-07-09 20:33:43 +08:00
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return i915_ggtt_offset(gt->scratch) + field;
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2019-06-21 15:08:11 +08:00
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}
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2020-07-06 22:41:05 +08:00
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static inline bool intel_gt_has_unrecoverable_error(const struct intel_gt *gt)
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2019-07-13 03:29:53 +08:00
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{
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2020-07-06 22:41:05 +08:00
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return test_bit(I915_WEDGED_ON_INIT, >->reset.flags) ||
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test_bit(I915_WEDGED_ON_FINI, >->reset.flags);
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2019-07-13 03:29:53 +08:00
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}
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2020-07-06 22:41:05 +08:00
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static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
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2019-12-27 03:12:37 +08:00
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{
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2020-07-06 22:41:05 +08:00
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GEM_BUG_ON(intel_gt_has_unrecoverable_error(gt) &&
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!test_bit(I915_WEDGED, >->reset.flags));
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return unlikely(test_bit(I915_WEDGED, >->reset.flags));
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2019-12-27 03:12:37 +08:00
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}
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2022-03-19 07:39:33 +08:00
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int intel_gt_probe_all(struct drm_i915_private *i915);
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int intel_gt_tiles_init(struct drm_i915_private *i915);
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void intel_gt_release_all(struct drm_i915_private *i915);
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#define for_each_gt(gt__, i915__, id__) \
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for ((id__) = 0; \
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(id__) < I915_MAX_GT; \
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(id__)++) \
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for_each_if(((gt__) = (i915__)->gt[(id__)]))
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2020-07-08 08:39:47 +08:00
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void intel_gt_info_print(const struct intel_gt_info *info,
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struct drm_printer *p);
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2021-03-24 20:13:33 +08:00
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void intel_gt_watchdog_work(struct work_struct *work);
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2022-07-27 20:29:55 +08:00
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static inline u32 intel_gt_tlb_seqno(const struct intel_gt *gt)
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{
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return seqprop_sequence(>->tlb.seqno);
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}
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static inline u32 intel_gt_next_invalidate_tlb_full(const struct intel_gt *gt)
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{
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return intel_gt_tlb_seqno(gt) | 1;
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}
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void intel_gt_invalidate_tlb(struct intel_gt *gt, u32 seqno);
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2021-10-19 20:27:10 +08:00
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2019-06-21 15:07:41 +08:00
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#endif /* __INTEL_GT_H__ */
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