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OpenCloudOS-Kernel/Documentation/devicetree/bindings/net/stmmac.txt

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dt-bindings: net: stmmac: Add the bindings documentation for XGMAC2. Adds the documentation for XGMAC2 DT bindings. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Joao Pinto <jpinto@synopsys.com> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-08-08 16:04:37 +08:00
* STMicroelectronics 10/100/1000/2500/10000 Ethernet (GMAC/XGMAC)
stmmac: Add device-tree support This patch adds support to configure the STMMAC ethernet driver via device-tree instead of platform_data. Currently, only the properties needed on SPEAr600 are provided. All other properties should be added once needed on other platforms. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-03-13 12:56:37 +08:00
Required properties:
dt-bindings: net: stmmac: Add the bindings documentation for XGMAC2. Adds the documentation for XGMAC2 DT bindings. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Joao Pinto <jpinto@synopsys.com> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-08-08 16:04:37 +08:00
- compatible: Should be "snps,dwmac-<ip_version>", "snps,dwmac" or
"snps,dwxgmac-<ip_version>", "snps,dwxgmac".
net: stmmac: Add ip version to dts bindings Because there are multiple variants to the stmmac/dwmac driver, the dts bindings should be updated to include version of the IP used. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-07-18 21:28:26 +08:00
For backwards compatibility: "st,spear600-gmac" is also supported.
stmmac: Add device-tree support This patch adds support to configure the STMMAC ethernet driver via device-tree instead of platform_data. Currently, only the properties needed on SPEAr600 are provided. All other properties should be added once needed on other platforms. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-03-13 12:56:37 +08:00
- reg: Address and length of the register set for the device
- interrupts: Should contain the STMMAC interrupts
bindings: net: stmmac: add missing note about LPI interrupt The hardware has a LPI interrupt. There is already code in the stmmac driver to parse and handle the interrupt. However, this information was missing from the DT binding. At the same time, improve the description of the existing interrupts. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Acked-By: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-04-18 20:39:53 +08:00
- interrupt-names: Should contain a list of interrupt names corresponding to
the interrupts in the interrupts property, if available.
Valid interrupt names are:
- "macirq" (combined signal for various interrupt events)
- "eth_wake_irq" (the interrupt to manage the remote wake-up packet detection)
bindings: net: stmmac: correctify note about LPI interrupt There are two different combined signal for various interrupt events: In EQOS-CORE and EQOS-MTL configurations, mci_intr_o is the interrupt signal. In EQOS-DMA, EQOS-AHB and EQOS-AXI configurations, these interrupt events are combined with the events in the DMA on the sbd_intr_o signal. Depending on configuration, the device tree irq "macirq" will refer to either mci_intr_o or sbd_intr_o. The databook states: "The MAC generates the LPI interrupt when the Tx or Rx side enters or exits the LPI state. The interrupt mci_intr_o (sbd_intr_o in certain configurations) is asserted when the LPI interrupt status is set. When the MAC exits the Rx LPI state, then in addition to the mci_intr_o (sbd_intr_o in certain configurations), the sideband signal lpi_intr_o is asserted. If you do not want to gate-off the application clock during the Rx LPI state, you can leave the lpi_intr_o signal unconnected and use the mci_intr_o (sbd_intr_o in certain configurations) signal to detect Rx LPI exit." Since the "macirq" is always raised when Tx or Rx enters/exits the LPI state, "eth_lpi" must therefore refer to lpi_intr_o, which is only raised when Rx exits the LPI state. Update the DT binding description to reflect reality. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-11-10 01:09:26 +08:00
- "eth_lpi" (the interrupt that occurs when Rx exits the LPI state)
DT: net: document Ethernet bindings in one place This patch is an attempt to gather the Ethernet related bindings in one file, like it's done in the MMC and some other subsystems. It should save some of the trouble of documenting several properties over and over in each binding document, instead only making reference to the main file. I have used the Embedded Power Architecture(TM) Platform Requirements (ePAPR) standard as a base for the properties description, also documenting some ad-hoc properties that have been introduced over time despite having direct analogs in ePAPR. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-02-18 07:41:59 +08:00
- phy-mode: See ethernet.txt file in the same directory.
dt:net:stmmac: Add dt specific phy reset callback support. This patch adds phy reset callback support for stmmac driver via device trees. It adds three new properties to gmac device tree bindings to define the reset signal via gpio. With this patch users can conveniently pass reset gpio number with pre, pulse and post delay in micro secs via DTs. active low: _________ ____________ <pre-delay> |<pulse-delay> |<post-delay> | | |_______________| active high: ________________ <pre-delay> |<pulse-delay> |<post-delay> | | ________| |___________ Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-07-04 17:35:48 +08:00
- snps,reset-gpio gpio number for phy reset.
- snps,reset-active-low boolean flag to indicate if phy reset is active low.
- snps,reset-delays-us is triplet of delays
The 1st cell is reset pre-delay in micro seconds.
The 2nd cell is reset pulse in micro seconds.
The 3rd cell is reset post-delay in micro seconds.
stmmac: rework DMA bus setting and introduce new platform AXI structure This patch restructures the DMA bus settings and this is done by introducing a new platform structure used for programming the AXI Bus Mode Register inside the DMA module. This structure can be populated from device-tree as documented in the binding txt file. After initializing the DMA, the AXI register can be optionally tuned for platform drivers based. This patch also reworks some parameters to make coherent the DMA configuration now that AXI register is introduced. For example, the burst_len is managed by using the mentioned axi support above; so the snps,burst-len parameter has been removed. It makes sense to provide the AAL parameter from DT to Address-Aligned Beats inside the Register0 and review the PBL settings when initialize the engine. For PCI glue, rebuilding the story of this setting, it was added to align a configuration so not for fixing some known problem. No issue raised after this patch. It is safe to use the default burst length instead of tuning it to the maximum value Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-29 21:27:28 +08:00
Optional properties:
- resets: Should contain a phandle to the STMMAC reset signal, if any
- reset-names: Should contain the reset signal name "stmmaceth", if a
reset phandle is given
- max-frame-size: See ethernet.txt file in the same directory
- clocks: If present, the first clock should be the GMAC main clock and
the second clock should be peripheral's register interface clock. Further
clocks may be specified in derived bindings.
- clock-names: One name for each entry in the clocks property, the
first one should be "stmmaceth" and the second one should be "pclk".
net: stmmac: Rename clk_ptp_ref clock to ptp_ref There aren't currently any users of the "clk_ptp_ref", but there are other references to "ptp_ref", so I'm leaning towards considering that a typo. Fix it. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-11 00:34:53 +08:00
- ptp_ref: this is the PTP reference clock; in case of the PTP is available
this clock is used for programming the Timestamp Addend Register. If not
passed then the system clock will be used and this is fine on some
stmmac: rework DMA bus setting and introduce new platform AXI structure This patch restructures the DMA bus settings and this is done by introducing a new platform structure used for programming the AXI Bus Mode Register inside the DMA module. This structure can be populated from device-tree as documented in the binding txt file. After initializing the DMA, the AXI register can be optionally tuned for platform drivers based. This patch also reworks some parameters to make coherent the DMA configuration now that AXI register is introduced. For example, the burst_len is managed by using the mentioned axi support above; so the snps,burst-len parameter has been removed. It makes sense to provide the AAL parameter from DT to Address-Aligned Beats inside the Register0 and review the PBL settings when initialize the engine. For PCI glue, rebuilding the story of this setting, it was added to align a configuration so not for fixing some known problem. No issue raised after this patch. It is safe to use the default burst length instead of tuning it to the maximum value Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-29 21:27:28 +08:00
platforms.
- tx-fifo-depth: See ethernet.txt file in the same directory
- rx-fifo-depth: See ethernet.txt file in the same directory
net: stmmac: add support for independent DMA pbl for tx/rx GMAC and newer supports independent programmable burst lengths for DMA tx/rx. Add new optional devicetree properties representing this. To be backwards compatible, snps,pbl will still be valid, but snps,txpbl/snps,rxpbl will override the value in snps,pbl if set. If the IP is synthesized to use the AXI interface, there is a register and a matching DT property inside the optional stmmac-axi-config DT node for controlling burst lengths, named snps,blen. However, using this register, it is not possible to control tx and rx independently. Also, this register is not available if the IP was synthesized with, e.g., the AHB interface. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Acked-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-07 22:20:07 +08:00
- snps,pbl Programmable Burst Length (tx and rx)
- snps,txpbl Tx Programmable Burst Length. Only for GMAC and newer.
If set, DMA tx will use this value rather than snps,pbl.
- snps,rxpbl Rx Programmable Burst Length. Only for GMAC and newer.
If set, DMA rx will use this value rather than snps,pbl.
net: smmac: allow configuring lower pbl values The driver currently always sets the PBLx8/PBLx4 bit, which means that the pbl values configured via the pbl/txpbl/rxpbl DT properties are always multiplied by 8/4 in the hardware. In order to allow the DT to configure lower pbl values, while at the same time not changing behavior of any existing device trees using the pbl/txpbl/rxpbl settings, add a property to disable the multiplication of the pbl by 8/4 in the hardware. Suggested-by: Rabin Vincent <rabinv@axis.com> Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Acked-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-07 22:20:08 +08:00
- snps,no-pbl-x8 Don't multiply the pbl/txpbl/rxpbl values by 8.
For core rev < 3.50, don't multiply the values by 4.
stmmac: rework DMA bus setting and introduce new platform AXI structure This patch restructures the DMA bus settings and this is done by introducing a new platform structure used for programming the AXI Bus Mode Register inside the DMA module. This structure can be populated from device-tree as documented in the binding txt file. After initializing the DMA, the AXI register can be optionally tuned for platform drivers based. This patch also reworks some parameters to make coherent the DMA configuration now that AXI register is introduced. For example, the burst_len is managed by using the mentioned axi support above; so the snps,burst-len parameter has been removed. It makes sense to provide the AAL parameter from DT to Address-Aligned Beats inside the Register0 and review the PBL settings when initialize the engine. For PCI glue, rebuilding the story of this setting, it was added to align a configuration so not for fixing some known problem. No issue raised after this patch. It is safe to use the default burst length instead of tuning it to the maximum value Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-29 21:27:28 +08:00
- snps,aal Address-Aligned Beats
dt:net:stmmac: Add support to dwmac version 3.610 and 3.710 This patch adds dt support to dwmac version 3.610 and 3.710 these versions are integrated in STiH415 and STiH416 ARM A9 SOCs. To support these IP version, some of the device tree properties are extended. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-07-04 17:35:41 +08:00
- snps,fixed-burst Program the DMA to use the fixed burst mode
- snps,mixed-burst Program the DMA to use the mixed burst mode
driver:net:stmmac: Disable DMA store and forward mode if platform data force_thresh_dma_mode is set. Some synopsys ip implementation doesn't support DMA store and forward mode, such as BF60x. So, set force_thresh_dma_mode to use DMA thresholds only. Update document and devicetree as well. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-08-28 18:55:39 +08:00
- snps,force_thresh_dma_mode Force DMA to use the threshold mode for
both tx and rx
- snps,force_sf_dma_mode Force DMA to use the Store and Forward
mode for both tx and rx. This flag is
ignored if force_thresh_dma_mode is set.
stmmac: adding DT parameter for LPI tx clock gating This patch adds a new parameter to the stmmac DT: snps,en-tx-lpi-clockgating. It was ported from synopsys/dwc_eth_qos.c and it is useful if lpi tx clock gating is needed by stmmac users also. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Tested-by: Niklas Cassel <niklas.cassel@axis.com> Reviewed-by: Lars Persson <larper@axis.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-01-09 20:35:08 +08:00
- snps,en-tx-lpi-clockgating Enable gating of the MAC TX clock during
TX low-power mode
dts: Add bindings for multicast hash bins and perfect filter entries This change adds bindings for the number of multicast hash bins and perfect filter entries supported by the Synopsys EMAC. The Synopsys EMAC core is configurable at device creation time, and can be configured for a different number of multicast hash bins and a different number of perfect filter entries. The device does not provide a way to query these parameters, therefore parameters are required. The Altera Cyclone V SOC has support for 256 multicast hash bins and 128 perfect filter entries, and is different than what's currently provided in the stmmac driver. Signed-off-by: Vince Bridgers <vbridgers2013@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-01 04:49:15 +08:00
- snps,multicast-filter-bins: Number of multicast filter hash bins
supported by this device instance
- snps,perfect-filter-entries: Number of perfect filter entries supported
by this device instance
drivers: net: stmmac: add port selection programming In case of SGMII more, for example when a MAC2MAC connection is needed, the port selection bits (inside the MAC configuration registers) have to be programmed according to the link selected. So the patch adds a new DT parameter to pass the port selection and to programmed related PCS and CORE to use it. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-06-24 21:16:26 +08:00
- snps,ps-speed: port selection speed that can be passed to the core when
PCS is supported. For example, this is used in case of SGMII
and MAC2MAC connection.
bindings: net: stmmac: correct note about TSO snps,tso was previously placed under AXI BUS Mode parameters, suggesting that the property should be in the stmmac-axi-config node. TSO (TCP Segmentation Offloading) has nothing to do with AXI BUS Mode parameters, and the parser actually expects it to be in the root node, not in the stmmac-axi-config. Also added a note about snps,tso only being available on GMAC4 and newer. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-07 20:41:06 +08:00
- snps,tso: this enables the TSO feature otherwise it will be managed by
MAC HW capability register. Only for GMAC4 and newer.
stmmac: rework DMA bus setting and introduce new platform AXI structure This patch restructures the DMA bus settings and this is done by introducing a new platform structure used for programming the AXI Bus Mode Register inside the DMA module. This structure can be populated from device-tree as documented in the binding txt file. After initializing the DMA, the AXI register can be optionally tuned for platform drivers based. This patch also reworks some parameters to make coherent the DMA configuration now that AXI register is introduced. For example, the burst_len is managed by using the mentioned axi support above; so the snps,burst-len parameter has been removed. It makes sense to provide the AAL parameter from DT to Address-Aligned Beats inside the Register0 and review the PBL settings when initialize the engine. For PCI glue, rebuilding the story of this setting, it was added to align a configuration so not for fixing some known problem. No issue raised after this patch. It is safe to use the default burst length instead of tuning it to the maximum value Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-29 21:27:28 +08:00
- AXI BUS Mode parameters: below the list of all the parameters to program the
AXI register inside the DMA module:
- snps,lpi_en: enable Low Power Interface
- snps,xit_frm: unlock on WoL
Documentation: dt: net: fix spelling mistakes Signed-off-by: Eric Engestrom <eric@engestrom.ch> Signed-off-by: Rob Herring <robh@kernel.org>
2016-04-25 08:24:15 +08:00
- snps,wr_osr_lmt: max write outstanding req. limit
- snps,rd_osr_lmt: max read outstanding req. limit
stmmac: rework DMA bus setting and introduce new platform AXI structure This patch restructures the DMA bus settings and this is done by introducing a new platform structure used for programming the AXI Bus Mode Register inside the DMA module. This structure can be populated from device-tree as documented in the binding txt file. After initializing the DMA, the AXI register can be optionally tuned for platform drivers based. This patch also reworks some parameters to make coherent the DMA configuration now that AXI register is introduced. For example, the burst_len is managed by using the mentioned axi support above; so the snps,burst-len parameter has been removed. It makes sense to provide the AAL parameter from DT to Address-Aligned Beats inside the Register0 and review the PBL settings when initialize the engine. For PCI glue, rebuilding the story of this setting, it was added to align a configuration so not for fixing some known problem. No issue raised after this patch. It is safe to use the default burst length instead of tuning it to the maximum value Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-29 21:27:28 +08:00
- snps,kbbe: do not cross 1KiB boundary.
- snps,blen: this is a vector of supported burst length.
- snps,fb: fixed-burst
- snps,mb: mixed-burst
- snps,rb: rebuild INCRx Burst
stmmac: create of compatible mdio bus for stmmac driver The DSA driver needs to be passed a reference to an mdio bus. Typically the mac is configured to use a fixed link but the mdio bus still needs to be registered so that it con configure the switch. This patch follows the same process as the altera tse ethernet driver for creation of the mdio bus. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Phil Reid <preid@electromag.com.au> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-14 11:31:59 +08:00
- mdio: with compatible = "snps,dwmac-mdio", create and register mdio bus.
net: stmmac: multiple queues dt configuration This patch adds the multiple queues configuration in the Device Tree. It was also created a set of structures to keep the RX and TX queues configurations to be used in the driver. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-11 02:24:51 +08:00
- Multiple RX Queues parameters: below the list of all the parameters to
configure the multiple RX queues:
- snps,rx-queues-to-use: number of RX queues to be used in the driver
- Choose one of these RX scheduling algorithms:
- snps,rx-sched-sp: Strict priority
- snps,rx-sched-wsp: Weighted Strict priority
- For each RX queue
- Choose one of these modes:
- snps,dcb-algorithm: Queue to be enabled as DCB
- snps,avb-algorithm: Queue to be enabled as AVB
- snps,map-to-dma-channel: Channel to map
net: stmmac: RX queue routing configuration This patch adds the configuration of RX queues' routing. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-18 00:11:07 +08:00
- Specifiy specific packet routing:
- snps,route-avcp: AV Untagged Control packets
- snps,route-ptp: PTP Packets
- snps,route-dcbcp: DCB Control Packets
- snps,route-up: Untagged Packets
- snps,route-multi-broad: Multicast & Broadcast Packets
net: stmmac: TX and RX queue priority configuration This patch adds the configuration of RX and TX queues' priority. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-18 00:11:06 +08:00
- snps,priority: RX queue priority (Range: 0x0 to 0xF)
net: stmmac: multiple queues dt configuration This patch adds the multiple queues configuration in the Device Tree. It was also created a set of structures to keep the RX and TX queues configurations to be used in the driver. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-11 02:24:51 +08:00
- Multiple TX Queues parameters: below the list of all the parameters to
configure the multiple TX queues:
- snps,tx-queues-to-use: number of TX queues to be used in the driver
- Choose one of these TX scheduling algorithms:
- snps,tx-sched-wrr: Weighted Round Robin
- snps,tx-sched-wfq: Weighted Fair Queuing
- snps,tx-sched-dwrr: Deficit Weighted Round Robin
- snps,tx-sched-sp: Strict priority
- For each TX queue
net: stmmac: configuration of CBS in case of a TX AVB queue This patch adds the configuration of the AVB Credit-Based Shaper. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-11 02:24:59 +08:00
- snps,weight: TX queue weight (if using a DCB weight algorithm)
- Choose one of these modes:
- snps,dcb-algorithm: TX queue will be working in DCB
- snps,avb-algorithm: TX queue will be working in AVB
net: stmmac: fix cbs configuration Sending again, because forgot to include net-dev. The QoS IP does not accept AVB capabilities to default/queue 0, this way we guarantee 75% bandwidth for AVB. This patch assures that only queues >= 1 gets CBS confgured. Additional info was also added to stmmac.txt. Reported-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-31 21:22:02 +08:00
[Attention] Queue 0 is reserved for legacy traffic
and so no AVB is available in this queue.
net: stmmac: configuration of CBS in case of a TX AVB queue This patch adds the configuration of the AVB Credit-Based Shaper. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-11 02:24:59 +08:00
- Configure Credit Base Shaper (if AVB Mode selected):
- snps,send_slope: enable Low Power Interface
- snps,idle_slope: unlock on WoL
- snps,high_credit: max write outstanding req. limit
- snps,low_credit: max read outstanding req. limit
net: stmmac: TX and RX queue priority configuration This patch adds the configuration of RX and TX queues' priority. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-18 00:11:06 +08:00
- snps,priority: TX queue priority (Range: 0x0 to 0xF)
stmmac: Add device-tree support This patch adds support to configure the STMMAC ethernet driver via device-tree instead of platform_data. Currently, only the properties needed on SPEAr600 are provided. All other properties should be added once needed on other platforms. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-03-13 12:56:37 +08:00
Examples:
stmmac: rework DMA bus setting and introduce new platform AXI structure This patch restructures the DMA bus settings and this is done by introducing a new platform structure used for programming the AXI Bus Mode Register inside the DMA module. This structure can be populated from device-tree as documented in the binding txt file. After initializing the DMA, the AXI register can be optionally tuned for platform drivers based. This patch also reworks some parameters to make coherent the DMA configuration now that AXI register is introduced. For example, the burst_len is managed by using the mentioned axi support above; so the snps,burst-len parameter has been removed. It makes sense to provide the AAL parameter from DT to Address-Aligned Beats inside the Register0 and review the PBL settings when initialize the engine. For PCI glue, rebuilding the story of this setting, it was added to align a configuration so not for fixing some known problem. No issue raised after this patch. It is safe to use the default burst length instead of tuning it to the maximum value Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-29 21:27:28 +08:00
stmmac_axi_setup: stmmac-axi-config {
snps,wr_osr_lmt = <0xf>;
snps,rd_osr_lmt = <0xf>;
snps,blen = <256 128 64 32 0 0 0>;
};
net: stmmac: multiple queues dt configuration This patch adds the multiple queues configuration in the Device Tree. It was also created a set of structures to keep the RX and TX queues configurations to be used in the driver. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-11 02:24:51 +08:00
mtl_rx_setup: rx-queues-config {
snps,rx-queues-to-use = <1>;
snps,rx-sched-sp;
queue0 {
snps,dcb-algorithm;
snps,map-to-dma-channel = <0x0>;
net: stmmac: TX and RX queue priority configuration This patch adds the configuration of RX and TX queues' priority. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-18 00:11:06 +08:00
snps,priority = <0x0>;
net: stmmac: multiple queues dt configuration This patch adds the multiple queues configuration in the Device Tree. It was also created a set of structures to keep the RX and TX queues configurations to be used in the driver. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-11 02:24:51 +08:00
};
};
mtl_tx_setup: tx-queues-config {
net: stmmac: configuration of CBS in case of a TX AVB queue This patch adds the configuration of the AVB Credit-Based Shaper. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-11 02:24:59 +08:00
snps,tx-queues-to-use = <2>;
net: stmmac: multiple queues dt configuration This patch adds the multiple queues configuration in the Device Tree. It was also created a set of structures to keep the RX and TX queues configurations to be used in the driver. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-11 02:24:51 +08:00
snps,tx-sched-wrr;
queue0 {
snps,weight = <0x10>;
net: stmmac: configuration of CBS in case of a TX AVB queue This patch adds the configuration of the AVB Credit-Based Shaper. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-11 02:24:59 +08:00
snps,dcb-algorithm;
net: stmmac: TX and RX queue priority configuration This patch adds the configuration of RX and TX queues' priority. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-18 00:11:06 +08:00
snps,priority = <0x0>;
net: stmmac: configuration of CBS in case of a TX AVB queue This patch adds the configuration of the AVB Credit-Based Shaper. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-11 02:24:59 +08:00
};
queue1 {
snps,avb-algorithm;
snps,send_slope = <0x1000>;
snps,idle_slope = <0x1000>;
snps,high_credit = <0x3E800>;
snps,low_credit = <0xFFC18000>;
net: stmmac: TX and RX queue priority configuration This patch adds the configuration of RX and TX queues' priority. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-18 00:11:06 +08:00
snps,priority = <0x1>;
net: stmmac: multiple queues dt configuration This patch adds the multiple queues configuration in the Device Tree. It was also created a set of structures to keep the RX and TX queues configurations to be used in the driver. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-11 02:24:51 +08:00
};
};
stmmac: Add device-tree support This patch adds support to configure the STMMAC ethernet driver via device-tree instead of platform_data. Currently, only the properties needed on SPEAr600 are provided. All other properties should be added once needed on other platforms. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-03-13 12:56:37 +08:00
gmac0: ethernet@e0800000 {
compatible = "st,spear600-gmac";
reg = <0xe0800000 0x8000>;
interrupt-parent = <&vic1>;
bindings: net: stmmac: add missing note about LPI interrupt The hardware has a LPI interrupt. There is already code in the stmmac driver to parse and handle the interrupt. However, this information was missing from the DT binding. At the same time, improve the description of the existing interrupts. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Acked-By: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-04-18 20:39:53 +08:00
interrupts = <24 23 22>;
interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
stmmac: Add device-tree support This patch adds support to configure the STMMAC ethernet driver via device-tree instead of platform_data. Currently, only the properties needed on SPEAr600 are provided. All other properties should be added once needed on other platforms. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-03-13 12:56:37 +08:00
mac-address = [000000000000]; /* Filled in by U-Boot */
dts: Add a binding for Synopsys emac max-frame-size This change adds a parameter for the Synopsys 10/100/1000 stmmac Ethernet driver to configure the maximum frame size supported by the EMAC driver. Synopsys allows the FIFO sizes to be configured when the cores are built for a particular device, but do not provide a way for the driver to read information from the device about the maximum MTU size supported as limited by the device's FIFO size. Signed-off-by: Vince Bridgers <vbridgers2013@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-01-20 19:39:00 +08:00
max-frame-size = <3800>;
stmmac: Add device-tree support This patch adds support to configure the STMMAC ethernet driver via device-tree instead of platform_data. Currently, only the properties needed on SPEAr600 are provided. All other properties should be added once needed on other platforms. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-03-13 12:56:37 +08:00
phy-mode = "gmii";
dts: Add bindings for multicast hash bins and perfect filter entries This change adds bindings for the number of multicast hash bins and perfect filter entries supported by the Synopsys EMAC. The Synopsys EMAC core is configurable at device creation time, and can be configured for a different number of multicast hash bins and a different number of perfect filter entries. The device does not provide a way to query these parameters, therefore parameters are required. The Altera Cyclone V SOC has support for 256 multicast hash bins and 128 perfect filter entries, and is different than what's currently provided in the stmmac driver. Signed-off-by: Vince Bridgers <vbridgers2013@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-08-01 04:49:15 +08:00
snps,multicast-filter-bins = <256>;
snps,perfect-filter-entries = <128>;
stmmac: Add properties for transmit and receive fifo sizes The Synopsys stmmac fifo sizes are configurable, and need to be known in order to configure certain controller features. This patch adds tx-fifo-depth and rx-fifo-depth properties to the stmmac document file. Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-04-16 00:17:38 +08:00
rx-fifo-depth = <16384>;
tx-fifo-depth = <16384>;
dts: stmmac: Document the clocks property in the stmmac base document Add the clocks and clock-names property to the base stmmac dts bindings document. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-03-27 11:45:12 +08:00
clocks = <&clock>;
stmmac.txt: fix typo Fix typo in devicetree example. Signed-off-by: Pavel Machek <pavel@denx.de> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2014-08-19 05:59:28 +08:00
clock-names = "stmmaceth";
stmmac: rework DMA bus setting and introduce new platform AXI structure This patch restructures the DMA bus settings and this is done by introducing a new platform structure used for programming the AXI Bus Mode Register inside the DMA module. This structure can be populated from device-tree as documented in the binding txt file. After initializing the DMA, the AXI register can be optionally tuned for platform drivers based. This patch also reworks some parameters to make coherent the DMA configuration now that AXI register is introduced. For example, the burst_len is managed by using the mentioned axi support above; so the snps,burst-len parameter has been removed. It makes sense to provide the AAL parameter from DT to Address-Aligned Beats inside the Register0 and review the PBL settings when initialize the engine. For PCI glue, rebuilding the story of this setting, it was added to align a configuration so not for fixing some known problem. No issue raised after this patch. It is safe to use the default burst length instead of tuning it to the maximum value Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-29 21:27:28 +08:00
snps,axi-config = <&stmmac_axi_setup>;
stmmac: create of compatible mdio bus for stmmac driver The DSA driver needs to be passed a reference to an mdio bus. Typically the mac is configured to use a fixed link but the mdio bus still needs to be registered so that it con configure the switch. This patch follows the same process as the altera tse ethernet driver for creation of the mdio bus. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Phil Reid <preid@electromag.com.au> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-14 11:31:59 +08:00
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy1: ethernet-phy@0 {
};
};
net: stmmac: multiple queues dt configuration This patch adds the multiple queues configuration in the Device Tree. It was also created a set of structures to keep the RX and TX queues configurations to be used in the driver. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-03-11 02:24:51 +08:00
snps,mtl-rx-config = <&mtl_rx_setup>;
snps,mtl-tx-config = <&mtl_tx_setup>;
stmmac: Add device-tree support This patch adds support to configure the STMMAC ethernet driver via device-tree instead of platform_data. Currently, only the properties needed on SPEAr600 are provided. All other properties should be added once needed on other platforms. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-03-13 12:56:37 +08:00
};