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OpenCloudOS-Kernel/arch/arm/mach-at91/include/mach/system_rev.h

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at91: remove MTD_NAND_ATMEL_BUSWIDTH_16 option no board configure it as 'n' and it's an issue to merge all defconfigs in one On AT91SAM926x boards both types of NAND flash can be present (8 and 16 bit data bus width). so will pass it via system_rev Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-14 00:34:03 +08:00
/*
* Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Under GPLv2 only
*/
#ifndef __ARCH_SYSTEM_REV_H__
#define __ARCH_SYSTEM_REV_H__
/*
* board revision encoding
* mach specific
* the 16-31 bit are reserved for at91 generic information
*
* bit 31:
AT91: Change nand buswidth logic to match hardware default configuration The recently modified nand buswitth configuration is not aligned with board reality: the double footprint on boards is always populated with 8bits buswidth nand flashes. So we have to consider that without particular configuration the 8bits buswidth is selected by default. Moreover, the previous logic was always using !board_have_nand_8bit(), we change it to a simpler: board_have_nand_16bit(). Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Tested-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2011-07-01 18:25:24 +08:00
* 0 => nand 8 bit
* 1 => nand 16 bit
at91: remove MTD_NAND_ATMEL_BUSWIDTH_16 option no board configure it as 'n' and it's an issue to merge all defconfigs in one On AT91SAM926x boards both types of NAND flash can be present (8 and 16 bit data bus width). so will pass it via system_rev Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-14 00:34:03 +08:00
*/
AT91: Change nand buswidth logic to match hardware default configuration The recently modified nand buswitth configuration is not aligned with board reality: the double footprint on boards is always populated with 8bits buswidth nand flashes. So we have to consider that without particular configuration the 8bits buswidth is selected by default. Moreover, the previous logic was always using !board_have_nand_8bit(), we change it to a simpler: board_have_nand_16bit(). Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Tested-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2011-07-01 18:25:24 +08:00
#define BOARD_HAVE_NAND_16BIT (1 << 31)
static inline int board_have_nand_16bit(void)
at91: remove MTD_NAND_ATMEL_BUSWIDTH_16 option no board configure it as 'n' and it's an issue to merge all defconfigs in one On AT91SAM926x boards both types of NAND flash can be present (8 and 16 bit data bus width). so will pass it via system_rev Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-14 00:34:03 +08:00
{
AT91: Change nand buswidth logic to match hardware default configuration The recently modified nand buswitth configuration is not aligned with board reality: the double footprint on boards is always populated with 8bits buswidth nand flashes. So we have to consider that without particular configuration the 8bits buswidth is selected by default. Moreover, the previous logic was always using !board_have_nand_8bit(), we change it to a simpler: board_have_nand_16bit(). Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Tested-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2011-07-01 18:25:24 +08:00
return system_rev & BOARD_HAVE_NAND_16BIT;
at91: remove MTD_NAND_ATMEL_BUSWIDTH_16 option no board configure it as 'n' and it's an issue to merge all defconfigs in one On AT91SAM926x boards both types of NAND flash can be present (8 and 16 bit data bus width). so will pass it via system_rev Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-14 00:34:03 +08:00
}
#endif /* __ARCH_SYSTEM_REV_H__ */