2014-06-18 20:53:49 +08:00
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright IBM Corp. 2007
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* Copyright 2011 Freescale Semiconductor, Inc.
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*
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* Authors: Hollis Blanchard <hollisb@us.ibm.com>
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*/
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#include <linux/jiffies.h>
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#include <linux/hrtimer.h>
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/kvm_host.h>
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#include <linux/clockchips.h>
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#include <asm/reg.h>
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#include <asm/time.h>
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#include <asm/byteorder.h>
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#include <asm/kvm_ppc.h>
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#include <asm/disassemble.h>
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#include <asm/ppc-opcode.h>
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2018-05-21 13:24:21 +08:00
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#include <asm/sstep.h>
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2014-06-18 20:53:49 +08:00
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#include "timing.h"
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#include "trace.h"
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KVM: PPC: Book3S: Add MMIO emulation for FP and VSX instructions
This patch provides the MMIO load/store emulation for instructions
of 'double & vector unsigned char & vector signed char & vector
unsigned short & vector signed short & vector unsigned int & vector
signed int & vector double '.
The instructions that this adds emulation for are:
- ldx, ldux, lwax,
- lfs, lfsx, lfsu, lfsux, lfd, lfdx, lfdu, lfdux,
- stfs, stfsx, stfsu, stfsux, stfd, stfdx, stfdu, stfdux, stfiwx,
- lxsdx, lxsspx, lxsiwax, lxsiwzx, lxvd2x, lxvw4x, lxvdsx,
- stxsdx, stxsspx, stxsiwx, stxvd2x, stxvw4x
[paulus@ozlabs.org - some cleanups, fixes and rework, make it
compile for Book E, fix build when PR KVM is built in]
Signed-off-by: Bin Lu <lblulb@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2017-02-21 21:12:36 +08:00
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#ifdef CONFIG_PPC_FPU
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static bool kvmppc_check_fp_disabled(struct kvm_vcpu *vcpu)
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{
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if (!(kvmppc_get_msr(vcpu) & MSR_FP)) {
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kvmppc_core_queue_fpunavail(vcpu);
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return true;
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}
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return false;
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}
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#endif /* CONFIG_PPC_FPU */
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#ifdef CONFIG_VSX
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static bool kvmppc_check_vsx_disabled(struct kvm_vcpu *vcpu)
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{
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if (!(kvmppc_get_msr(vcpu) & MSR_VSX)) {
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kvmppc_core_queue_vsx_unavail(vcpu);
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return true;
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}
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return false;
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}
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#endif /* CONFIG_VSX */
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2018-02-04 04:24:26 +08:00
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#ifdef CONFIG_ALTIVEC
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static bool kvmppc_check_altivec_disabled(struct kvm_vcpu *vcpu)
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{
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if (!(kvmppc_get_msr(vcpu) & MSR_VEC)) {
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kvmppc_core_queue_vec_unavail(vcpu);
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return true;
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}
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return false;
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}
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#endif /* CONFIG_ALTIVEC */
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KVM: PPC: Emulation for more integer loads and stores
This adds emulation for the following integer loads and stores,
thus enabling them to be used in a guest for accessing emulated
MMIO locations.
- lhaux
- lwaux
- lwzux
- ldu
- lwa
- stdux
- stwux
- stdu
- ldbrx
- stdbrx
Previously, most of these would cause an emulation failure exit to
userspace, though ldu and lwa got treated incorrectly as ld, and
stdu got treated incorrectly as std.
This also tidies up some of the formatting and updates the comment
listing instructions that still need to be implemented.
With this, all integer loads and stores that are defined in the Power
ISA v2.07 are emulated, except for those that are permitted to trap
when used on cache-inhibited or write-through mappings (and which do
in fact trap on POWER8), that is, lmw/stmw, lswi/stswi, lswx/stswx,
lq/stq, and l[bhwdq]arx/st[bhwdq]cx.
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2017-03-21 12:43:47 +08:00
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/*
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* XXX to do:
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* lfiwax, lfiwzx
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* vector loads and stores
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2014-06-18 20:53:49 +08:00
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*
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KVM: PPC: Emulation for more integer loads and stores
This adds emulation for the following integer loads and stores,
thus enabling them to be used in a guest for accessing emulated
MMIO locations.
- lhaux
- lwaux
- lwzux
- ldu
- lwa
- stdux
- stwux
- stdu
- ldbrx
- stdbrx
Previously, most of these would cause an emulation failure exit to
userspace, though ldu and lwa got treated incorrectly as ld, and
stdu got treated incorrectly as std.
This also tidies up some of the formatting and updates the comment
listing instructions that still need to be implemented.
With this, all integer loads and stores that are defined in the Power
ISA v2.07 are emulated, except for those that are permitted to trap
when used on cache-inhibited or write-through mappings (and which do
in fact trap on POWER8), that is, lmw/stmw, lswi/stswi, lswx/stswx,
lq/stq, and l[bhwdq]arx/st[bhwdq]cx.
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2017-03-21 12:43:47 +08:00
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* Instructions that trap when used on cache-inhibited mappings
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* are not emulated here: multiple and string instructions,
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* lq/stq, and the load-reserve/store-conditional instructions.
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2014-06-18 20:53:49 +08:00
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*/
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int kvmppc_emulate_loadstore(struct kvm_vcpu *vcpu)
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{
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struct kvm_run *run = vcpu->run;
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u32 inst;
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int ra, rs, rt;
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2018-05-21 13:24:21 +08:00
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enum emulation_result emulated = EMULATE_FAIL;
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2014-06-18 20:53:49 +08:00
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int advance = 1;
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2018-05-21 13:24:21 +08:00
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struct instruction_op op;
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2014-06-18 20:53:49 +08:00
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/* this default type might be overwritten by subcategories */
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kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS);
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2014-09-10 20:37:29 +08:00
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emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst);
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2014-06-18 20:53:49 +08:00
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if (emulated != EMULATE_DONE)
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return emulated;
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ra = get_ra(inst);
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rs = get_rs(inst);
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rt = get_rt(inst);
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KVM: PPC: Book3S: Add MMIO emulation for FP and VSX instructions
This patch provides the MMIO load/store emulation for instructions
of 'double & vector unsigned char & vector signed char & vector
unsigned short & vector signed short & vector unsigned int & vector
signed int & vector double '.
The instructions that this adds emulation for are:
- ldx, ldux, lwax,
- lfs, lfsx, lfsu, lfsux, lfd, lfdx, lfdu, lfdux,
- stfs, stfsx, stfsu, stfsux, stfd, stfdx, stfdu, stfdux, stfiwx,
- lxsdx, lxsspx, lxsiwax, lxsiwzx, lxvd2x, lxvw4x, lxvdsx,
- stxsdx, stxsspx, stxsiwx, stxvd2x, stxvw4x
[paulus@ozlabs.org - some cleanups, fixes and rework, make it
compile for Book E, fix build when PR KVM is built in]
Signed-off-by: Bin Lu <lblulb@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2017-02-21 21:12:36 +08:00
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/*
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* if mmio_vsx_tx_sx_enabled == 0, copy data between
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* VSR[0..31] and memory
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* if mmio_vsx_tx_sx_enabled == 1, copy data between
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* VSR[32..63] and memory
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*/
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vcpu->arch.mmio_vsx_tx_sx_enabled = get_tx_or_sx(inst);
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vcpu->arch.mmio_vsx_copy_nums = 0;
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vcpu->arch.mmio_vsx_offset = 0;
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2018-05-21 13:24:25 +08:00
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vcpu->arch.mmio_copy_type = KVMPPC_VSX_COPY_NONE;
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KVM: PPC: Book3S: Add MMIO emulation for FP and VSX instructions
This patch provides the MMIO load/store emulation for instructions
of 'double & vector unsigned char & vector signed char & vector
unsigned short & vector signed short & vector unsigned int & vector
signed int & vector double '.
The instructions that this adds emulation for are:
- ldx, ldux, lwax,
- lfs, lfsx, lfsu, lfsux, lfd, lfdx, lfdu, lfdux,
- stfs, stfsx, stfsu, stfsux, stfd, stfdx, stfdu, stfdux, stfiwx,
- lxsdx, lxsspx, lxsiwax, lxsiwzx, lxvd2x, lxvw4x, lxvdsx,
- stxsdx, stxsspx, stxsiwx, stxvd2x, stxvw4x
[paulus@ozlabs.org - some cleanups, fixes and rework, make it
compile for Book E, fix build when PR KVM is built in]
Signed-off-by: Bin Lu <lblulb@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2017-02-21 21:12:36 +08:00
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vcpu->arch.mmio_sp64_extend = 0;
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vcpu->arch.mmio_sign_extend = 0;
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2018-02-04 04:24:26 +08:00
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vcpu->arch.mmio_vmx_copy_nums = 0;
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2018-05-21 13:24:26 +08:00
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vcpu->arch.mmio_vmx_offset = 0;
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2018-05-07 14:20:09 +08:00
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vcpu->arch.mmio_host_swabbed = 0;
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KVM: PPC: Book3S: Add MMIO emulation for FP and VSX instructions
This patch provides the MMIO load/store emulation for instructions
of 'double & vector unsigned char & vector signed char & vector
unsigned short & vector signed short & vector unsigned int & vector
signed int & vector double '.
The instructions that this adds emulation for are:
- ldx, ldux, lwax,
- lfs, lfsx, lfsu, lfsux, lfd, lfdx, lfdu, lfdux,
- stfs, stfsx, stfsu, stfsux, stfd, stfdx, stfdu, stfdux, stfiwx,
- lxsdx, lxsspx, lxsiwax, lxsiwzx, lxvd2x, lxvw4x, lxvdsx,
- stxsdx, stxsspx, stxsiwx, stxvd2x, stxvw4x
[paulus@ozlabs.org - some cleanups, fixes and rework, make it
compile for Book E, fix build when PR KVM is built in]
Signed-off-by: Bin Lu <lblulb@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2017-02-21 21:12:36 +08:00
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2018-05-21 13:24:21 +08:00
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emulated = EMULATE_FAIL;
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vcpu->arch.regs.msr = vcpu->arch.shared->msr;
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vcpu->arch.regs.ccr = vcpu->arch.cr;
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if (analyse_instr(&op, &vcpu->arch.regs, inst) == 0) {
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int type = op.type & INSTR_TYPE_MASK;
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int size = GETSIZE(op.type);
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2017-03-17 16:31:38 +08:00
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2018-05-21 13:24:21 +08:00
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switch (type) {
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case LOAD: {
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int instr_byte_swap = op.type & BYTEREV;
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KVM: PPC: Emulation for more integer loads and stores
This adds emulation for the following integer loads and stores,
thus enabling them to be used in a guest for accessing emulated
MMIO locations.
- lhaux
- lwaux
- lwzux
- ldu
- lwa
- stdux
- stwux
- stdu
- ldbrx
- stdbrx
Previously, most of these would cause an emulation failure exit to
userspace, though ldu and lwa got treated incorrectly as ld, and
stdu got treated incorrectly as std.
This also tidies up some of the formatting and updates the comment
listing instructions that still need to be implemented.
With this, all integer loads and stores that are defined in the Power
ISA v2.07 are emulated, except for those that are permitted to trap
when used on cache-inhibited or write-through mappings (and which do
in fact trap on POWER8), that is, lmw/stmw, lswi/stswi, lswx/stswx,
lq/stq, and l[bhwdq]arx/st[bhwdq]cx.
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2017-03-21 12:43:47 +08:00
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2018-05-21 13:24:21 +08:00
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if (op.type & SIGNEXT)
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emulated = kvmppc_handle_loads(run, vcpu,
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op.reg, size, !instr_byte_swap);
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else
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emulated = kvmppc_handle_load(run, vcpu,
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op.reg, size, !instr_byte_swap);
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2014-06-18 20:53:49 +08:00
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2018-05-21 13:24:21 +08:00
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if ((op.type & UPDATE) && (emulated != EMULATE_FAIL))
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kvmppc_set_gpr(vcpu, op.update_reg, op.ea);
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2014-06-18 20:53:49 +08:00
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break;
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2018-05-21 13:24:21 +08:00
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}
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2018-05-21 13:24:23 +08:00
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#ifdef CONFIG_PPC_FPU
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case LOAD_FP:
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if (kvmppc_check_fp_disabled(vcpu))
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return EMULATE_DONE;
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if (op.type & FPCONV)
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vcpu->arch.mmio_sp64_extend = 1;
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if (op.type & SIGNEXT)
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emulated = kvmppc_handle_loads(run, vcpu,
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KVM_MMIO_REG_FPR|op.reg, size, 1);
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else
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emulated = kvmppc_handle_load(run, vcpu,
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KVM_MMIO_REG_FPR|op.reg, size, 1);
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if ((op.type & UPDATE) && (emulated != EMULATE_FAIL))
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kvmppc_set_gpr(vcpu, op.update_reg, op.ea);
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break;
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2018-05-21 13:24:24 +08:00
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#endif
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2018-05-21 13:24:26 +08:00
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#ifdef CONFIG_ALTIVEC
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case LOAD_VMX:
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if (kvmppc_check_altivec_disabled(vcpu))
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return EMULATE_DONE;
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/* Hardware enforces alignment of VMX accesses */
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vcpu->arch.vaddr_accessed &= ~((unsigned long)size - 1);
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vcpu->arch.paddr_accessed &= ~((unsigned long)size - 1);
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if (size == 16) { /* lvx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_DWORD;
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} else if (size == 4) { /* lvewx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_WORD;
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} else if (size == 2) { /* lvehx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_HWORD;
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} else if (size == 1) { /* lvebx */
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vcpu->arch.mmio_copy_type =
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KVMPPC_VMX_COPY_BYTE;
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} else
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break;
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vcpu->arch.mmio_vmx_offset =
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(vcpu->arch.vaddr_accessed & 0xf)/size;
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if (size == 16) {
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vcpu->arch.mmio_vmx_copy_nums = 2;
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emulated = kvmppc_handle_vmx_load(run,
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vcpu, KVM_MMIO_REG_VMX|op.reg,
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8, 1);
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} else {
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vcpu->arch.mmio_vmx_copy_nums = 1;
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emulated = kvmppc_handle_vmx_load(run, vcpu,
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KVM_MMIO_REG_VMX|op.reg,
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size, 1);
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}
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break;
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|
#endif
|
2018-05-21 13:24:24 +08:00
|
|
|
#ifdef CONFIG_VSX
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|
|
|
|
case LOAD_VSX: {
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|
|
int io_size_each;
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|
if (op.vsx_flags & VSX_CHECK_VEC) {
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|
|
if (kvmppc_check_altivec_disabled(vcpu))
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|
|
|
return EMULATE_DONE;
|
|
|
|
|
} else {
|
|
|
|
|
if (kvmppc_check_vsx_disabled(vcpu))
|
|
|
|
|
return EMULATE_DONE;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (op.vsx_flags & VSX_FPCONV)
|
|
|
|
|
vcpu->arch.mmio_sp64_extend = 1;
|
|
|
|
|
|
|
|
|
|
if (op.element_size == 8) {
|
|
|
|
|
if (op.vsx_flags & VSX_SPLAT)
|
2018-05-21 13:24:25 +08:00
|
|
|
vcpu->arch.mmio_copy_type =
|
2018-05-21 13:24:24 +08:00
|
|
|
KVMPPC_VSX_COPY_DWORD_LOAD_DUMP;
|
|
|
|
|
else
|
2018-05-21 13:24:25 +08:00
|
|
|
vcpu->arch.mmio_copy_type =
|
2018-05-21 13:24:24 +08:00
|
|
|
KVMPPC_VSX_COPY_DWORD;
|
|
|
|
|
} else if (op.element_size == 4) {
|
|
|
|
|
if (op.vsx_flags & VSX_SPLAT)
|
2018-05-21 13:24:25 +08:00
|
|
|
vcpu->arch.mmio_copy_type =
|
2018-05-21 13:24:24 +08:00
|
|
|
KVMPPC_VSX_COPY_WORD_LOAD_DUMP;
|
|
|
|
|
else
|
2018-05-21 13:24:25 +08:00
|
|
|
vcpu->arch.mmio_copy_type =
|
2018-05-21 13:24:24 +08:00
|
|
|
KVMPPC_VSX_COPY_WORD;
|
|
|
|
|
} else
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
if (size < op.element_size) {
|
|
|
|
|
/* precision convert case: lxsspx, etc */
|
|
|
|
|
vcpu->arch.mmio_vsx_copy_nums = 1;
|
|
|
|
|
io_size_each = size;
|
|
|
|
|
} else { /* lxvw4x, lxvd2x, etc */
|
|
|
|
|
vcpu->arch.mmio_vsx_copy_nums =
|
|
|
|
|
size/op.element_size;
|
|
|
|
|
io_size_each = op.element_size;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
emulated = kvmppc_handle_vsx_load(run, vcpu,
|
|
|
|
|
KVM_MMIO_REG_VSX | (op.reg & 0x1f),
|
|
|
|
|
io_size_each, 1, op.type & SIGNEXT);
|
|
|
|
|
break;
|
|
|
|
|
}
|
2018-05-21 13:24:23 +08:00
|
|
|
#endif
|
2018-05-21 13:24:21 +08:00
|
|
|
case STORE:
|
|
|
|
|
/* if need byte reverse, op.val has been reversed by
|
|
|
|
|
* analyse_instr().
|
|
|
|
|
*/
|
|
|
|
|
emulated = kvmppc_handle_store(run, vcpu, op.val,
|
|
|
|
|
size, 1);
|
2014-06-18 20:53:49 +08:00
|
|
|
|
2018-05-21 13:24:21 +08:00
|
|
|
if ((op.type & UPDATE) && (emulated != EMULATE_FAIL))
|
|
|
|
|
kvmppc_set_gpr(vcpu, op.update_reg, op.ea);
|
2014-06-18 20:53:49 +08:00
|
|
|
|
|
|
|
|
break;
|
2018-05-21 13:24:23 +08:00
|
|
|
#ifdef CONFIG_PPC_FPU
|
|
|
|
|
case STORE_FP:
|
|
|
|
|
if (kvmppc_check_fp_disabled(vcpu))
|
|
|
|
|
return EMULATE_DONE;
|
|
|
|
|
|
|
|
|
|
/* The FP registers need to be flushed so that
|
|
|
|
|
* kvmppc_handle_store() can read actual FP vals
|
|
|
|
|
* from vcpu->arch.
|
|
|
|
|
*/
|
|
|
|
|
if (vcpu->kvm->arch.kvm_ops->giveup_ext)
|
|
|
|
|
vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu,
|
|
|
|
|
MSR_FP);
|
|
|
|
|
|
|
|
|
|
if (op.type & FPCONV)
|
|
|
|
|
vcpu->arch.mmio_sp64_extend = 1;
|
|
|
|
|
|
|
|
|
|
emulated = kvmppc_handle_store(run, vcpu,
|
|
|
|
|
VCPU_FPR(vcpu, op.reg), size, 1);
|
|
|
|
|
|
|
|
|
|
if ((op.type & UPDATE) && (emulated != EMULATE_FAIL))
|
|
|
|
|
kvmppc_set_gpr(vcpu, op.update_reg, op.ea);
|
|
|
|
|
|
|
|
|
|
break;
|
2018-05-21 13:24:24 +08:00
|
|
|
#endif
|
2018-05-21 13:24:26 +08:00
|
|
|
#ifdef CONFIG_ALTIVEC
|
|
|
|
|
case STORE_VMX:
|
|
|
|
|
if (kvmppc_check_altivec_disabled(vcpu))
|
|
|
|
|
return EMULATE_DONE;
|
|
|
|
|
|
|
|
|
|
/* Hardware enforces alignment of VMX accesses. */
|
|
|
|
|
vcpu->arch.vaddr_accessed &= ~((unsigned long)size - 1);
|
|
|
|
|
vcpu->arch.paddr_accessed &= ~((unsigned long)size - 1);
|
|
|
|
|
|
|
|
|
|
if (vcpu->kvm->arch.kvm_ops->giveup_ext)
|
|
|
|
|
vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu,
|
|
|
|
|
MSR_VEC);
|
|
|
|
|
if (size == 16) { /* stvx */
|
|
|
|
|
vcpu->arch.mmio_copy_type =
|
|
|
|
|
KVMPPC_VMX_COPY_DWORD;
|
|
|
|
|
} else if (size == 4) { /* stvewx */
|
|
|
|
|
vcpu->arch.mmio_copy_type =
|
|
|
|
|
KVMPPC_VMX_COPY_WORD;
|
|
|
|
|
} else if (size == 2) { /* stvehx */
|
|
|
|
|
vcpu->arch.mmio_copy_type =
|
|
|
|
|
KVMPPC_VMX_COPY_HWORD;
|
|
|
|
|
} else if (size == 1) { /* stvebx */
|
|
|
|
|
vcpu->arch.mmio_copy_type =
|
|
|
|
|
KVMPPC_VMX_COPY_BYTE;
|
|
|
|
|
} else
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
vcpu->arch.mmio_vmx_offset =
|
|
|
|
|
(vcpu->arch.vaddr_accessed & 0xf)/size;
|
|
|
|
|
|
|
|
|
|
if (size == 16) {
|
|
|
|
|
vcpu->arch.mmio_vmx_copy_nums = 2;
|
|
|
|
|
emulated = kvmppc_handle_vmx_store(run,
|
|
|
|
|
vcpu, op.reg, 8, 1);
|
|
|
|
|
} else {
|
|
|
|
|
vcpu->arch.mmio_vmx_copy_nums = 1;
|
|
|
|
|
emulated = kvmppc_handle_vmx_store(run,
|
|
|
|
|
vcpu, op.reg, size, 1);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
2018-05-21 13:24:24 +08:00
|
|
|
#ifdef CONFIG_VSX
|
|
|
|
|
case STORE_VSX: {
|
|
|
|
|
int io_size_each;
|
|
|
|
|
|
|
|
|
|
if (op.vsx_flags & VSX_CHECK_VEC) {
|
|
|
|
|
if (kvmppc_check_altivec_disabled(vcpu))
|
|
|
|
|
return EMULATE_DONE;
|
|
|
|
|
} else {
|
|
|
|
|
if (kvmppc_check_vsx_disabled(vcpu))
|
|
|
|
|
return EMULATE_DONE;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (vcpu->kvm->arch.kvm_ops->giveup_ext)
|
|
|
|
|
vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu,
|
|
|
|
|
MSR_VSX);
|
|
|
|
|
|
|
|
|
|
if (op.vsx_flags & VSX_FPCONV)
|
|
|
|
|
vcpu->arch.mmio_sp64_extend = 1;
|
|
|
|
|
|
|
|
|
|
if (op.element_size == 8)
|
2018-05-21 13:24:25 +08:00
|
|
|
vcpu->arch.mmio_copy_type =
|
2018-05-21 13:24:24 +08:00
|
|
|
KVMPPC_VSX_COPY_DWORD;
|
|
|
|
|
else if (op.element_size == 4)
|
2018-05-21 13:24:25 +08:00
|
|
|
vcpu->arch.mmio_copy_type =
|
2018-05-21 13:24:24 +08:00
|
|
|
KVMPPC_VSX_COPY_WORD;
|
|
|
|
|
else
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
if (size < op.element_size) {
|
|
|
|
|
/* precise conversion case, like stxsspx */
|
|
|
|
|
vcpu->arch.mmio_vsx_copy_nums = 1;
|
|
|
|
|
io_size_each = size;
|
|
|
|
|
} else { /* stxvw4x, stxvd2x, etc */
|
|
|
|
|
vcpu->arch.mmio_vsx_copy_nums =
|
|
|
|
|
size/op.element_size;
|
|
|
|
|
io_size_each = op.element_size;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
emulated = kvmppc_handle_vsx_store(run, vcpu,
|
|
|
|
|
op.reg & 0x1f, io_size_each, 1);
|
|
|
|
|
break;
|
|
|
|
|
}
|
2018-05-21 13:24:23 +08:00
|
|
|
#endif
|
2018-05-21 13:24:21 +08:00
|
|
|
case CACHEOP:
|
2014-06-18 20:53:49 +08:00
|
|
|
/* Do nothing. The guest is performing dcbi because
|
|
|
|
|
* hardware DMA is not snooped by the dcache, but
|
|
|
|
|
* emulated DMA either goes through the dcache as
|
|
|
|
|
* normal writes, or the host kernel has handled dcache
|
2018-05-21 13:24:21 +08:00
|
|
|
* coherence.
|
|
|
|
|
*/
|
|
|
|
|
emulated = EMULATE_DONE;
|
2014-06-18 20:53:49 +08:00
|
|
|
break;
|
2018-05-21 13:24:21 +08:00
|
|
|
default:
|
KVM: PPC: Book3S: Add MMIO emulation for FP and VSX instructions
This patch provides the MMIO load/store emulation for instructions
of 'double & vector unsigned char & vector signed char & vector
unsigned short & vector signed short & vector unsigned int & vector
signed int & vector double '.
The instructions that this adds emulation for are:
- ldx, ldux, lwax,
- lfs, lfsx, lfsu, lfsux, lfd, lfdx, lfdu, lfdux,
- stfs, stfsx, stfsu, stfsux, stfd, stfdx, stfdu, stfdux, stfiwx,
- lxsdx, lxsspx, lxsiwax, lxsiwzx, lxvd2x, lxvw4x, lxvdsx,
- stxsdx, stxsspx, stxsiwx, stxvd2x, stxvw4x
[paulus@ozlabs.org - some cleanups, fixes and rework, make it
compile for Book E, fix build when PR KVM is built in]
Signed-off-by: Bin Lu <lblulb@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2017-02-21 21:12:36 +08:00
|
|
|
break;
|
2018-05-21 13:24:21 +08:00
|
|
|
}
|
|
|
|
|
}
|
KVM: PPC: Book3S: Add MMIO emulation for FP and VSX instructions
This patch provides the MMIO load/store emulation for instructions
of 'double & vector unsigned char & vector signed char & vector
unsigned short & vector signed short & vector unsigned int & vector
signed int & vector double '.
The instructions that this adds emulation for are:
- ldx, ldux, lwax,
- lfs, lfsx, lfsu, lfsux, lfd, lfdx, lfdu, lfdux,
- stfs, stfsx, stfsu, stfsux, stfd, stfdx, stfdu, stfdux, stfiwx,
- lxsdx, lxsspx, lxsiwax, lxsiwzx, lxvd2x, lxvw4x, lxvdsx,
- stxsdx, stxsspx, stxsiwx, stxvd2x, stxvw4x
[paulus@ozlabs.org - some cleanups, fixes and rework, make it
compile for Book E, fix build when PR KVM is built in]
Signed-off-by: Bin Lu <lblulb@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2017-02-21 21:12:36 +08:00
|
|
|
|
2014-06-18 20:53:49 +08:00
|
|
|
if (emulated == EMULATE_FAIL) {
|
|
|
|
|
advance = 0;
|
|
|
|
|
kvmppc_core_queue_program(vcpu, 0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
trace_kvm_ppc_instr(inst, kvmppc_get_pc(vcpu), emulated);
|
|
|
|
|
|
|
|
|
|
/* Advance past emulated instruction. */
|
|
|
|
|
if (advance)
|
|
|
|
|
kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);
|
|
|
|
|
|
|
|
|
|
return emulated;
|
|
|
|
|
}
|
