2019-06-25 23:39:14 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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2018-05-21 18:00:01 +08:00
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/*
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* Pinctrl for Cirrus Logic CS47L35
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*
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* Copyright (C) 2016-2017 Cirrus Logic
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*/
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#include <linux/err.h>
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#include <linux/mfd/madera/core.h>
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#include "pinctrl-madera.h"
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/*
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* The alt func groups are the most commonly used functions we place these at
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* the lower function indexes for convenience, and the less commonly used gpio
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* functions at higher indexes.
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*
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* To stay consistent with the datasheet the function names are the same as
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* the group names for that function's pins
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*
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* Note - all 1 less than in datasheet because these are zero-indexed
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*/
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static const unsigned int cs47l35_aif3_pins[] = { 0, 1, 2, 3 };
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static const unsigned int cs47l35_spk_pins[] = { 4, 5 };
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static const unsigned int cs47l35_aif1_pins[] = { 7, 8, 9, 10 };
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static const unsigned int cs47l35_aif2_pins[] = { 11, 12, 13, 14 };
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static const unsigned int cs47l35_mif1_pins[] = { 6, 15 };
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static const struct madera_pin_groups cs47l35_pin_groups[] = {
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{ "aif1", cs47l35_aif1_pins, ARRAY_SIZE(cs47l35_aif1_pins) },
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{ "aif2", cs47l35_aif2_pins, ARRAY_SIZE(cs47l35_aif2_pins) },
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{ "aif3", cs47l35_aif3_pins, ARRAY_SIZE(cs47l35_aif3_pins) },
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{ "mif1", cs47l35_mif1_pins, ARRAY_SIZE(cs47l35_mif1_pins) },
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{ "pdmspk1", cs47l35_spk_pins, ARRAY_SIZE(cs47l35_spk_pins) },
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};
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const struct madera_pin_chip cs47l35_pin_chip = {
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.n_pins = CS47L35_NUM_GPIOS,
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.pin_groups = cs47l35_pin_groups,
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.n_pin_groups = ARRAY_SIZE(cs47l35_pin_groups),
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};
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