2009-03-06 10:54:09 +08:00
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/*
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2015-06-11 02:00:17 +08:00
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* ps3vram - Use extra PS3 video ram as block device.
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2009-03-06 10:54:09 +08:00
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*
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* Copyright 2009 Sony Corporation
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*
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* Based on the MTD ps3vram driver, which is
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* Copyright (c) 2007-2008 Jim Paris <jim@jtan.com>
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* Added support RSX DMA Vivien Chappelier <vivien.chappelier@free.fr>
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*/
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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2011-07-02 03:56:05 +08:00
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#include <linux/module.h>
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2009-03-06 10:54:09 +08:00
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#include <linux/proc_fs.h>
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#include <linux/seq_file.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
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#include <linux/slab.h>
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2009-03-06 10:54:09 +08:00
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2009-07-29 10:06:42 +08:00
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#include <asm/cell-regs.h>
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2009-03-06 10:54:09 +08:00
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#include <asm/firmware.h>
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#include <asm/lv1call.h>
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#include <asm/ps3.h>
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2009-06-10 12:38:48 +08:00
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#include <asm/ps3gpu.h>
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2009-03-06 10:54:09 +08:00
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#define DEVICE_NAME "ps3vram"
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#define XDR_BUF_SIZE (2 * 1024 * 1024) /* XDR buffer (must be 1MiB aligned) */
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#define XDR_IOIF 0x0c000000
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#define FIFO_BASE XDR_IOIF
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#define FIFO_SIZE (64 * 1024)
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#define DMA_PAGE_SIZE (4 * 1024)
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#define CACHE_PAGE_SIZE (256 * 1024)
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#define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE)
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#define CACHE_OFFSET CACHE_PAGE_SIZE
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#define FIFO_OFFSET 0
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#define CTRL_PUT 0x10
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#define CTRL_GET 0x11
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#define CTRL_TOP 0x15
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#define UPLOAD_SUBCH 1
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#define DOWNLOAD_SUBCH 2
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#define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c
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#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104
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#define CACHE_PAGE_PRESENT 1
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#define CACHE_PAGE_DIRTY 2
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struct ps3vram_tag {
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unsigned int address;
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unsigned int flags;
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};
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struct ps3vram_cache {
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unsigned int page_count;
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unsigned int page_size;
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struct ps3vram_tag *tags;
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unsigned int hit;
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unsigned int miss;
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};
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struct ps3vram_priv {
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struct request_queue *queue;
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struct gendisk *gendisk;
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u64 size;
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u64 memory_handle;
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u64 context_handle;
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2015-06-11 02:00:17 +08:00
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u32 __iomem *ctrl;
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void __iomem *reports;
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2009-03-06 10:54:09 +08:00
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u8 *xdr_buf;
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u32 *fifo_base;
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u32 *fifo_ptr;
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struct ps3vram_cache cache;
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2009-06-10 12:38:41 +08:00
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spinlock_t lock; /* protecting list of bios */
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struct bio_list list;
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2009-03-06 10:54:09 +08:00
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};
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static int ps3vram_major;
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2009-09-22 08:01:13 +08:00
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static const struct block_device_operations ps3vram_fops = {
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2009-03-06 10:54:09 +08:00
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.owner = THIS_MODULE,
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};
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#define DMA_NOTIFIER_HANDLE_BASE 0x66604200 /* first DMA notifier handle */
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#define DMA_NOTIFIER_OFFSET_BASE 0x1000 /* first DMA notifier offset */
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#define DMA_NOTIFIER_SIZE 0x40
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#define NOTIFIER 7 /* notifier used for completion report */
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static char *size = "256M";
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module_param(size, charp, 0);
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MODULE_PARM_DESC(size, "memory size");
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2015-06-11 02:00:17 +08:00
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static u32 __iomem *ps3vram_get_notifier(void __iomem *reports, int notifier)
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2009-03-06 10:54:09 +08:00
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{
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2009-06-10 12:38:51 +08:00
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return reports + DMA_NOTIFIER_OFFSET_BASE +
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2009-03-06 10:54:09 +08:00
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DMA_NOTIFIER_SIZE * notifier;
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}
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static void ps3vram_notifier_reset(struct ps3_system_bus_device *dev)
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{
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2009-06-10 12:38:54 +08:00
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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2015-06-11 02:00:17 +08:00
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u32 __iomem *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
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2009-03-06 10:54:09 +08:00
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int i;
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for (i = 0; i < 4; i++)
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2015-06-11 02:00:17 +08:00
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iowrite32be(0xffffffff, notify + i);
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2009-03-06 10:54:09 +08:00
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}
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static int ps3vram_notifier_wait(struct ps3_system_bus_device *dev,
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unsigned int timeout_ms)
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{
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2009-06-10 12:38:54 +08:00
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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2015-06-11 02:00:17 +08:00
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u32 __iomem *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
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2009-11-04 16:09:28 +08:00
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unsigned long timeout;
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for (timeout = 20; timeout; timeout--) {
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2015-06-11 02:00:17 +08:00
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if (!ioread32be(notify + 3))
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2009-11-04 16:09:28 +08:00
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return 0;
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udelay(10);
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}
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timeout = jiffies + msecs_to_jiffies(timeout_ms);
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2009-03-06 10:54:09 +08:00
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do {
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2015-06-11 02:00:17 +08:00
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if (!ioread32be(notify + 3))
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2009-03-06 10:54:09 +08:00
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return 0;
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msleep(1);
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} while (time_before(jiffies, timeout));
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return -ETIMEDOUT;
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}
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static void ps3vram_init_ring(struct ps3_system_bus_device *dev)
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{
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2009-06-10 12:38:54 +08:00
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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2009-03-06 10:54:09 +08:00
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2015-06-11 02:00:17 +08:00
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iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_PUT);
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iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_GET);
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2009-03-06 10:54:09 +08:00
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}
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static int ps3vram_wait_ring(struct ps3_system_bus_device *dev,
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unsigned int timeout_ms)
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{
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2009-06-10 12:38:54 +08:00
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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2009-03-06 10:54:09 +08:00
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unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
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do {
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2015-06-11 02:00:17 +08:00
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if (ioread32be(priv->ctrl + CTRL_PUT) == ioread32be(priv->ctrl + CTRL_GET))
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2009-03-06 10:54:09 +08:00
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return 0;
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msleep(1);
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} while (time_before(jiffies, timeout));
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dev_warn(&dev->core, "FIFO timeout (%08x/%08x/%08x)\n",
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2015-06-11 02:00:17 +08:00
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ioread32be(priv->ctrl + CTRL_PUT), ioread32be(priv->ctrl + CTRL_GET),
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ioread32be(priv->ctrl + CTRL_TOP));
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2009-03-06 10:54:09 +08:00
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return -ETIMEDOUT;
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}
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static void ps3vram_out_ring(struct ps3vram_priv *priv, u32 data)
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{
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*(priv->fifo_ptr)++ = data;
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}
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static void ps3vram_begin_ring(struct ps3vram_priv *priv, u32 chan, u32 tag,
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u32 size)
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{
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ps3vram_out_ring(priv, (size << 18) | (chan << 13) | tag);
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}
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static void ps3vram_rewind_ring(struct ps3_system_bus_device *dev)
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{
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2009-06-10 12:38:54 +08:00
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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2009-03-06 10:54:09 +08:00
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int status;
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ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET));
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2015-06-11 02:00:17 +08:00
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iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_PUT);
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2009-03-06 10:54:09 +08:00
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/* asking the HV for a blit will kick the FIFO */
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2009-06-10 12:38:48 +08:00
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status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0);
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2009-03-06 10:54:09 +08:00
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if (status)
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2009-06-10 12:38:48 +08:00
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dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n",
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__func__, status);
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2009-03-06 10:54:09 +08:00
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priv->fifo_ptr = priv->fifo_base;
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}
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static void ps3vram_fire_ring(struct ps3_system_bus_device *dev)
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{
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2009-06-10 12:38:54 +08:00
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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2009-03-06 10:54:09 +08:00
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int status;
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mutex_lock(&ps3_gpu_mutex);
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2015-06-11 02:00:17 +08:00
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iowrite32be(FIFO_BASE + FIFO_OFFSET + (priv->fifo_ptr - priv->fifo_base)
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* sizeof(u32), priv->ctrl + CTRL_PUT);
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2009-03-06 10:54:09 +08:00
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/* asking the HV for a blit will kick the FIFO */
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2009-06-10 12:38:48 +08:00
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status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0);
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2009-03-06 10:54:09 +08:00
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if (status)
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2009-06-10 12:38:48 +08:00
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dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n",
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__func__, status);
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2009-03-06 10:54:09 +08:00
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if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) >
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FIFO_SIZE - 1024) {
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dev_dbg(&dev->core, "FIFO full, rewinding\n");
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ps3vram_wait_ring(dev, 200);
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ps3vram_rewind_ring(dev);
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}
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mutex_unlock(&ps3_gpu_mutex);
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}
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static void ps3vram_bind(struct ps3_system_bus_device *dev)
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{
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2009-06-10 12:38:54 +08:00
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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2009-03-06 10:54:09 +08:00
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ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1);
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ps3vram_out_ring(priv, 0x31337303);
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ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x180, 3);
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ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
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ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
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ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
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ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0, 1);
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ps3vram_out_ring(priv, 0x3137c0de);
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ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x180, 3);
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ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
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ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
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ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
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ps3vram_fire_ring(dev);
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}
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static int ps3vram_upload(struct ps3_system_bus_device *dev,
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unsigned int src_offset, unsigned int dst_offset,
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int len, int count)
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{
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2009-06-10 12:38:54 +08:00
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struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
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2009-03-06 10:54:09 +08:00
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ps3vram_begin_ring(priv, UPLOAD_SUBCH,
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NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
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ps3vram_out_ring(priv, XDR_IOIF + src_offset);
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ps3vram_out_ring(priv, dst_offset);
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ps3vram_out_ring(priv, len);
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ps3vram_out_ring(priv, len);
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ps3vram_out_ring(priv, len);
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ps3vram_out_ring(priv, count);
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ps3vram_out_ring(priv, (1 << 8) | 1);
|
|
|
|
ps3vram_out_ring(priv, 0);
|
|
|
|
|
|
|
|
ps3vram_notifier_reset(dev);
|
|
|
|
ps3vram_begin_ring(priv, UPLOAD_SUBCH,
|
|
|
|
NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
|
|
|
|
ps3vram_out_ring(priv, 0);
|
|
|
|
ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x100, 1);
|
|
|
|
ps3vram_out_ring(priv, 0);
|
|
|
|
ps3vram_fire_ring(dev);
|
|
|
|
if (ps3vram_notifier_wait(dev, 200) < 0) {
|
|
|
|
dev_warn(&dev->core, "%s: Notifier timeout\n", __func__);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ps3vram_download(struct ps3_system_bus_device *dev,
|
|
|
|
unsigned int src_offset, unsigned int dst_offset,
|
|
|
|
int len, int count)
|
|
|
|
{
|
2009-06-10 12:38:54 +08:00
|
|
|
struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
|
2009-03-06 10:54:09 +08:00
|
|
|
|
|
|
|
ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
|
|
|
|
NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
|
|
|
|
ps3vram_out_ring(priv, src_offset);
|
|
|
|
ps3vram_out_ring(priv, XDR_IOIF + dst_offset);
|
|
|
|
ps3vram_out_ring(priv, len);
|
|
|
|
ps3vram_out_ring(priv, len);
|
|
|
|
ps3vram_out_ring(priv, len);
|
|
|
|
ps3vram_out_ring(priv, count);
|
|
|
|
ps3vram_out_ring(priv, (1 << 8) | 1);
|
|
|
|
ps3vram_out_ring(priv, 0);
|
|
|
|
|
|
|
|
ps3vram_notifier_reset(dev);
|
|
|
|
ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
|
|
|
|
NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
|
|
|
|
ps3vram_out_ring(priv, 0);
|
|
|
|
ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x100, 1);
|
|
|
|
ps3vram_out_ring(priv, 0);
|
|
|
|
ps3vram_fire_ring(dev);
|
|
|
|
if (ps3vram_notifier_wait(dev, 200) < 0) {
|
|
|
|
dev_warn(&dev->core, "%s: Notifier timeout\n", __func__);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ps3vram_cache_evict(struct ps3_system_bus_device *dev, int entry)
|
|
|
|
{
|
2009-06-10 12:38:54 +08:00
|
|
|
struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
|
2009-03-06 10:54:09 +08:00
|
|
|
struct ps3vram_cache *cache = &priv->cache;
|
|
|
|
|
|
|
|
if (!(cache->tags[entry].flags & CACHE_PAGE_DIRTY))
|
|
|
|
return;
|
|
|
|
|
|
|
|
dev_dbg(&dev->core, "Flushing %d: 0x%08x\n", entry,
|
|
|
|
cache->tags[entry].address);
|
|
|
|
if (ps3vram_upload(dev, CACHE_OFFSET + entry * cache->page_size,
|
|
|
|
cache->tags[entry].address, DMA_PAGE_SIZE,
|
|
|
|
cache->page_size / DMA_PAGE_SIZE) < 0) {
|
|
|
|
dev_err(&dev->core,
|
|
|
|
"Failed to upload from 0x%x to " "0x%x size 0x%x\n",
|
|
|
|
entry * cache->page_size, cache->tags[entry].address,
|
|
|
|
cache->page_size);
|
|
|
|
}
|
|
|
|
cache->tags[entry].flags &= ~CACHE_PAGE_DIRTY;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ps3vram_cache_load(struct ps3_system_bus_device *dev, int entry,
|
|
|
|
unsigned int address)
|
|
|
|
{
|
2009-06-10 12:38:54 +08:00
|
|
|
struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
|
2009-03-06 10:54:09 +08:00
|
|
|
struct ps3vram_cache *cache = &priv->cache;
|
|
|
|
|
|
|
|
dev_dbg(&dev->core, "Fetching %d: 0x%08x\n", entry, address);
|
|
|
|
if (ps3vram_download(dev, address,
|
|
|
|
CACHE_OFFSET + entry * cache->page_size,
|
|
|
|
DMA_PAGE_SIZE,
|
|
|
|
cache->page_size / DMA_PAGE_SIZE) < 0) {
|
|
|
|
dev_err(&dev->core,
|
|
|
|
"Failed to download from 0x%x to 0x%x size 0x%x\n",
|
|
|
|
address, entry * cache->page_size, cache->page_size);
|
|
|
|
}
|
|
|
|
|
|
|
|
cache->tags[entry].address = address;
|
|
|
|
cache->tags[entry].flags |= CACHE_PAGE_PRESENT;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static void ps3vram_cache_flush(struct ps3_system_bus_device *dev)
|
|
|
|
{
|
2009-06-10 12:38:54 +08:00
|
|
|
struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
|
2009-03-06 10:54:09 +08:00
|
|
|
struct ps3vram_cache *cache = &priv->cache;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
dev_dbg(&dev->core, "FLUSH\n");
|
|
|
|
for (i = 0; i < cache->page_count; i++) {
|
|
|
|
ps3vram_cache_evict(dev, i);
|
|
|
|
cache->tags[i].flags = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static unsigned int ps3vram_cache_match(struct ps3_system_bus_device *dev,
|
|
|
|
loff_t address)
|
|
|
|
{
|
2009-06-10 12:38:54 +08:00
|
|
|
struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
|
2009-03-06 10:54:09 +08:00
|
|
|
struct ps3vram_cache *cache = &priv->cache;
|
|
|
|
unsigned int base;
|
|
|
|
unsigned int offset;
|
|
|
|
int i;
|
|
|
|
static int counter;
|
|
|
|
|
|
|
|
offset = (unsigned int) (address & (cache->page_size - 1));
|
|
|
|
base = (unsigned int) (address - offset);
|
|
|
|
|
|
|
|
/* fully associative check */
|
|
|
|
for (i = 0; i < cache->page_count; i++) {
|
|
|
|
if ((cache->tags[i].flags & CACHE_PAGE_PRESENT) &&
|
|
|
|
cache->tags[i].address == base) {
|
|
|
|
cache->hit++;
|
|
|
|
dev_dbg(&dev->core, "Found entry %d: 0x%08x\n", i,
|
|
|
|
cache->tags[i].address);
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* choose a random entry */
|
|
|
|
i = (jiffies + (counter++)) % cache->page_count;
|
|
|
|
dev_dbg(&dev->core, "Using entry %d\n", i);
|
|
|
|
|
|
|
|
ps3vram_cache_evict(dev, i);
|
|
|
|
ps3vram_cache_load(dev, i, base);
|
|
|
|
|
|
|
|
cache->miss++;
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ps3vram_cache_init(struct ps3_system_bus_device *dev)
|
|
|
|
{
|
2009-06-10 12:38:54 +08:00
|
|
|
struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
|
2009-03-06 10:54:09 +08:00
|
|
|
|
|
|
|
priv->cache.page_count = CACHE_PAGE_COUNT;
|
|
|
|
priv->cache.page_size = CACHE_PAGE_SIZE;
|
|
|
|
priv->cache.tags = kzalloc(sizeof(struct ps3vram_tag) *
|
|
|
|
CACHE_PAGE_COUNT, GFP_KERNEL);
|
2017-08-08 04:09:20 +08:00
|
|
|
if (!priv->cache.tags)
|
2009-03-06 10:54:09 +08:00
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
dev_info(&dev->core, "Created ram cache: %d entries, %d KiB each\n",
|
|
|
|
CACHE_PAGE_COUNT, CACHE_PAGE_SIZE / 1024);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ps3vram_cache_cleanup(struct ps3_system_bus_device *dev)
|
|
|
|
{
|
2009-06-10 12:38:54 +08:00
|
|
|
struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
|
2009-03-06 10:54:09 +08:00
|
|
|
|
|
|
|
ps3vram_cache_flush(dev);
|
|
|
|
kfree(priv->cache.tags);
|
|
|
|
}
|
|
|
|
|
2017-06-03 15:38:06 +08:00
|
|
|
static blk_status_t ps3vram_read(struct ps3_system_bus_device *dev, loff_t from,
|
2009-03-06 10:54:09 +08:00
|
|
|
size_t len, size_t *retlen, u_char *buf)
|
|
|
|
{
|
2009-06-10 12:38:54 +08:00
|
|
|
struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
|
2009-03-06 10:54:09 +08:00
|
|
|
unsigned int cached, count;
|
|
|
|
|
|
|
|
dev_dbg(&dev->core, "%s: from=0x%08x len=0x%zx\n", __func__,
|
|
|
|
(unsigned int)from, len);
|
|
|
|
|
|
|
|
if (from >= priv->size)
|
2017-06-03 15:38:06 +08:00
|
|
|
return BLK_STS_IOERR;
|
2009-03-06 10:54:09 +08:00
|
|
|
|
|
|
|
if (len > priv->size - from)
|
|
|
|
len = priv->size - from;
|
|
|
|
|
|
|
|
/* Copy from vram to buf */
|
|
|
|
count = len;
|
|
|
|
while (count) {
|
|
|
|
unsigned int offset, avail;
|
|
|
|
unsigned int entry;
|
|
|
|
|
|
|
|
offset = (unsigned int) (from & (priv->cache.page_size - 1));
|
|
|
|
avail = priv->cache.page_size - offset;
|
|
|
|
|
|
|
|
entry = ps3vram_cache_match(dev, from);
|
|
|
|
cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
|
|
|
|
|
|
|
|
dev_dbg(&dev->core, "%s: from=%08x cached=%08x offset=%08x "
|
|
|
|
"avail=%08x count=%08x\n", __func__,
|
|
|
|
(unsigned int)from, cached, offset, avail, count);
|
|
|
|
|
|
|
|
if (avail > count)
|
|
|
|
avail = count;
|
|
|
|
memcpy(buf, priv->xdr_buf + cached, avail);
|
|
|
|
|
|
|
|
buf += avail;
|
|
|
|
count -= avail;
|
|
|
|
from += avail;
|
|
|
|
}
|
|
|
|
|
|
|
|
*retlen = len;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-06-03 15:38:06 +08:00
|
|
|
static blk_status_t ps3vram_write(struct ps3_system_bus_device *dev, loff_t to,
|
2009-03-06 10:54:09 +08:00
|
|
|
size_t len, size_t *retlen, const u_char *buf)
|
|
|
|
{
|
2009-06-10 12:38:54 +08:00
|
|
|
struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
|
2009-03-06 10:54:09 +08:00
|
|
|
unsigned int cached, count;
|
|
|
|
|
|
|
|
if (to >= priv->size)
|
2017-06-03 15:38:06 +08:00
|
|
|
return BLK_STS_IOERR;
|
2009-03-06 10:54:09 +08:00
|
|
|
|
|
|
|
if (len > priv->size - to)
|
|
|
|
len = priv->size - to;
|
|
|
|
|
|
|
|
/* Copy from buf to vram */
|
|
|
|
count = len;
|
|
|
|
while (count) {
|
|
|
|
unsigned int offset, avail;
|
|
|
|
unsigned int entry;
|
|
|
|
|
|
|
|
offset = (unsigned int) (to & (priv->cache.page_size - 1));
|
|
|
|
avail = priv->cache.page_size - offset;
|
|
|
|
|
|
|
|
entry = ps3vram_cache_match(dev, to);
|
|
|
|
cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
|
|
|
|
|
|
|
|
dev_dbg(&dev->core, "%s: to=%08x cached=%08x offset=%08x "
|
|
|
|
"avail=%08x count=%08x\n", __func__, (unsigned int)to,
|
|
|
|
cached, offset, avail, count);
|
|
|
|
|
|
|
|
if (avail > count)
|
|
|
|
avail = count;
|
|
|
|
memcpy(priv->xdr_buf + cached, buf, avail);
|
|
|
|
|
|
|
|
priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY;
|
|
|
|
|
|
|
|
buf += avail;
|
|
|
|
count -= avail;
|
|
|
|
to += avail;
|
|
|
|
}
|
|
|
|
|
|
|
|
*retlen = len;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ps3vram_proc_show(struct seq_file *m, void *v)
|
|
|
|
{
|
|
|
|
struct ps3vram_priv *priv = m->private;
|
|
|
|
|
|
|
|
seq_printf(m, "hit:%u\nmiss:%u\n", priv->cache.hit, priv->cache.miss);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-12-22 07:13:49 +08:00
|
|
|
static void ps3vram_proc_init(struct ps3_system_bus_device *dev)
|
2009-03-06 10:54:09 +08:00
|
|
|
{
|
2009-06-10 12:38:54 +08:00
|
|
|
struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
|
2009-03-06 10:54:09 +08:00
|
|
|
struct proc_dir_entry *pde;
|
|
|
|
|
2018-05-15 21:57:23 +08:00
|
|
|
pde = proc_create_single_data(DEVICE_NAME, 0444, NULL,
|
|
|
|
ps3vram_proc_show, priv);
|
2009-06-10 12:38:38 +08:00
|
|
|
if (!pde)
|
2009-03-06 10:54:09 +08:00
|
|
|
dev_warn(&dev->core, "failed to create /proc entry\n");
|
|
|
|
}
|
|
|
|
|
2009-06-10 12:38:41 +08:00
|
|
|
static struct bio *ps3vram_do_bio(struct ps3_system_bus_device *dev,
|
|
|
|
struct bio *bio)
|
2009-03-06 10:54:09 +08:00
|
|
|
{
|
2009-06-10 12:38:54 +08:00
|
|
|
struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
|
2009-03-06 10:54:09 +08:00
|
|
|
int write = bio_data_dir(bio) == WRITE;
|
|
|
|
const char *op = write ? "write" : "read";
|
2013-10-12 06:44:27 +08:00
|
|
|
loff_t offset = bio->bi_iter.bi_sector << 9;
|
2017-06-03 15:38:06 +08:00
|
|
|
blk_status_t error = 0;
|
2013-11-24 09:19:00 +08:00
|
|
|
struct bio_vec bvec;
|
|
|
|
struct bvec_iter iter;
|
2009-06-10 12:38:41 +08:00
|
|
|
struct bio *next;
|
2009-03-06 10:54:09 +08:00
|
|
|
|
2013-11-24 09:19:00 +08:00
|
|
|
bio_for_each_segment(bvec, bio, iter) {
|
2009-03-06 10:54:09 +08:00
|
|
|
/* PS3 is ppc64, so we don't handle highmem */
|
2013-11-24 09:19:00 +08:00
|
|
|
char *ptr = page_address(bvec.bv_page) + bvec.bv_offset;
|
|
|
|
size_t len = bvec.bv_len, retlen;
|
2009-03-06 10:54:09 +08:00
|
|
|
|
|
|
|
dev_dbg(&dev->core, " %s %zu bytes at offset %llu\n", op,
|
|
|
|
len, offset);
|
|
|
|
if (write)
|
|
|
|
error = ps3vram_write(dev, offset, len, &retlen, ptr);
|
|
|
|
else
|
|
|
|
error = ps3vram_read(dev, offset, len, &retlen, ptr);
|
|
|
|
|
|
|
|
if (error) {
|
|
|
|
dev_err(&dev->core, "%s failed\n", op);
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (retlen != len) {
|
|
|
|
dev_err(&dev->core, "Short %s\n", op);
|
2017-06-03 15:38:06 +08:00
|
|
|
error = BLK_STS_IOERR;
|
2009-03-06 10:54:09 +08:00
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
offset += len;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev_dbg(&dev->core, "%s completed\n", op);
|
|
|
|
|
|
|
|
out:
|
2009-06-10 12:38:41 +08:00
|
|
|
spin_lock_irq(&priv->lock);
|
|
|
|
bio_list_pop(&priv->list);
|
|
|
|
next = bio_list_peek(&priv->list);
|
|
|
|
spin_unlock_irq(&priv->lock);
|
|
|
|
|
2017-06-03 15:38:06 +08:00
|
|
|
bio->bi_status = error;
|
2015-07-20 21:29:37 +08:00
|
|
|
bio_endio(bio);
|
2009-06-10 12:38:41 +08:00
|
|
|
return next;
|
|
|
|
}
|
|
|
|
|
2015-11-06 01:41:16 +08:00
|
|
|
static blk_qc_t ps3vram_make_request(struct request_queue *q, struct bio *bio)
|
2009-06-10 12:38:41 +08:00
|
|
|
{
|
|
|
|
struct ps3_system_bus_device *dev = q->queuedata;
|
2009-06-10 12:38:54 +08:00
|
|
|
struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
|
2009-06-10 12:38:41 +08:00
|
|
|
int busy;
|
|
|
|
|
|
|
|
dev_dbg(&dev->core, "%s\n", __func__);
|
|
|
|
|
2017-06-18 12:38:57 +08:00
|
|
|
blk_queue_split(q, &bio);
|
2015-04-24 13:37:18 +08:00
|
|
|
|
2009-06-10 12:38:41 +08:00
|
|
|
spin_lock_irq(&priv->lock);
|
|
|
|
busy = !bio_list_empty(&priv->list);
|
|
|
|
bio_list_add(&priv->list, bio);
|
|
|
|
spin_unlock_irq(&priv->lock);
|
|
|
|
|
|
|
|
if (busy)
|
2015-11-06 01:41:16 +08:00
|
|
|
return BLK_QC_T_NONE;
|
2009-06-10 12:38:41 +08:00
|
|
|
|
|
|
|
do {
|
|
|
|
bio = ps3vram_do_bio(dev, bio);
|
|
|
|
} while (bio);
|
2015-11-06 01:41:16 +08:00
|
|
|
|
|
|
|
return BLK_QC_T_NONE;
|
2009-03-06 10:54:09 +08:00
|
|
|
}
|
|
|
|
|
2012-12-22 07:13:49 +08:00
|
|
|
static int ps3vram_probe(struct ps3_system_bus_device *dev)
|
2009-03-06 10:54:09 +08:00
|
|
|
{
|
|
|
|
struct ps3vram_priv *priv;
|
|
|
|
int error, status;
|
|
|
|
struct request_queue *queue;
|
|
|
|
struct gendisk *gendisk;
|
2009-06-10 12:38:47 +08:00
|
|
|
u64 ddr_size, ddr_lpar, ctrl_lpar, info_lpar, reports_lpar,
|
|
|
|
reports_size, xdr_lpar;
|
2009-03-06 10:54:09 +08:00
|
|
|
char *rest;
|
|
|
|
|
|
|
|
priv = kzalloc(sizeof(*priv), GFP_KERNEL);
|
|
|
|
if (!priv) {
|
|
|
|
error = -ENOMEM;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2009-06-10 12:38:41 +08:00
|
|
|
spin_lock_init(&priv->lock);
|
|
|
|
bio_list_init(&priv->list);
|
2009-06-10 12:38:54 +08:00
|
|
|
ps3_system_bus_set_drvdata(dev, priv);
|
2009-03-06 10:54:09 +08:00
|
|
|
|
|
|
|
/* Allocate XDR buffer (1MiB aligned) */
|
|
|
|
priv->xdr_buf = (void *)__get_free_pages(GFP_KERNEL,
|
|
|
|
get_order(XDR_BUF_SIZE));
|
|
|
|
if (priv->xdr_buf == NULL) {
|
|
|
|
dev_err(&dev->core, "Could not allocate XDR buffer\n");
|
|
|
|
error = -ENOMEM;
|
|
|
|
goto fail_free_priv;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Put FIFO at begginning of XDR buffer */
|
|
|
|
priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET);
|
|
|
|
priv->fifo_ptr = priv->fifo_base;
|
|
|
|
|
|
|
|
/* XXX: Need to open GPU, in case ps3fb or snd_ps3 aren't loaded */
|
|
|
|
if (ps3_open_hv_device(dev)) {
|
|
|
|
dev_err(&dev->core, "ps3_open_hv_device failed\n");
|
|
|
|
error = -EAGAIN;
|
2009-06-10 12:38:39 +08:00
|
|
|
goto out_free_xdr_buf;
|
2009-03-06 10:54:09 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Request memory */
|
|
|
|
status = -1;
|
|
|
|
ddr_size = ALIGN(memparse(size, &rest), 1024*1024);
|
|
|
|
if (!ddr_size) {
|
|
|
|
dev_err(&dev->core, "Specified size is too small\n");
|
|
|
|
error = -EINVAL;
|
|
|
|
goto out_close_gpu;
|
|
|
|
}
|
|
|
|
|
|
|
|
while (ddr_size > 0) {
|
|
|
|
status = lv1_gpu_memory_allocate(ddr_size, 0, 0, 0, 0,
|
|
|
|
&priv->memory_handle,
|
|
|
|
&ddr_lpar);
|
|
|
|
if (!status)
|
|
|
|
break;
|
|
|
|
ddr_size -= 1024*1024;
|
|
|
|
}
|
|
|
|
if (status) {
|
|
|
|
dev_err(&dev->core, "lv1_gpu_memory_allocate failed %d\n",
|
|
|
|
status);
|
|
|
|
error = -ENOMEM;
|
2009-06-10 12:38:39 +08:00
|
|
|
goto out_close_gpu;
|
2009-03-06 10:54:09 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Request context */
|
|
|
|
status = lv1_gpu_context_allocate(priv->memory_handle, 0,
|
|
|
|
&priv->context_handle, &ctrl_lpar,
|
|
|
|
&info_lpar, &reports_lpar,
|
|
|
|
&reports_size);
|
|
|
|
if (status) {
|
|
|
|
dev_err(&dev->core, "lv1_gpu_context_allocate failed %d\n",
|
|
|
|
status);
|
|
|
|
error = -ENOMEM;
|
|
|
|
goto out_free_memory;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Map XDR buffer to RSX */
|
2009-06-10 12:38:47 +08:00
|
|
|
xdr_lpar = ps3_mm_phys_to_lpar(__pa(priv->xdr_buf));
|
2009-03-06 10:54:09 +08:00
|
|
|
status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
|
2009-06-10 12:38:47 +08:00
|
|
|
xdr_lpar, XDR_BUF_SIZE,
|
|
|
|
CBE_IOPTE_PP_W | CBE_IOPTE_PP_R |
|
|
|
|
CBE_IOPTE_M);
|
2009-03-06 10:54:09 +08:00
|
|
|
if (status) {
|
|
|
|
dev_err(&dev->core, "lv1_gpu_context_iomap failed %d\n",
|
|
|
|
status);
|
|
|
|
error = -ENOMEM;
|
|
|
|
goto out_free_context;
|
|
|
|
}
|
|
|
|
|
|
|
|
priv->ctrl = ioremap(ctrl_lpar, 64 * 1024);
|
|
|
|
if (!priv->ctrl) {
|
|
|
|
dev_err(&dev->core, "ioremap CTRL failed\n");
|
|
|
|
error = -ENOMEM;
|
2009-06-10 12:38:50 +08:00
|
|
|
goto out_unmap_context;
|
2009-03-06 10:54:09 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
priv->reports = ioremap(reports_lpar, reports_size);
|
|
|
|
if (!priv->reports) {
|
|
|
|
dev_err(&dev->core, "ioremap REPORTS failed\n");
|
|
|
|
error = -ENOMEM;
|
|
|
|
goto out_unmap_ctrl;
|
|
|
|
}
|
|
|
|
|
|
|
|
mutex_lock(&ps3_gpu_mutex);
|
|
|
|
ps3vram_init_ring(dev);
|
|
|
|
mutex_unlock(&ps3_gpu_mutex);
|
|
|
|
|
|
|
|
priv->size = ddr_size;
|
|
|
|
|
|
|
|
ps3vram_bind(dev);
|
|
|
|
|
|
|
|
mutex_lock(&ps3_gpu_mutex);
|
|
|
|
error = ps3vram_wait_ring(dev, 100);
|
|
|
|
mutex_unlock(&ps3_gpu_mutex);
|
|
|
|
if (error < 0) {
|
|
|
|
dev_err(&dev->core, "Failed to initialize channels\n");
|
|
|
|
error = -ETIMEDOUT;
|
|
|
|
goto out_unmap_reports;
|
|
|
|
}
|
|
|
|
|
2017-08-08 04:09:20 +08:00
|
|
|
error = ps3vram_cache_init(dev);
|
|
|
|
if (error < 0) {
|
|
|
|
goto out_unmap_reports;
|
|
|
|
}
|
|
|
|
|
2009-03-06 10:54:09 +08:00
|
|
|
ps3vram_proc_init(dev);
|
|
|
|
|
|
|
|
queue = blk_alloc_queue(GFP_KERNEL);
|
|
|
|
if (!queue) {
|
|
|
|
dev_err(&dev->core, "blk_alloc_queue failed\n");
|
|
|
|
error = -ENOMEM;
|
|
|
|
goto out_cache_cleanup;
|
|
|
|
}
|
|
|
|
|
|
|
|
priv->queue = queue;
|
|
|
|
queue->queuedata = dev;
|
|
|
|
blk_queue_make_request(queue, ps3vram_make_request);
|
2010-03-01 16:21:01 +08:00
|
|
|
blk_queue_max_segments(queue, BLK_MAX_SEGMENTS);
|
2010-02-26 13:20:37 +08:00
|
|
|
blk_queue_max_segment_size(queue, BLK_MAX_SEGMENT_SIZE);
|
2010-02-26 13:20:38 +08:00
|
|
|
blk_queue_max_hw_sectors(queue, BLK_SAFE_MAX_SECTORS);
|
2009-03-06 10:54:09 +08:00
|
|
|
|
|
|
|
gendisk = alloc_disk(1);
|
|
|
|
if (!gendisk) {
|
|
|
|
dev_err(&dev->core, "alloc_disk failed\n");
|
|
|
|
error = -ENOMEM;
|
|
|
|
goto fail_cleanup_queue;
|
|
|
|
}
|
|
|
|
|
|
|
|
priv->gendisk = gendisk;
|
|
|
|
gendisk->major = ps3vram_major;
|
|
|
|
gendisk->first_minor = 0;
|
|
|
|
gendisk->fops = &ps3vram_fops;
|
|
|
|
gendisk->queue = queue;
|
|
|
|
gendisk->private_data = dev;
|
|
|
|
strlcpy(gendisk->disk_name, DEVICE_NAME, sizeof(gendisk->disk_name));
|
|
|
|
set_capacity(gendisk, priv->size >> 9);
|
|
|
|
|
|
|
|
dev_info(&dev->core, "%s: Using %lu MiB of GPU memory\n",
|
|
|
|
gendisk->disk_name, get_capacity(gendisk) >> 11);
|
|
|
|
|
2016-06-16 10:44:20 +08:00
|
|
|
device_add_disk(&dev->core, gendisk);
|
2009-03-06 10:54:09 +08:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail_cleanup_queue:
|
|
|
|
blk_cleanup_queue(queue);
|
|
|
|
out_cache_cleanup:
|
|
|
|
remove_proc_entry(DEVICE_NAME, NULL);
|
|
|
|
ps3vram_cache_cleanup(dev);
|
|
|
|
out_unmap_reports:
|
|
|
|
iounmap(priv->reports);
|
|
|
|
out_unmap_ctrl:
|
|
|
|
iounmap(priv->ctrl);
|
2009-06-10 12:38:47 +08:00
|
|
|
out_unmap_context:
|
|
|
|
lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, xdr_lpar,
|
|
|
|
XDR_BUF_SIZE, CBE_IOPTE_M);
|
2009-03-06 10:54:09 +08:00
|
|
|
out_free_context:
|
|
|
|
lv1_gpu_context_free(priv->context_handle);
|
|
|
|
out_free_memory:
|
|
|
|
lv1_gpu_memory_free(priv->memory_handle);
|
|
|
|
out_close_gpu:
|
|
|
|
ps3_close_hv_device(dev);
|
|
|
|
out_free_xdr_buf:
|
|
|
|
free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
|
|
|
|
fail_free_priv:
|
|
|
|
kfree(priv);
|
2009-06-10 12:38:54 +08:00
|
|
|
ps3_system_bus_set_drvdata(dev, NULL);
|
2009-03-06 10:54:09 +08:00
|
|
|
fail:
|
|
|
|
return error;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ps3vram_remove(struct ps3_system_bus_device *dev)
|
|
|
|
{
|
2009-06-10 12:38:54 +08:00
|
|
|
struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
|
2009-03-06 10:54:09 +08:00
|
|
|
|
|
|
|
del_gendisk(priv->gendisk);
|
|
|
|
put_disk(priv->gendisk);
|
|
|
|
blk_cleanup_queue(priv->queue);
|
|
|
|
remove_proc_entry(DEVICE_NAME, NULL);
|
|
|
|
ps3vram_cache_cleanup(dev);
|
|
|
|
iounmap(priv->reports);
|
|
|
|
iounmap(priv->ctrl);
|
2009-06-10 12:38:47 +08:00
|
|
|
lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
|
|
|
|
ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)),
|
|
|
|
XDR_BUF_SIZE, CBE_IOPTE_M);
|
2009-03-06 10:54:09 +08:00
|
|
|
lv1_gpu_context_free(priv->context_handle);
|
|
|
|
lv1_gpu_memory_free(priv->memory_handle);
|
|
|
|
ps3_close_hv_device(dev);
|
|
|
|
free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
|
|
|
|
kfree(priv);
|
2009-06-10 12:38:54 +08:00
|
|
|
ps3_system_bus_set_drvdata(dev, NULL);
|
2009-03-06 10:54:09 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct ps3_system_bus_driver ps3vram = {
|
|
|
|
.match_id = PS3_MATCH_ID_GPU,
|
|
|
|
.match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK,
|
|
|
|
.core.name = DEVICE_NAME,
|
|
|
|
.core.owner = THIS_MODULE,
|
|
|
|
.probe = ps3vram_probe,
|
|
|
|
.remove = ps3vram_remove,
|
|
|
|
.shutdown = ps3vram_remove,
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
static int __init ps3vram_init(void)
|
|
|
|
{
|
|
|
|
int error;
|
|
|
|
|
|
|
|
if (!firmware_has_feature(FW_FEATURE_PS3_LV1))
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
error = register_blkdev(0, DEVICE_NAME);
|
|
|
|
if (error <= 0) {
|
|
|
|
pr_err("%s: register_blkdev failed %d\n", DEVICE_NAME, error);
|
|
|
|
return error;
|
|
|
|
}
|
|
|
|
ps3vram_major = error;
|
|
|
|
|
|
|
|
pr_info("%s: registered block device major %d\n", DEVICE_NAME,
|
|
|
|
ps3vram_major);
|
|
|
|
|
|
|
|
error = ps3_system_bus_driver_register(&ps3vram);
|
|
|
|
if (error)
|
|
|
|
unregister_blkdev(ps3vram_major, DEVICE_NAME);
|
|
|
|
|
|
|
|
return error;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit ps3vram_exit(void)
|
|
|
|
{
|
|
|
|
ps3_system_bus_driver_unregister(&ps3vram);
|
|
|
|
unregister_blkdev(ps3vram_major, DEVICE_NAME);
|
|
|
|
}
|
|
|
|
|
|
|
|
module_init(ps3vram_init);
|
|
|
|
module_exit(ps3vram_exit);
|
|
|
|
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
MODULE_DESCRIPTION("PS3 Video RAM Storage Driver");
|
|
|
|
MODULE_AUTHOR("Sony Corporation");
|
|
|
|
MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_RAMDISK);
|