2019-05-27 14:55:05 +08:00
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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2007-04-17 07:25:53 +08:00
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/*
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* This interface is used for compatibility with old U-boots *ONLY*.
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* Please do not imitate or extend this.
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*/
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/*
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* (C) Copyright 2000, 2001
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*/
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#ifndef __PPCBOOT_H__
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#define __PPCBOOT_H__
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/*
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* Board information passed to kernel from PPCBoot
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*
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* include/asm-ppc/ppcboot.h
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*/
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#include "types.h"
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typedef struct bd_info {
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unsigned long bi_memstart; /* start of DRAM memory */
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unsigned long bi_memsize; /* size of DRAM memory in bytes */
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unsigned long bi_flashstart; /* start of FLASH memory */
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unsigned long bi_flashsize; /* size of FLASH memory */
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unsigned long bi_flashoffset; /* reserved area for startup monitor */
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unsigned long bi_sramstart; /* start of SRAM memory */
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unsigned long bi_sramsize; /* size of SRAM memory */
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#if defined(TARGET_8xx) || defined(TARGET_CPM2) || defined(TARGET_85xx) ||\
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2016-05-30 17:47:16 +08:00
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defined(TARGET_83xx) || defined(TARGET_86xx)
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2007-04-17 07:25:53 +08:00
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unsigned long bi_immr_base; /* base of IMMR register */
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#endif
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#if defined(TARGET_PPC_MPC52xx)
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unsigned long bi_mbar_base; /* base of internal registers */
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#endif
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unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */
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unsigned long bi_ip_addr; /* IP Address */
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unsigned char bi_enetaddr[6]; /* Ethernet address */
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unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
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unsigned long bi_intfreq; /* Internal Freq, in MHz */
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unsigned long bi_busfreq; /* Bus Freq, in MHz */
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#if defined(TARGET_CPM2)
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unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */
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unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */
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unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
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unsigned long bi_vco; /* VCO Out from PLL, in MHz */
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#endif
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#if defined(TARGET_PPC_MPC52xx)
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unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */
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unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */
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#endif
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unsigned long bi_baudrate; /* Console Baudrate */
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#if defined(TARGET_4xx)
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unsigned char bi_s_version[4]; /* Version of this structure */
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unsigned char bi_r_version[32]; /* Version of the ROM (IBM) */
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unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */
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unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */
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unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
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unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
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#endif
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#if defined(TARGET_HYMOD)
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hymod_conf_t bi_hymod_conf; /* hymod configuration information */
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#endif
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#if defined(TARGET_EVB64260) || defined(TARGET_405EP) || defined(TARGET_44x) || \
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2007-08-21 01:39:52 +08:00
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defined(TARGET_85xx) || defined(TARGET_83xx) || defined(TARGET_HAS_ETH1)
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2007-04-17 07:25:53 +08:00
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/* second onboard ethernet port */
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unsigned char bi_enet1addr[6];
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#define HAVE_ENET1ADDR
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#endif
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2007-08-21 01:39:52 +08:00
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#if defined(TARGET_EVB64260) || defined(TARGET_440GX) || \
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defined(TARGET_85xx) || defined(TARGET_HAS_ETH2)
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2007-04-17 07:25:53 +08:00
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/* third onboard ethernet ports */
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unsigned char bi_enet2addr[6];
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#define HAVE_ENET2ADDR
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#endif
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2007-08-21 01:39:52 +08:00
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#if defined(TARGET_440GX) || defined(TARGET_HAS_ETH3)
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2007-04-17 07:25:53 +08:00
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/* fourth onboard ethernet ports */
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unsigned char bi_enet3addr[6];
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#define HAVE_ENET3ADDR
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#endif
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#if defined(TARGET_4xx)
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unsigned int bi_opbfreq; /* OB clock in Hz */
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int bi_iic_fast[2]; /* Use fast i2c mode */
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#endif
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#if defined(TARGET_440GX)
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int bi_phynum[4]; /* phy mapping */
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int bi_phymode[4]; /* phy mode */
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#endif
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} bd_t;
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#define bi_tbfreq bi_intfreq
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#endif /* __PPCBOOT_H__ */
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