2012-03-05 19:49:33 +08:00
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/*
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* ARMv8 single-step debug support and mdscr context switching.
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*
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* Copyright (C) 2012 ARM Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* Author: Will Deacon <will.deacon@arm.com>
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*/
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#include <linux/cpu.h>
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#include <linux/debugfs.h>
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#include <linux/hardirq.h>
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#include <linux/init.h>
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#include <linux/ptrace.h>
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arm64: Kprobes with single stepping support
Add support for basic kernel probes(kprobes) and jump probes
(jprobes) for ARM64.
Kprobes utilizes software breakpoint and single step debug
exceptions supported on ARM v8.
A software breakpoint is placed at the probe address to trap the
kernel execution into the kprobe handler.
ARM v8 supports enabling single stepping before the break exception
return (ERET), with next PC in exception return address (ELR_EL1). The
kprobe handler prepares an executable memory slot for out-of-line
execution with a copy of the original instruction being probed, and
enables single stepping. The PC is set to the out-of-line slot address
before the ERET. With this scheme, the instruction is executed with the
exact same register context except for the PC (and DAIF) registers.
Debug mask (PSTATE.D) is enabled only when single stepping a recursive
kprobe, e.g.: during kprobes reenter so that probed instruction can be
single stepped within the kprobe handler -exception- context.
The recursion depth of kprobe is always 2, i.e. upon probe re-entry,
any further re-entry is prevented by not calling handlers and the case
counted as a missed kprobe).
Single stepping from the x-o-l slot has a drawback for PC-relative accesses
like branching and symbolic literals access as the offset from the new PC
(slot address) may not be ensured to fit in the immediate value of
the opcode. Such instructions need simulation, so reject
probing them.
Instructions generating exceptions or cpu mode change are rejected
for probing.
Exclusive load/store instructions are rejected too. Additionally, the
code is checked to see if it is inside an exclusive load/store sequence
(code from Pratyush).
System instructions are mostly enabled for stepping, except MSR/MRS
accesses to "DAIF" flags in PSTATE, which are not safe for
probing.
This also changes arch/arm64/include/asm/ptrace.h to use
include/asm-generic/ptrace.h.
Thanks to Steve Capper and Pratyush Anand for several suggested
Changes.
Signed-off-by: Sandeepa Prabhu <sandeepa.s.prabhu@gmail.com>
Signed-off-by: David A. Long <dave.long@linaro.org>
Signed-off-by: Pratyush Anand <panand@redhat.com>
Acked-by: Masami Hiramatsu <mhiramat@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2016-07-09 00:35:48 +08:00
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#include <linux/kprobes.h>
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2012-03-05 19:49:33 +08:00
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#include <linux/stat.h>
|
2013-03-16 16:48:13 +08:00
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#include <linux/uaccess.h>
|
2017-02-09 01:51:37 +08:00
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#include <linux/sched/task_stack.h>
|
2012-03-05 19:49:33 +08:00
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|
2015-10-19 21:24:54 +08:00
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#include <asm/cpufeature.h>
|
2012-03-05 19:49:33 +08:00
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#include <asm/cputype.h>
|
2017-11-02 20:12:35 +08:00
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#include <asm/daifflags.h>
|
2015-10-19 21:24:54 +08:00
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#include <asm/debug-monitors.h>
|
2012-03-05 19:49:33 +08:00
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#include <asm/system_misc.h>
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/* Determine debug architecture. */
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u8 debug_monitors_arch(void)
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{
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2017-03-23 23:14:39 +08:00
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return cpuid_feature_extract_unsigned_field(read_sanitised_ftr_reg(SYS_ID_AA64DFR0_EL1),
|
2015-10-19 21:24:54 +08:00
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ID_AA64DFR0_DEBUGVER_SHIFT);
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2012-03-05 19:49:33 +08:00
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}
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/*
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* MDSCR access routines.
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*/
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static void mdscr_write(u32 mdscr)
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{
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unsigned long flags;
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2017-11-02 20:12:35 +08:00
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flags = local_daif_save();
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2016-09-08 20:55:38 +08:00
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write_sysreg(mdscr, mdscr_el1);
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2017-11-02 20:12:35 +08:00
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local_daif_restore(flags);
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2012-03-05 19:49:33 +08:00
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}
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2016-07-09 00:35:49 +08:00
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NOKPROBE_SYMBOL(mdscr_write);
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2012-03-05 19:49:33 +08:00
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static u32 mdscr_read(void)
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{
|
2016-09-08 20:55:38 +08:00
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return read_sysreg(mdscr_el1);
|
2012-03-05 19:49:33 +08:00
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}
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2016-07-09 00:35:49 +08:00
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NOKPROBE_SYMBOL(mdscr_read);
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2012-03-05 19:49:33 +08:00
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/*
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* Allow root to disable self-hosted debug from userspace.
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* This is useful if you want to connect an external JTAG debugger.
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*/
|
2015-09-27 06:04:07 +08:00
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static bool debug_enabled = true;
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2012-03-05 19:49:33 +08:00
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static int create_debug_debugfs_entry(void)
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{
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debugfs_create_bool("debug_enabled", 0644, NULL, &debug_enabled);
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return 0;
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}
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fs_initcall(create_debug_debugfs_entry);
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static int __init early_debug_disable(char *buf)
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{
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2015-09-27 06:04:07 +08:00
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debug_enabled = false;
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2012-03-05 19:49:33 +08:00
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return 0;
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}
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early_param("nodebugmon", early_debug_disable);
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/*
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* Keep track of debug users on each core.
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* The ref counts are per-cpu so we use a local_t type.
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*/
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2013-10-21 20:17:08 +08:00
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static DEFINE_PER_CPU(int, mde_ref_count);
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static DEFINE_PER_CPU(int, kde_ref_count);
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2012-03-05 19:49:33 +08:00
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|
2015-07-28 01:36:54 +08:00
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void enable_debug_monitors(enum dbg_active_el el)
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2012-03-05 19:49:33 +08:00
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{
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u32 mdscr, enable = 0;
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WARN_ON(preemptible());
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2013-10-21 20:17:08 +08:00
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if (this_cpu_inc_return(mde_ref_count) == 1)
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2012-03-05 19:49:33 +08:00
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enable = DBG_MDSCR_MDE;
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if (el == DBG_ACTIVE_EL1 &&
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2013-10-21 20:17:08 +08:00
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this_cpu_inc_return(kde_ref_count) == 1)
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2012-03-05 19:49:33 +08:00
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enable |= DBG_MDSCR_KDE;
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if (enable && debug_enabled) {
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mdscr = mdscr_read();
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mdscr |= enable;
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mdscr_write(mdscr);
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}
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}
|
2016-07-09 00:35:49 +08:00
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NOKPROBE_SYMBOL(enable_debug_monitors);
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2012-03-05 19:49:33 +08:00
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|
2015-07-28 01:36:54 +08:00
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void disable_debug_monitors(enum dbg_active_el el)
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2012-03-05 19:49:33 +08:00
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{
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u32 mdscr, disable = 0;
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WARN_ON(preemptible());
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2013-10-21 20:17:08 +08:00
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if (this_cpu_dec_return(mde_ref_count) == 0)
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2012-03-05 19:49:33 +08:00
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disable = ~DBG_MDSCR_MDE;
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if (el == DBG_ACTIVE_EL1 &&
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2013-10-21 20:17:08 +08:00
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this_cpu_dec_return(kde_ref_count) == 0)
|
2012-03-05 19:49:33 +08:00
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disable &= ~DBG_MDSCR_KDE;
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if (disable) {
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mdscr = mdscr_read();
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mdscr &= disable;
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mdscr_write(mdscr);
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}
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}
|
2016-07-09 00:35:49 +08:00
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NOKPROBE_SYMBOL(disable_debug_monitors);
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2012-03-05 19:49:33 +08:00
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/*
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* OS lock clearing.
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*/
|
2016-08-16 18:29:17 +08:00
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static int clear_os_lock(unsigned int cpu)
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2012-03-05 19:49:33 +08:00
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{
|
2016-09-08 20:55:38 +08:00
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|
write_sysreg(0, oslar_el1);
|
2016-08-16 18:29:17 +08:00
|
|
|
isb();
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|
return 0;
|
2012-03-05 19:49:33 +08:00
|
|
|
}
|
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|
2013-06-18 22:18:31 +08:00
|
|
|
static int debug_monitors_init(void)
|
2012-03-05 19:49:33 +08:00
|
|
|
{
|
2016-08-16 18:29:17 +08:00
|
|
|
return cpuhp_setup_state(CPUHP_AP_ARM64_DEBUG_MONITORS_STARTING,
|
2016-12-22 03:19:54 +08:00
|
|
|
"arm64/debug_monitors:starting",
|
2016-08-16 18:29:17 +08:00
|
|
|
clear_os_lock, NULL);
|
2012-03-05 19:49:33 +08:00
|
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|
}
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|
|
postcore_initcall(debug_monitors_init);
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|
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|
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/*
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* Single step API and exception handling.
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*/
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static void set_regs_spsr_ss(struct pt_regs *regs)
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|
|
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{
|
2016-07-19 22:07:38 +08:00
|
|
|
regs->pstate |= DBG_SPSR_SS;
|
2012-03-05 19:49:33 +08:00
|
|
|
}
|
2016-07-09 00:35:49 +08:00
|
|
|
NOKPROBE_SYMBOL(set_regs_spsr_ss);
|
2012-03-05 19:49:33 +08:00
|
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|
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|
|
static void clear_regs_spsr_ss(struct pt_regs *regs)
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|
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{
|
2016-07-19 22:07:38 +08:00
|
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|
regs->pstate &= ~DBG_SPSR_SS;
|
2012-03-05 19:49:33 +08:00
|
|
|
}
|
2016-07-09 00:35:49 +08:00
|
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|
NOKPROBE_SYMBOL(clear_regs_spsr_ss);
|
2012-03-05 19:49:33 +08:00
|
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|
|
2013-12-04 13:50:20 +08:00
|
|
|
/* EL1 Single Step Handler hooks */
|
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static LIST_HEAD(step_hook);
|
2016-02-09 06:49:24 +08:00
|
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static DEFINE_SPINLOCK(step_hook_lock);
|
2013-12-04 13:50:20 +08:00
|
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void register_step_hook(struct step_hook *hook)
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|
{
|
2016-02-09 06:49:24 +08:00
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spin_lock(&step_hook_lock);
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list_add_rcu(&hook->node, &step_hook);
|
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|
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spin_unlock(&step_hook_lock);
|
2013-12-04 13:50:20 +08:00
|
|
|
}
|
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|
|
void unregister_step_hook(struct step_hook *hook)
|
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|
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{
|
2016-02-09 06:49:24 +08:00
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spin_lock(&step_hook_lock);
|
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|
|
list_del_rcu(&hook->node);
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|
|
spin_unlock(&step_hook_lock);
|
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|
|
synchronize_rcu();
|
2013-12-04 13:50:20 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
2015-09-19 05:09:00 +08:00
|
|
|
* Call registered single step handlers
|
2013-12-04 13:50:20 +08:00
|
|
|
* There is no Syndrome info to check for determining the handler.
|
|
|
|
* So we call all the registered handlers, until the right handler is
|
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|
|
* found which returns zero.
|
|
|
|
*/
|
|
|
|
static int call_step_hook(struct pt_regs *regs, unsigned int esr)
|
|
|
|
{
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|
|
|
struct step_hook *hook;
|
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|
|
int retval = DBG_HOOK_ERROR;
|
|
|
|
|
2016-02-09 06:49:24 +08:00
|
|
|
rcu_read_lock();
|
2013-12-04 13:50:20 +08:00
|
|
|
|
2016-02-09 06:49:24 +08:00
|
|
|
list_for_each_entry_rcu(hook, &step_hook, node) {
|
2013-12-04 13:50:20 +08:00
|
|
|
retval = hook->fn(regs, esr);
|
|
|
|
if (retval == DBG_HOOK_HANDLED)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2016-02-09 06:49:24 +08:00
|
|
|
rcu_read_unlock();
|
2013-12-04 13:50:20 +08:00
|
|
|
|
|
|
|
return retval;
|
|
|
|
}
|
2016-07-09 00:35:49 +08:00
|
|
|
NOKPROBE_SYMBOL(call_step_hook);
|
2013-12-04 13:50:20 +08:00
|
|
|
|
2016-02-11 00:05:28 +08:00
|
|
|
static void send_user_sigtrap(int si_code)
|
|
|
|
{
|
|
|
|
struct pt_regs *regs = current_pt_regs();
|
|
|
|
siginfo_t info = {
|
|
|
|
.si_signo = SIGTRAP,
|
|
|
|
.si_errno = 0,
|
|
|
|
.si_code = si_code,
|
|
|
|
.si_addr = (void __user *)instruction_pointer(regs),
|
|
|
|
};
|
|
|
|
|
|
|
|
if (WARN_ON(!user_mode(regs)))
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (interrupts_enabled(regs))
|
|
|
|
local_irq_enable();
|
|
|
|
|
|
|
|
force_sig_info(SIGTRAP, &info, current);
|
|
|
|
}
|
|
|
|
|
2012-03-05 19:49:33 +08:00
|
|
|
static int single_step_handler(unsigned long addr, unsigned int esr,
|
|
|
|
struct pt_regs *regs)
|
|
|
|
{
|
2016-11-02 17:10:43 +08:00
|
|
|
bool handler_found = false;
|
|
|
|
|
2012-03-05 19:49:33 +08:00
|
|
|
/*
|
|
|
|
* If we are stepping a pending breakpoint, call the hw_breakpoint
|
|
|
|
* handler first.
|
|
|
|
*/
|
|
|
|
if (!reinstall_suspended_bps(regs))
|
|
|
|
return 0;
|
|
|
|
|
2016-11-02 17:10:43 +08:00
|
|
|
#ifdef CONFIG_KPROBES
|
|
|
|
if (kprobe_single_step_handler(regs, esr) == DBG_HOOK_HANDLED)
|
|
|
|
handler_found = true;
|
|
|
|
#endif
|
|
|
|
if (!handler_found && call_step_hook(regs, esr) == DBG_HOOK_HANDLED)
|
|
|
|
handler_found = true;
|
|
|
|
|
|
|
|
if (!handler_found && user_mode(regs)) {
|
2016-09-01 20:35:02 +08:00
|
|
|
send_user_sigtrap(TRAP_TRACE);
|
2012-03-05 19:49:33 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* ptrace will disable single step unless explicitly
|
|
|
|
* asked to re-enable it. For other clients, it makes
|
|
|
|
* sense to leave it enabled (i.e. rewind the controls
|
|
|
|
* to the active-not-pending state).
|
|
|
|
*/
|
|
|
|
user_rewind_single_step(current);
|
2016-11-02 17:10:43 +08:00
|
|
|
} else if (!handler_found) {
|
|
|
|
pr_warn("Unexpected kernel single-step exception at EL1\n");
|
2012-03-05 19:49:33 +08:00
|
|
|
/*
|
|
|
|
* Re-enable stepping since we know that we will be
|
|
|
|
* returning to regs.
|
|
|
|
*/
|
|
|
|
set_regs_spsr_ss(regs);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2016-07-09 00:35:49 +08:00
|
|
|
NOKPROBE_SYMBOL(single_step_handler);
|
2012-03-05 19:49:33 +08:00
|
|
|
|
2013-12-04 13:50:20 +08:00
|
|
|
/*
|
|
|
|
* Breakpoint handler is re-entrant as another breakpoint can
|
|
|
|
* hit within breakpoint handler, especically in kprobes.
|
|
|
|
* Use reader/writer locks instead of plain spinlock.
|
|
|
|
*/
|
|
|
|
static LIST_HEAD(break_hook);
|
2015-10-06 05:32:51 +08:00
|
|
|
static DEFINE_SPINLOCK(break_hook_lock);
|
2013-12-04 13:50:20 +08:00
|
|
|
|
|
|
|
void register_break_hook(struct break_hook *hook)
|
|
|
|
{
|
2015-10-06 05:32:51 +08:00
|
|
|
spin_lock(&break_hook_lock);
|
|
|
|
list_add_rcu(&hook->node, &break_hook);
|
|
|
|
spin_unlock(&break_hook_lock);
|
2013-12-04 13:50:20 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
void unregister_break_hook(struct break_hook *hook)
|
|
|
|
{
|
2015-10-06 05:32:51 +08:00
|
|
|
spin_lock(&break_hook_lock);
|
|
|
|
list_del_rcu(&hook->node);
|
|
|
|
spin_unlock(&break_hook_lock);
|
|
|
|
synchronize_rcu();
|
2013-12-04 13:50:20 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static int call_break_hook(struct pt_regs *regs, unsigned int esr)
|
|
|
|
{
|
|
|
|
struct break_hook *hook;
|
|
|
|
int (*fn)(struct pt_regs *regs, unsigned int esr) = NULL;
|
|
|
|
|
2015-10-06 05:32:51 +08:00
|
|
|
rcu_read_lock();
|
|
|
|
list_for_each_entry_rcu(hook, &break_hook, node)
|
2013-12-04 13:50:20 +08:00
|
|
|
if ((esr & hook->esr_mask) == hook->esr_val)
|
|
|
|
fn = hook->fn;
|
2015-10-06 05:32:51 +08:00
|
|
|
rcu_read_unlock();
|
2013-12-04 13:50:20 +08:00
|
|
|
|
|
|
|
return fn ? fn(regs, esr) : DBG_HOOK_ERROR;
|
|
|
|
}
|
2016-07-09 00:35:49 +08:00
|
|
|
NOKPROBE_SYMBOL(call_break_hook);
|
2013-12-04 13:50:20 +08:00
|
|
|
|
2013-03-16 16:48:13 +08:00
|
|
|
static int brk_handler(unsigned long addr, unsigned int esr,
|
|
|
|
struct pt_regs *regs)
|
|
|
|
{
|
2016-11-02 17:10:44 +08:00
|
|
|
bool handler_found = false;
|
|
|
|
|
arm64: Kprobes with single stepping support
Add support for basic kernel probes(kprobes) and jump probes
(jprobes) for ARM64.
Kprobes utilizes software breakpoint and single step debug
exceptions supported on ARM v8.
A software breakpoint is placed at the probe address to trap the
kernel execution into the kprobe handler.
ARM v8 supports enabling single stepping before the break exception
return (ERET), with next PC in exception return address (ELR_EL1). The
kprobe handler prepares an executable memory slot for out-of-line
execution with a copy of the original instruction being probed, and
enables single stepping. The PC is set to the out-of-line slot address
before the ERET. With this scheme, the instruction is executed with the
exact same register context except for the PC (and DAIF) registers.
Debug mask (PSTATE.D) is enabled only when single stepping a recursive
kprobe, e.g.: during kprobes reenter so that probed instruction can be
single stepped within the kprobe handler -exception- context.
The recursion depth of kprobe is always 2, i.e. upon probe re-entry,
any further re-entry is prevented by not calling handlers and the case
counted as a missed kprobe).
Single stepping from the x-o-l slot has a drawback for PC-relative accesses
like branching and symbolic literals access as the offset from the new PC
(slot address) may not be ensured to fit in the immediate value of
the opcode. Such instructions need simulation, so reject
probing them.
Instructions generating exceptions or cpu mode change are rejected
for probing.
Exclusive load/store instructions are rejected too. Additionally, the
code is checked to see if it is inside an exclusive load/store sequence
(code from Pratyush).
System instructions are mostly enabled for stepping, except MSR/MRS
accesses to "DAIF" flags in PSTATE, which are not safe for
probing.
This also changes arch/arm64/include/asm/ptrace.h to use
include/asm-generic/ptrace.h.
Thanks to Steve Capper and Pratyush Anand for several suggested
Changes.
Signed-off-by: Sandeepa Prabhu <sandeepa.s.prabhu@gmail.com>
Signed-off-by: David A. Long <dave.long@linaro.org>
Signed-off-by: Pratyush Anand <panand@redhat.com>
Acked-by: Masami Hiramatsu <mhiramat@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2016-07-09 00:35:48 +08:00
|
|
|
#ifdef CONFIG_KPROBES
|
2016-11-02 17:10:44 +08:00
|
|
|
if ((esr & BRK64_ESR_MASK) == BRK64_ESR_KPROBES) {
|
|
|
|
if (kprobe_breakpoint_handler(regs, esr) == DBG_HOOK_HANDLED)
|
|
|
|
handler_found = true;
|
arm64: Kprobes with single stepping support
Add support for basic kernel probes(kprobes) and jump probes
(jprobes) for ARM64.
Kprobes utilizes software breakpoint and single step debug
exceptions supported on ARM v8.
A software breakpoint is placed at the probe address to trap the
kernel execution into the kprobe handler.
ARM v8 supports enabling single stepping before the break exception
return (ERET), with next PC in exception return address (ELR_EL1). The
kprobe handler prepares an executable memory slot for out-of-line
execution with a copy of the original instruction being probed, and
enables single stepping. The PC is set to the out-of-line slot address
before the ERET. With this scheme, the instruction is executed with the
exact same register context except for the PC (and DAIF) registers.
Debug mask (PSTATE.D) is enabled only when single stepping a recursive
kprobe, e.g.: during kprobes reenter so that probed instruction can be
single stepped within the kprobe handler -exception- context.
The recursion depth of kprobe is always 2, i.e. upon probe re-entry,
any further re-entry is prevented by not calling handlers and the case
counted as a missed kprobe).
Single stepping from the x-o-l slot has a drawback for PC-relative accesses
like branching and symbolic literals access as the offset from the new PC
(slot address) may not be ensured to fit in the immediate value of
the opcode. Such instructions need simulation, so reject
probing them.
Instructions generating exceptions or cpu mode change are rejected
for probing.
Exclusive load/store instructions are rejected too. Additionally, the
code is checked to see if it is inside an exclusive load/store sequence
(code from Pratyush).
System instructions are mostly enabled for stepping, except MSR/MRS
accesses to "DAIF" flags in PSTATE, which are not safe for
probing.
This also changes arch/arm64/include/asm/ptrace.h to use
include/asm-generic/ptrace.h.
Thanks to Steve Capper and Pratyush Anand for several suggested
Changes.
Signed-off-by: Sandeepa Prabhu <sandeepa.s.prabhu@gmail.com>
Signed-off-by: David A. Long <dave.long@linaro.org>
Signed-off-by: Pratyush Anand <panand@redhat.com>
Acked-by: Masami Hiramatsu <mhiramat@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2016-07-09 00:35:48 +08:00
|
|
|
}
|
|
|
|
#endif
|
2016-11-02 17:10:44 +08:00
|
|
|
if (!handler_found && call_break_hook(regs, esr) == DBG_HOOK_HANDLED)
|
|
|
|
handler_found = true;
|
|
|
|
|
|
|
|
if (!handler_found && user_mode(regs)) {
|
|
|
|
send_user_sigtrap(TRAP_BRKPT);
|
|
|
|
} else if (!handler_found) {
|
arm64: Kprobes with single stepping support
Add support for basic kernel probes(kprobes) and jump probes
(jprobes) for ARM64.
Kprobes utilizes software breakpoint and single step debug
exceptions supported on ARM v8.
A software breakpoint is placed at the probe address to trap the
kernel execution into the kprobe handler.
ARM v8 supports enabling single stepping before the break exception
return (ERET), with next PC in exception return address (ELR_EL1). The
kprobe handler prepares an executable memory slot for out-of-line
execution with a copy of the original instruction being probed, and
enables single stepping. The PC is set to the out-of-line slot address
before the ERET. With this scheme, the instruction is executed with the
exact same register context except for the PC (and DAIF) registers.
Debug mask (PSTATE.D) is enabled only when single stepping a recursive
kprobe, e.g.: during kprobes reenter so that probed instruction can be
single stepped within the kprobe handler -exception- context.
The recursion depth of kprobe is always 2, i.e. upon probe re-entry,
any further re-entry is prevented by not calling handlers and the case
counted as a missed kprobe).
Single stepping from the x-o-l slot has a drawback for PC-relative accesses
like branching and symbolic literals access as the offset from the new PC
(slot address) may not be ensured to fit in the immediate value of
the opcode. Such instructions need simulation, so reject
probing them.
Instructions generating exceptions or cpu mode change are rejected
for probing.
Exclusive load/store instructions are rejected too. Additionally, the
code is checked to see if it is inside an exclusive load/store sequence
(code from Pratyush).
System instructions are mostly enabled for stepping, except MSR/MRS
accesses to "DAIF" flags in PSTATE, which are not safe for
probing.
This also changes arch/arm64/include/asm/ptrace.h to use
include/asm-generic/ptrace.h.
Thanks to Steve Capper and Pratyush Anand for several suggested
Changes.
Signed-off-by: Sandeepa Prabhu <sandeepa.s.prabhu@gmail.com>
Signed-off-by: David A. Long <dave.long@linaro.org>
Signed-off-by: Pratyush Anand <panand@redhat.com>
Acked-by: Masami Hiramatsu <mhiramat@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2016-07-09 00:35:48 +08:00
|
|
|
pr_warn("Unexpected kernel BRK exception at EL1\n");
|
2013-03-16 16:48:13 +08:00
|
|
|
return -EFAULT;
|
2014-07-31 18:36:08 +08:00
|
|
|
}
|
2013-03-16 16:48:13 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2016-07-09 00:35:49 +08:00
|
|
|
NOKPROBE_SYMBOL(brk_handler);
|
2013-03-16 16:48:13 +08:00
|
|
|
|
|
|
|
int aarch32_break_handler(struct pt_regs *regs)
|
|
|
|
{
|
2013-11-28 20:07:23 +08:00
|
|
|
u32 arm_instr;
|
|
|
|
u16 thumb_instr;
|
2013-03-16 16:48:13 +08:00
|
|
|
bool bp = false;
|
|
|
|
void __user *pc = (void __user *)instruction_pointer(regs);
|
|
|
|
|
|
|
|
if (!compat_user_mode(regs))
|
|
|
|
return -EFAULT;
|
|
|
|
|
|
|
|
if (compat_thumb_mode(regs)) {
|
|
|
|
/* get 16-bit Thumb instruction */
|
2017-06-28 22:55:52 +08:00
|
|
|
__le16 instr;
|
|
|
|
get_user(instr, (__le16 __user *)pc);
|
|
|
|
thumb_instr = le16_to_cpu(instr);
|
2013-11-28 20:07:23 +08:00
|
|
|
if (thumb_instr == AARCH32_BREAK_THUMB2_LO) {
|
2013-03-16 16:48:13 +08:00
|
|
|
/* get second half of 32-bit Thumb-2 instruction */
|
2017-06-28 22:55:52 +08:00
|
|
|
get_user(instr, (__le16 __user *)(pc + 2));
|
|
|
|
thumb_instr = le16_to_cpu(instr);
|
2013-11-28 20:07:23 +08:00
|
|
|
bp = thumb_instr == AARCH32_BREAK_THUMB2_HI;
|
2013-03-16 16:48:13 +08:00
|
|
|
} else {
|
2013-11-28 20:07:23 +08:00
|
|
|
bp = thumb_instr == AARCH32_BREAK_THUMB;
|
2013-03-16 16:48:13 +08:00
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* 32-bit ARM instruction */
|
2017-06-28 22:55:52 +08:00
|
|
|
__le32 instr;
|
|
|
|
get_user(instr, (__le32 __user *)pc);
|
|
|
|
arm_instr = le32_to_cpu(instr);
|
2013-11-28 20:07:23 +08:00
|
|
|
bp = (arm_instr & ~0xf0000000) == AARCH32_BREAK_ARM;
|
2013-03-16 16:48:13 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
if (!bp)
|
|
|
|
return -EFAULT;
|
|
|
|
|
2016-02-11 00:05:28 +08:00
|
|
|
send_user_sigtrap(TRAP_BRKPT);
|
2013-03-16 16:48:13 +08:00
|
|
|
return 0;
|
|
|
|
}
|
2016-07-09 00:35:49 +08:00
|
|
|
NOKPROBE_SYMBOL(aarch32_break_handler);
|
2013-03-16 16:48:13 +08:00
|
|
|
|
|
|
|
static int __init debug_traps_init(void)
|
2012-03-05 19:49:33 +08:00
|
|
|
{
|
|
|
|
hook_debug_fault_code(DBG_ESR_EVT_HWSS, single_step_handler, SIGTRAP,
|
2016-09-01 20:35:02 +08:00
|
|
|
TRAP_TRACE, "single-step handler");
|
2013-03-16 16:48:13 +08:00
|
|
|
hook_debug_fault_code(DBG_ESR_EVT_BRK, brk_handler, SIGTRAP,
|
|
|
|
TRAP_BRKPT, "ptrace BRK handler");
|
2012-03-05 19:49:33 +08:00
|
|
|
return 0;
|
|
|
|
}
|
2013-03-16 16:48:13 +08:00
|
|
|
arch_initcall(debug_traps_init);
|
2012-03-05 19:49:33 +08:00
|
|
|
|
|
|
|
/* Re-enable single step for syscall restarting. */
|
|
|
|
void user_rewind_single_step(struct task_struct *task)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* If single step is active for this thread, then set SPSR.SS
|
|
|
|
* to 1 to avoid returning to the active-pending state.
|
|
|
|
*/
|
|
|
|
if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
|
|
|
|
set_regs_spsr_ss(task_pt_regs(task));
|
|
|
|
}
|
2016-07-09 00:35:49 +08:00
|
|
|
NOKPROBE_SYMBOL(user_rewind_single_step);
|
2012-03-05 19:49:33 +08:00
|
|
|
|
|
|
|
void user_fastforward_single_step(struct task_struct *task)
|
|
|
|
{
|
|
|
|
if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
|
|
|
|
clear_regs_spsr_ss(task_pt_regs(task));
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Kernel API */
|
|
|
|
void kernel_enable_single_step(struct pt_regs *regs)
|
|
|
|
{
|
|
|
|
WARN_ON(!irqs_disabled());
|
|
|
|
set_regs_spsr_ss(regs);
|
|
|
|
mdscr_write(mdscr_read() | DBG_MDSCR_SS);
|
|
|
|
enable_debug_monitors(DBG_ACTIVE_EL1);
|
|
|
|
}
|
2016-07-09 00:35:49 +08:00
|
|
|
NOKPROBE_SYMBOL(kernel_enable_single_step);
|
2012-03-05 19:49:33 +08:00
|
|
|
|
|
|
|
void kernel_disable_single_step(void)
|
|
|
|
{
|
|
|
|
WARN_ON(!irqs_disabled());
|
|
|
|
mdscr_write(mdscr_read() & ~DBG_MDSCR_SS);
|
|
|
|
disable_debug_monitors(DBG_ACTIVE_EL1);
|
|
|
|
}
|
2016-07-09 00:35:49 +08:00
|
|
|
NOKPROBE_SYMBOL(kernel_disable_single_step);
|
2012-03-05 19:49:33 +08:00
|
|
|
|
|
|
|
int kernel_active_single_step(void)
|
|
|
|
{
|
|
|
|
WARN_ON(!irqs_disabled());
|
|
|
|
return mdscr_read() & DBG_MDSCR_SS;
|
|
|
|
}
|
2016-07-09 00:35:49 +08:00
|
|
|
NOKPROBE_SYMBOL(kernel_active_single_step);
|
2012-03-05 19:49:33 +08:00
|
|
|
|
|
|
|
/* ptrace API */
|
|
|
|
void user_enable_single_step(struct task_struct *task)
|
|
|
|
{
|
2016-08-26 18:36:39 +08:00
|
|
|
struct thread_info *ti = task_thread_info(task);
|
|
|
|
|
|
|
|
if (!test_and_set_ti_thread_flag(ti, TIF_SINGLESTEP))
|
|
|
|
set_regs_spsr_ss(task_pt_regs(task));
|
2012-03-05 19:49:33 +08:00
|
|
|
}
|
2016-07-09 00:35:49 +08:00
|
|
|
NOKPROBE_SYMBOL(user_enable_single_step);
|
2012-03-05 19:49:33 +08:00
|
|
|
|
|
|
|
void user_disable_single_step(struct task_struct *task)
|
|
|
|
{
|
|
|
|
clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
|
|
|
|
}
|
2016-07-09 00:35:49 +08:00
|
|
|
NOKPROBE_SYMBOL(user_disable_single_step);
|