2011-07-18 05:22:30 +08:00
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/*
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* Copyright (c) 2004-2011 Atheros Communications Inc.
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2012-02-06 22:45:53 +08:00
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* Copyright (c) 2011 Qualcomm Atheros, Inc.
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2011-07-18 05:22:30 +08:00
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef HIF_OPS_H
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#define HIF_OPS_H
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#include "hif.h"
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2011-10-13 20:21:53 +08:00
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#include "debug.h"
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2011-07-18 05:22:30 +08:00
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static inline int hif_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf,
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u32 len, u32 request)
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{
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2011-10-13 20:21:53 +08:00
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ath6kl_dbg(ATH6KL_DBG_HIF,
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"hif %s sync addr 0x%x buf 0x%p len %d request 0x%x\n",
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(request & HIF_WRITE) ? "write" : "read",
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addr, buf, len, request);
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2011-07-18 05:22:30 +08:00
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return ar->hif_ops->read_write_sync(ar, addr, buf, len, request);
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}
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static inline int hif_write_async(struct ath6kl *ar, u32 address, u8 *buffer,
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u32 length, u32 request,
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struct htc_packet *packet)
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{
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2011-10-13 20:21:53 +08:00
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ath6kl_dbg(ATH6KL_DBG_HIF,
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"hif write async addr 0x%x buf 0x%p len %d request 0x%x\n",
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address, buffer, length, request);
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2011-07-18 05:22:30 +08:00
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return ar->hif_ops->write_async(ar, address, buffer, length,
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request, packet);
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}
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static inline void ath6kl_hif_irq_enable(struct ath6kl *ar)
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{
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2011-10-13 20:21:53 +08:00
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ath6kl_dbg(ATH6KL_DBG_HIF, "hif irq enable\n");
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2011-07-18 05:22:30 +08:00
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return ar->hif_ops->irq_enable(ar);
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}
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static inline void ath6kl_hif_irq_disable(struct ath6kl *ar)
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{
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2011-10-13 20:21:53 +08:00
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ath6kl_dbg(ATH6KL_DBG_HIF, "hif irq disable\n");
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2011-07-18 05:22:30 +08:00
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return ar->hif_ops->irq_disable(ar);
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}
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static inline struct hif_scatter_req *hif_scatter_req_get(struct ath6kl *ar)
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{
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return ar->hif_ops->scatter_req_get(ar);
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}
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static inline void hif_scatter_req_add(struct ath6kl *ar,
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struct hif_scatter_req *s_req)
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{
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return ar->hif_ops->scatter_req_add(ar, s_req);
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}
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2011-07-18 16:53:29 +08:00
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static inline int ath6kl_hif_enable_scatter(struct ath6kl *ar)
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2011-07-18 05:22:30 +08:00
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{
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2011-07-18 16:53:29 +08:00
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return ar->hif_ops->enable_scatter(ar);
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2011-07-18 05:22:30 +08:00
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}
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2011-07-16 22:59:05 +08:00
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static inline int ath6kl_hif_scat_req_rw(struct ath6kl *ar,
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struct hif_scatter_req *scat_req)
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{
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return ar->hif_ops->scat_req_rw(ar, scat_req);
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}
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2011-07-18 05:22:30 +08:00
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static inline void ath6kl_hif_cleanup_scatter(struct ath6kl *ar)
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{
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return ar->hif_ops->cleanup_scatter(ar);
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}
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2011-11-08 04:52:45 +08:00
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static inline int ath6kl_hif_suspend(struct ath6kl *ar,
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struct cfg80211_wowlan *wow)
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2011-07-22 13:26:20 +08:00
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{
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2011-10-13 20:21:53 +08:00
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ath6kl_dbg(ATH6KL_DBG_HIF, "hif suspend\n");
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2011-11-08 04:52:45 +08:00
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return ar->hif_ops->suspend(ar, wow);
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2011-07-22 13:26:20 +08:00
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}
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2011-11-11 18:17:51 +08:00
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/*
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* Read from the ATH6KL through its diagnostic window. No cooperation from
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* the Target is required for this.
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*/
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static inline int ath6kl_hif_diag_read32(struct ath6kl *ar, u32 address,
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u32 *value)
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{
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return ar->hif_ops->diag_read32(ar, address, value);
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}
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/*
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* Write to the ATH6KL through its diagnostic window. No cooperation from
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* the Target is required for this.
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*/
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static inline int ath6kl_hif_diag_write32(struct ath6kl *ar, u32 address,
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__le32 value)
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{
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return ar->hif_ops->diag_write32(ar, address, value);
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}
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2011-11-11 18:17:33 +08:00
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static inline int ath6kl_hif_bmi_read(struct ath6kl *ar, u8 *buf, u32 len)
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{
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return ar->hif_ops->bmi_read(ar, buf, len);
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}
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static inline int ath6kl_hif_bmi_write(struct ath6kl *ar, u8 *buf, u32 len)
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{
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return ar->hif_ops->bmi_write(ar, buf, len);
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}
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2011-10-05 15:12:52 +08:00
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static inline int ath6kl_hif_resume(struct ath6kl *ar)
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{
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2011-10-13 20:21:53 +08:00
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ath6kl_dbg(ATH6KL_DBG_HIF, "hif resume\n");
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2011-10-05 15:12:52 +08:00
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return ar->hif_ops->resume(ar);
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}
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2011-10-27 23:48:14 +08:00
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static inline int ath6kl_hif_power_on(struct ath6kl *ar)
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{
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ath6kl_dbg(ATH6KL_DBG_HIF, "hif power on\n");
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return ar->hif_ops->power_on(ar);
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}
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static inline int ath6kl_hif_power_off(struct ath6kl *ar)
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{
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ath6kl_dbg(ATH6KL_DBG_HIF, "hif power off\n");
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return ar->hif_ops->power_off(ar);
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}
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2011-10-31 03:15:57 +08:00
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static inline void ath6kl_hif_stop(struct ath6kl *ar)
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{
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ath6kl_dbg(ATH6KL_DBG_HIF, "hif stop\n");
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ar->hif_ops->stop(ar);
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}
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2012-03-25 22:15:28 +08:00
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static inline int ath6kl_hif_pipe_send(struct ath6kl *ar,
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u8 pipe, struct sk_buff *hdr_buf,
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struct sk_buff *buf)
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{
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ath6kl_dbg(ATH6KL_DBG_HIF, "hif pipe send\n");
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return ar->hif_ops->pipe_send(ar, pipe, hdr_buf, buf);
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}
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static inline void ath6kl_hif_pipe_get_default(struct ath6kl *ar,
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u8 *ul_pipe, u8 *dl_pipe)
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{
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ath6kl_dbg(ATH6KL_DBG_HIF, "hif pipe get default\n");
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ar->hif_ops->pipe_get_default(ar, ul_pipe, dl_pipe);
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}
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static inline int ath6kl_hif_pipe_map_service(struct ath6kl *ar,
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u16 service_id, u8 *ul_pipe,
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u8 *dl_pipe)
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{
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ath6kl_dbg(ATH6KL_DBG_HIF, "hif pipe get default\n");
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return ar->hif_ops->pipe_map_service(ar, service_id, ul_pipe, dl_pipe);
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}
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static inline u16 ath6kl_hif_pipe_get_free_queue_number(struct ath6kl *ar,
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u8 pipe)
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{
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ath6kl_dbg(ATH6KL_DBG_HIF, "hif pipe get free queue number\n");
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return ar->hif_ops->pipe_get_free_queue_number(ar, pipe);
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}
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2011-07-18 05:22:30 +08:00
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#endif
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