2013-06-13 01:52:10 +08:00
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/*
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* Copyright (c) 2005-2011 Atheros Communications Inc.
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* Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <linux/module.h>
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#include <linux/firmware.h>
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2014-12-02 16:55:54 +08:00
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#include <linux/of.h>
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2013-06-13 01:52:10 +08:00
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#include "core.h"
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#include "mac.h"
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#include "htc.h"
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#include "hif.h"
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#include "wmi.h"
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#include "bmi.h"
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#include "debug.h"
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#include "htt.h"
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2014-09-10 23:23:30 +08:00
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#include "testmode.h"
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2014-12-03 16:10:54 +08:00
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#include "wmi-ops.h"
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2013-06-13 01:52:10 +08:00
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unsigned int ath10k_debug_mask;
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ath10k: enable raw encap mode and software crypto engine
This patch enables raw Rx/Tx encap mode to support software based
crypto engine. This patch introduces a new module param 'cryptmode'.
cryptmode:
0: Use hardware crypto engine globally with native Wi-Fi mode TX/RX
encapsulation to the firmware. This is the default mode.
1: Use sofware crypto engine globally with raw mode TX/RX
encapsulation to the firmware.
Known limitation:
A-MSDU must be disabled for RAW Tx encap mode to perform well when
heavy traffic is applied.
Testing: (by Michal Kazior <michal.kazior@tieto.com>)
a) Performance Testing
cryptmode=1
ap=qca988x sta=killer1525
killer1525 -> qca988x 194.496 mbps [tcp1 ip4]
killer1525 -> qca988x 238.309 mbps [tcp5 ip4]
killer1525 -> qca988x 266.958 mbps [udp1 ip4]
killer1525 -> qca988x 477.468 mbps [udp5 ip4]
qca988x -> killer1525 301.378 mbps [tcp1 ip4]
qca988x -> killer1525 297.949 mbps [tcp5 ip4]
qca988x -> killer1525 331.351 mbps [udp1 ip4]
qca988x -> killer1525 371.528 mbps [udp5 ip4]
ap=killer1525 sta=qca988x
qca988x -> killer1525 331.447 mbps [tcp1 ip4]
qca988x -> killer1525 328.783 mbps [tcp5 ip4]
qca988x -> killer1525 375.309 mbps [udp1 ip4]
qca988x -> killer1525 403.379 mbps [udp5 ip4]
killer1525 -> qca988x 203.689 mbps [tcp1 ip4]
killer1525 -> qca988x 222.339 mbps [tcp5 ip4]
killer1525 -> qca988x 264.199 mbps [udp1 ip4]
killer1525 -> qca988x 479.371 mbps [udp5 ip4]
Note:
- only open network tested for RAW vs nwifi performance comparison
- killer1525 (qca6174 hw2.2) is 2x2 device (hence max 866mbps)
- used iperf
- OTA, devices a few cm apart from each other, no shielding
- tcpX/udpX, X - means number of threads used
Overview:
- relative Tx performance drop is seen but is within reasonable and
expected threshold (A-MSDU must be disabled with RAW Tx)
b) Connectivity Testing
cryptmode=1
ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta2br1vlan OK
ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta2br1vlan OK
ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta2br1vlan OK
ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta2br1vlan OK
Note:
- each test takes all possible endpoint pairs and pings
- each pair-ping flushes arp table
- ip6 is used
c) Testbed Topology:
1ap1sta:
[ap] ---- [sta]
endpoints: ap, sta
1ap1sta2br:
[veth0] [ap] ---- [sta] [veth2]
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[veth1] | \ [veth3]
\ / \ /
[br0] [br1]
endpoints: veth0, veth2, br0, br1
note: STA works in 4addr mode, AP has wds_sta=1
1ap1sta2br1vlan:
[veth0] [ap] ---- [sta] [veth2]
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[veth1] | \ [veth3]
\ / \ /
[br0] [br1]
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[vlan0_id2] [vlan1_id2]
endpoints: vlan0_id2, vlan1_id2
note: STA works in 4addr mode, AP has wds_sta=1
Credits:
Thanks to Michal Kazior <michal.kazior@tieto.com> who helped find the
amsdu issue, contributed a workaround (already squashed into this
patch), and contributed the throughput and connectivity tests results.
Signed-off-by: David Liu <cfliu.tw@gmail.com>
Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Tested-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-07-25 01:25:32 +08:00
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static unsigned int ath10k_cryptmode_param;
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2013-06-13 01:52:10 +08:00
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static bool uart_print;
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2014-11-17 22:44:14 +08:00
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static bool skip_otp;
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2015-09-10 00:47:36 +08:00
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static bool rawmode;
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2014-11-17 22:44:14 +08:00
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2013-06-13 01:52:10 +08:00
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module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
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ath10k: enable raw encap mode and software crypto engine
This patch enables raw Rx/Tx encap mode to support software based
crypto engine. This patch introduces a new module param 'cryptmode'.
cryptmode:
0: Use hardware crypto engine globally with native Wi-Fi mode TX/RX
encapsulation to the firmware. This is the default mode.
1: Use sofware crypto engine globally with raw mode TX/RX
encapsulation to the firmware.
Known limitation:
A-MSDU must be disabled for RAW Tx encap mode to perform well when
heavy traffic is applied.
Testing: (by Michal Kazior <michal.kazior@tieto.com>)
a) Performance Testing
cryptmode=1
ap=qca988x sta=killer1525
killer1525 -> qca988x 194.496 mbps [tcp1 ip4]
killer1525 -> qca988x 238.309 mbps [tcp5 ip4]
killer1525 -> qca988x 266.958 mbps [udp1 ip4]
killer1525 -> qca988x 477.468 mbps [udp5 ip4]
qca988x -> killer1525 301.378 mbps [tcp1 ip4]
qca988x -> killer1525 297.949 mbps [tcp5 ip4]
qca988x -> killer1525 331.351 mbps [udp1 ip4]
qca988x -> killer1525 371.528 mbps [udp5 ip4]
ap=killer1525 sta=qca988x
qca988x -> killer1525 331.447 mbps [tcp1 ip4]
qca988x -> killer1525 328.783 mbps [tcp5 ip4]
qca988x -> killer1525 375.309 mbps [udp1 ip4]
qca988x -> killer1525 403.379 mbps [udp5 ip4]
killer1525 -> qca988x 203.689 mbps [tcp1 ip4]
killer1525 -> qca988x 222.339 mbps [tcp5 ip4]
killer1525 -> qca988x 264.199 mbps [udp1 ip4]
killer1525 -> qca988x 479.371 mbps [udp5 ip4]
Note:
- only open network tested for RAW vs nwifi performance comparison
- killer1525 (qca6174 hw2.2) is 2x2 device (hence max 866mbps)
- used iperf
- OTA, devices a few cm apart from each other, no shielding
- tcpX/udpX, X - means number of threads used
Overview:
- relative Tx performance drop is seen but is within reasonable and
expected threshold (A-MSDU must be disabled with RAW Tx)
b) Connectivity Testing
cryptmode=1
ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta2br1vlan OK
ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta2br1vlan OK
ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta2br1vlan OK
ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta2br1vlan OK
Note:
- each test takes all possible endpoint pairs and pings
- each pair-ping flushes arp table
- ip6 is used
c) Testbed Topology:
1ap1sta:
[ap] ---- [sta]
endpoints: ap, sta
1ap1sta2br:
[veth0] [ap] ---- [sta] [veth2]
| | | |
[veth1] | \ [veth3]
\ / \ /
[br0] [br1]
endpoints: veth0, veth2, br0, br1
note: STA works in 4addr mode, AP has wds_sta=1
1ap1sta2br1vlan:
[veth0] [ap] ---- [sta] [veth2]
| | | |
[veth1] | \ [veth3]
\ / \ /
[br0] [br1]
| |
[vlan0_id2] [vlan1_id2]
endpoints: vlan0_id2, vlan1_id2
note: STA works in 4addr mode, AP has wds_sta=1
Credits:
Thanks to Michal Kazior <michal.kazior@tieto.com> who helped find the
amsdu issue, contributed a workaround (already squashed into this
patch), and contributed the throughput and connectivity tests results.
Signed-off-by: David Liu <cfliu.tw@gmail.com>
Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Tested-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-07-25 01:25:32 +08:00
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module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
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2013-06-13 01:52:10 +08:00
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module_param(uart_print, bool, 0644);
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2014-11-17 22:44:14 +08:00
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module_param(skip_otp, bool, 0644);
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2015-09-10 00:47:36 +08:00
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module_param(rawmode, bool, 0644);
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2014-11-17 22:44:14 +08:00
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2013-06-13 01:52:10 +08:00
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MODULE_PARM_DESC(debug_mask, "Debugging mask");
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MODULE_PARM_DESC(uart_print, "Uart target debugging");
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2014-11-17 22:44:14 +08:00
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MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
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ath10k: enable raw encap mode and software crypto engine
This patch enables raw Rx/Tx encap mode to support software based
crypto engine. This patch introduces a new module param 'cryptmode'.
cryptmode:
0: Use hardware crypto engine globally with native Wi-Fi mode TX/RX
encapsulation to the firmware. This is the default mode.
1: Use sofware crypto engine globally with raw mode TX/RX
encapsulation to the firmware.
Known limitation:
A-MSDU must be disabled for RAW Tx encap mode to perform well when
heavy traffic is applied.
Testing: (by Michal Kazior <michal.kazior@tieto.com>)
a) Performance Testing
cryptmode=1
ap=qca988x sta=killer1525
killer1525 -> qca988x 194.496 mbps [tcp1 ip4]
killer1525 -> qca988x 238.309 mbps [tcp5 ip4]
killer1525 -> qca988x 266.958 mbps [udp1 ip4]
killer1525 -> qca988x 477.468 mbps [udp5 ip4]
qca988x -> killer1525 301.378 mbps [tcp1 ip4]
qca988x -> killer1525 297.949 mbps [tcp5 ip4]
qca988x -> killer1525 331.351 mbps [udp1 ip4]
qca988x -> killer1525 371.528 mbps [udp5 ip4]
ap=killer1525 sta=qca988x
qca988x -> killer1525 331.447 mbps [tcp1 ip4]
qca988x -> killer1525 328.783 mbps [tcp5 ip4]
qca988x -> killer1525 375.309 mbps [udp1 ip4]
qca988x -> killer1525 403.379 mbps [udp5 ip4]
killer1525 -> qca988x 203.689 mbps [tcp1 ip4]
killer1525 -> qca988x 222.339 mbps [tcp5 ip4]
killer1525 -> qca988x 264.199 mbps [udp1 ip4]
killer1525 -> qca988x 479.371 mbps [udp5 ip4]
Note:
- only open network tested for RAW vs nwifi performance comparison
- killer1525 (qca6174 hw2.2) is 2x2 device (hence max 866mbps)
- used iperf
- OTA, devices a few cm apart from each other, no shielding
- tcpX/udpX, X - means number of threads used
Overview:
- relative Tx performance drop is seen but is within reasonable and
expected threshold (A-MSDU must be disabled with RAW Tx)
b) Connectivity Testing
cryptmode=1
ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta2br1vlan OK
ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta2br1vlan OK
ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta2br1vlan OK
ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta2br1vlan OK
Note:
- each test takes all possible endpoint pairs and pings
- each pair-ping flushes arp table
- ip6 is used
c) Testbed Topology:
1ap1sta:
[ap] ---- [sta]
endpoints: ap, sta
1ap1sta2br:
[veth0] [ap] ---- [sta] [veth2]
| | | |
[veth1] | \ [veth3]
\ / \ /
[br0] [br1]
endpoints: veth0, veth2, br0, br1
note: STA works in 4addr mode, AP has wds_sta=1
1ap1sta2br1vlan:
[veth0] [ap] ---- [sta] [veth2]
| | | |
[veth1] | \ [veth3]
\ / \ /
[br0] [br1]
| |
[vlan0_id2] [vlan1_id2]
endpoints: vlan0_id2, vlan1_id2
note: STA works in 4addr mode, AP has wds_sta=1
Credits:
Thanks to Michal Kazior <michal.kazior@tieto.com> who helped find the
amsdu issue, contributed a workaround (already squashed into this
patch), and contributed the throughput and connectivity tests results.
Signed-off-by: David Liu <cfliu.tw@gmail.com>
Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Tested-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-07-25 01:25:32 +08:00
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MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
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2015-09-10 00:47:36 +08:00
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MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
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2013-06-13 01:52:10 +08:00
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static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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{
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.id = QCA988X_HW_2_0_VERSION,
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.name = "qca988x hw2.0",
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.patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
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2014-12-02 16:55:55 +08:00
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.uart_pin = 7,
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2015-05-25 20:06:18 +08:00
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.has_shifted_cc_wraparound = true,
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2015-06-18 15:01:10 +08:00
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.otp_exe_param = 0,
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2015-08-12 18:54:05 +08:00
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.channel_counters_freq_hz = 88000,
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2015-08-31 19:04:55 +08:00
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.max_probe_resp_desc_thres = 0,
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2013-06-13 01:52:10 +08:00
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.fw = {
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.dir = QCA988X_HW_2_0_FW_DIR,
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.fw = QCA988X_HW_2_0_FW_FILE,
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.otp = QCA988X_HW_2_0_OTP_FILE,
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.board = QCA988X_HW_2_0_BOARD_DATA_FILE,
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2014-12-02 16:55:54 +08:00
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.board_size = QCA988X_BOARD_DATA_SZ,
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.board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
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2013-06-13 01:52:10 +08:00
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},
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},
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2015-01-24 18:14:49 +08:00
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{
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.id = QCA6174_HW_2_1_VERSION,
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.name = "qca6174 hw2.1",
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.patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
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.uart_pin = 6,
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2015-06-18 15:01:10 +08:00
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.otp_exe_param = 0,
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2015-08-12 18:54:05 +08:00
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.channel_counters_freq_hz = 88000,
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2015-08-31 19:04:55 +08:00
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.max_probe_resp_desc_thres = 0,
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2015-01-24 18:14:49 +08:00
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.fw = {
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.dir = QCA6174_HW_2_1_FW_DIR,
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.fw = QCA6174_HW_2_1_FW_FILE,
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.otp = QCA6174_HW_2_1_OTP_FILE,
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|
|
|
.board = QCA6174_HW_2_1_BOARD_DATA_FILE,
|
|
|
|
.board_size = QCA6174_BOARD_DATA_SZ,
|
|
|
|
.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
|
|
|
|
},
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.id = QCA6174_HW_3_0_VERSION,
|
|
|
|
.name = "qca6174 hw3.0",
|
|
|
|
.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
|
|
|
|
.uart_pin = 6,
|
2015-06-18 15:01:10 +08:00
|
|
|
.otp_exe_param = 0,
|
2015-08-12 18:54:05 +08:00
|
|
|
.channel_counters_freq_hz = 88000,
|
2015-08-31 19:04:55 +08:00
|
|
|
.max_probe_resp_desc_thres = 0,
|
2015-01-24 18:14:49 +08:00
|
|
|
.fw = {
|
|
|
|
.dir = QCA6174_HW_3_0_FW_DIR,
|
|
|
|
.fw = QCA6174_HW_3_0_FW_FILE,
|
|
|
|
.otp = QCA6174_HW_3_0_OTP_FILE,
|
|
|
|
.board = QCA6174_HW_3_0_BOARD_DATA_FILE,
|
|
|
|
.board_size = QCA6174_BOARD_DATA_SZ,
|
|
|
|
.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
|
|
|
|
},
|
|
|
|
},
|
2015-01-29 20:24:33 +08:00
|
|
|
{
|
|
|
|
.id = QCA6174_HW_3_2_VERSION,
|
|
|
|
.name = "qca6174 hw3.2",
|
|
|
|
.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
|
|
|
|
.uart_pin = 6,
|
2015-06-18 15:01:10 +08:00
|
|
|
.otp_exe_param = 0,
|
2015-08-12 18:54:05 +08:00
|
|
|
.channel_counters_freq_hz = 88000,
|
2015-08-31 19:04:55 +08:00
|
|
|
.max_probe_resp_desc_thres = 0,
|
2015-01-29 20:24:33 +08:00
|
|
|
.fw = {
|
|
|
|
/* uses same binaries as hw3.0 */
|
|
|
|
.dir = QCA6174_HW_3_0_FW_DIR,
|
|
|
|
.fw = QCA6174_HW_3_0_FW_FILE,
|
|
|
|
.otp = QCA6174_HW_3_0_OTP_FILE,
|
|
|
|
.board = QCA6174_HW_3_0_BOARD_DATA_FILE,
|
|
|
|
.board_size = QCA6174_BOARD_DATA_SZ,
|
|
|
|
.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
|
|
|
|
},
|
|
|
|
},
|
2015-06-18 15:01:03 +08:00
|
|
|
{
|
|
|
|
.id = QCA99X0_HW_2_0_DEV_VERSION,
|
|
|
|
.name = "qca99x0 hw2.0",
|
|
|
|
.patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
|
|
|
|
.uart_pin = 7,
|
2015-06-18 15:01:10 +08:00
|
|
|
.otp_exe_param = 0x00000700,
|
2015-06-22 22:52:27 +08:00
|
|
|
.continuous_frag_desc = true,
|
2015-08-12 18:54:05 +08:00
|
|
|
.channel_counters_freq_hz = 150000,
|
2015-08-31 19:04:55 +08:00
|
|
|
.max_probe_resp_desc_thres = 24,
|
2015-06-18 15:01:03 +08:00
|
|
|
.fw = {
|
|
|
|
.dir = QCA99X0_HW_2_0_FW_DIR,
|
|
|
|
.fw = QCA99X0_HW_2_0_FW_FILE,
|
|
|
|
.otp = QCA99X0_HW_2_0_OTP_FILE,
|
|
|
|
.board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
|
|
|
|
.board_size = QCA99X0_BOARD_DATA_SZ,
|
|
|
|
.board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
|
|
|
|
},
|
|
|
|
},
|
2013-06-13 01:52:10 +08:00
|
|
|
};
|
|
|
|
|
2015-06-15 19:46:40 +08:00
|
|
|
static const char *const ath10k_core_fw_feature_str[] = {
|
|
|
|
[ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
|
|
|
|
[ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
|
|
|
|
[ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
|
|
|
|
[ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
|
|
|
|
[ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
|
|
|
|
[ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
|
|
|
|
[ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
|
|
|
|
[ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
|
|
|
|
[ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
|
|
|
|
[ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
|
2015-09-09 16:34:37 +08:00
|
|
|
[ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
|
2015-06-15 19:46:40 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
static unsigned int ath10k_core_get_fw_feature_str(char *buf,
|
|
|
|
size_t buf_len,
|
|
|
|
enum ath10k_fw_features feat)
|
|
|
|
{
|
2015-09-09 16:34:37 +08:00
|
|
|
/* make sure that ath10k_core_fw_feature_str[] gets updated */
|
|
|
|
BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
|
|
|
|
ATH10K_FW_FEATURE_COUNT);
|
|
|
|
|
2015-06-15 19:46:40 +08:00
|
|
|
if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
|
|
|
|
WARN_ON(!ath10k_core_fw_feature_str[feat])) {
|
|
|
|
return scnprintf(buf, buf_len, "bit%d", feat);
|
|
|
|
}
|
|
|
|
|
|
|
|
return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
|
|
|
|
}
|
|
|
|
|
|
|
|
void ath10k_core_get_fw_features_str(struct ath10k *ar,
|
|
|
|
char *buf,
|
|
|
|
size_t buf_len)
|
|
|
|
{
|
|
|
|
unsigned int len = 0;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
|
|
|
|
if (test_bit(i, ar->fw_features)) {
|
|
|
|
if (len > 0)
|
|
|
|
len += scnprintf(buf + len, buf_len - len, ",");
|
|
|
|
|
|
|
|
len += ath10k_core_get_fw_feature_str(buf + len,
|
|
|
|
buf_len - len,
|
|
|
|
i);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-06-13 01:52:10 +08:00
|
|
|
static void ath10k_send_suspend_complete(struct ath10k *ar)
|
|
|
|
{
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
|
2013-06-13 01:52:10 +08:00
|
|
|
|
2014-02-11 00:14:23 +08:00
|
|
|
complete(&ar->target_suspend);
|
2013-06-13 01:52:10 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static int ath10k_init_configure_target(struct ath10k *ar)
|
|
|
|
{
|
|
|
|
u32 param_host;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* tell target which HTC version it is used*/
|
|
|
|
ret = ath10k_bmi_write32(ar, hi_app_host_interest,
|
|
|
|
HTC_PROTOCOL_VERSION);
|
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "settings HTC version failed\n");
|
2013-06-13 01:52:10 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* set the firmware mode to STA/IBSS/AP */
|
|
|
|
ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host);
|
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "setting firmware mode (1/2) failed\n");
|
2013-06-13 01:52:10 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* TODO following parameters need to be re-visited. */
|
|
|
|
/* num_device */
|
|
|
|
param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
|
|
|
|
/* Firmware mode */
|
|
|
|
/* FIXME: Why FW_MODE_AP ??.*/
|
|
|
|
param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
|
|
|
|
/* mac_addr_method */
|
|
|
|
param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
|
|
|
|
/* firmware_bridge */
|
|
|
|
param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
|
|
|
|
/* fwsubmode */
|
|
|
|
param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
|
|
|
|
|
|
|
|
ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
|
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "setting firmware mode (2/2) failed\n");
|
2013-06-13 01:52:10 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* We do all byte-swapping on the host */
|
|
|
|
ret = ath10k_bmi_write32(ar, hi_be, 0);
|
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "setting host CPU BE mode failed\n");
|
2013-06-13 01:52:10 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* FW descriptor/Data swap flags */
|
|
|
|
ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
|
|
|
|
|
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "setting FW data/desc swap flags failed\n");
|
2013-06-13 01:52:10 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-08-13 20:32:26 +08:00
|
|
|
/* Some devices have a special sanity check that verifies the PCI
|
|
|
|
* Device ID is written to this host interest var. It is known to be
|
|
|
|
* required to boot QCA6164.
|
|
|
|
*/
|
|
|
|
ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
|
|
|
|
ar->dev_id);
|
|
|
|
if (ret) {
|
|
|
|
ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2013-06-13 01:52:10 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
|
|
|
|
const char *dir,
|
|
|
|
const char *file)
|
|
|
|
{
|
|
|
|
char filename[100];
|
|
|
|
const struct firmware *fw;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (file == NULL)
|
|
|
|
return ERR_PTR(-ENOENT);
|
|
|
|
|
|
|
|
if (dir == NULL)
|
|
|
|
dir = ".";
|
|
|
|
|
|
|
|
snprintf(filename, sizeof(filename), "%s/%s", dir, file);
|
|
|
|
ret = request_firmware(&fw, filename, ar->dev);
|
|
|
|
if (ret)
|
|
|
|
return ERR_PTR(ret);
|
|
|
|
|
|
|
|
return fw;
|
|
|
|
}
|
|
|
|
|
2014-10-13 14:40:59 +08:00
|
|
|
static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
|
|
|
|
size_t data_len)
|
2013-06-13 01:52:10 +08:00
|
|
|
{
|
2014-12-02 16:55:54 +08:00
|
|
|
u32 board_data_size = ar->hw_params.fw.board_size;
|
|
|
|
u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
|
2013-06-13 01:52:10 +08:00
|
|
|
u32 board_ext_data_addr;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
|
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not read board ext data addr (%d)\n",
|
|
|
|
ret);
|
2013-06-13 01:52:10 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
2013-09-08 22:55:44 +08:00
|
|
|
"boot push board extended data addr 0x%x\n",
|
2013-06-13 01:52:10 +08:00
|
|
|
board_ext_data_addr);
|
|
|
|
|
|
|
|
if (board_ext_data_addr == 0)
|
|
|
|
return 0;
|
|
|
|
|
2014-10-13 14:40:59 +08:00
|
|
|
if (data_len != (board_data_size + board_ext_data_size)) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
|
2014-10-13 14:40:59 +08:00
|
|
|
data_len, board_data_size, board_ext_data_size);
|
2013-06-13 01:52:10 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
|
2014-10-13 14:40:59 +08:00
|
|
|
data + board_data_size,
|
2013-06-13 01:52:10 +08:00
|
|
|
board_ext_data_size);
|
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not write board ext data (%d)\n", ret);
|
2013-06-13 01:52:10 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
|
|
|
|
(board_ext_data_size << 16) | 1);
|
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not write board ext data bit (%d)\n",
|
|
|
|
ret);
|
2013-06-13 01:52:10 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-10-13 14:40:59 +08:00
|
|
|
static int ath10k_download_board_data(struct ath10k *ar, const void *data,
|
|
|
|
size_t data_len)
|
2013-06-13 01:52:10 +08:00
|
|
|
{
|
2014-12-02 16:55:54 +08:00
|
|
|
u32 board_data_size = ar->hw_params.fw.board_size;
|
2013-06-13 01:52:10 +08:00
|
|
|
u32 address;
|
|
|
|
int ret;
|
|
|
|
|
2014-10-13 14:40:59 +08:00
|
|
|
ret = ath10k_push_board_ext_data(ar, data, data_len);
|
2013-06-13 01:52:10 +08:00
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not push board ext data (%d)\n", ret);
|
2013-06-13 01:52:10 +08:00
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = ath10k_bmi_read32(ar, hi_board_data, &address);
|
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not read board data addr (%d)\n", ret);
|
2013-06-13 01:52:10 +08:00
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
2014-10-13 14:40:59 +08:00
|
|
|
ret = ath10k_bmi_write_memory(ar, address, data,
|
2013-09-28 00:55:01 +08:00
|
|
|
min_t(u32, board_data_size,
|
2014-10-13 14:40:59 +08:00
|
|
|
data_len));
|
2013-06-13 01:52:10 +08:00
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not write board data (%d)\n", ret);
|
2013-06-13 01:52:10 +08:00
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
|
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not write board data bit (%d)\n", ret);
|
2013-06-13 01:52:10 +08:00
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
|
|
|
exit:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2014-10-13 14:40:59 +08:00
|
|
|
static int ath10k_download_cal_file(struct ath10k *ar)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (!ar->cal_file)
|
|
|
|
return -ENOENT;
|
|
|
|
|
|
|
|
if (IS_ERR(ar->cal_file))
|
|
|
|
return PTR_ERR(ar->cal_file);
|
|
|
|
|
|
|
|
ret = ath10k_download_board_data(ar, ar->cal_file->data,
|
|
|
|
ar->cal_file->size);
|
|
|
|
if (ret) {
|
|
|
|
ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-12-02 16:55:54 +08:00
|
|
|
static int ath10k_download_cal_dt(struct ath10k *ar)
|
|
|
|
{
|
|
|
|
struct device_node *node;
|
|
|
|
int data_len;
|
|
|
|
void *data;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
node = ar->dev->of_node;
|
|
|
|
if (!node)
|
|
|
|
/* Device Tree is optional, don't print any warnings if
|
|
|
|
* there's no node for ath10k.
|
|
|
|
*/
|
|
|
|
return -ENOENT;
|
|
|
|
|
|
|
|
if (!of_get_property(node, "qcom,ath10k-calibration-data",
|
|
|
|
&data_len)) {
|
|
|
|
/* The calibration data node is optional */
|
|
|
|
return -ENOENT;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (data_len != QCA988X_CAL_DATA_LEN) {
|
|
|
|
ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
|
|
|
|
data_len);
|
|
|
|
ret = -EMSGSIZE;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
data = kmalloc(data_len, GFP_KERNEL);
|
|
|
|
if (!data) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data",
|
|
|
|
data, data_len);
|
|
|
|
if (ret) {
|
|
|
|
ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
|
|
|
|
ret);
|
|
|
|
goto out_free;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = ath10k_download_board_data(ar, data, data_len);
|
|
|
|
if (ret) {
|
|
|
|
ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
|
|
|
|
ret);
|
|
|
|
goto out_free;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = 0;
|
|
|
|
|
|
|
|
out_free:
|
|
|
|
kfree(data);
|
|
|
|
|
|
|
|
out:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2013-06-13 01:52:10 +08:00
|
|
|
static int ath10k_download_and_run_otp(struct ath10k *ar)
|
|
|
|
{
|
2014-03-11 23:33:19 +08:00
|
|
|
u32 result, address = ar->hw_params.patch_load_addr;
|
2015-06-18 15:01:10 +08:00
|
|
|
u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
|
2013-06-13 01:52:10 +08:00
|
|
|
int ret;
|
|
|
|
|
2014-10-13 14:40:59 +08:00
|
|
|
ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len);
|
2014-10-13 14:40:53 +08:00
|
|
|
if (ret) {
|
|
|
|
ath10k_err(ar, "failed to download board data: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2013-06-13 01:52:10 +08:00
|
|
|
/* OTP is optional */
|
|
|
|
|
2014-03-11 23:33:28 +08:00
|
|
|
if (!ar->otp_data || !ar->otp_len) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
|
2014-03-25 03:20:42 +08:00
|
|
|
ar->otp_data, ar->otp_len);
|
2013-06-13 01:52:10 +08:00
|
|
|
return 0;
|
2014-03-11 23:33:28 +08:00
|
|
|
}
|
|
|
|
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
|
2014-03-11 23:33:28 +08:00
|
|
|
address, ar->otp_len);
|
2013-06-13 01:52:10 +08:00
|
|
|
|
2013-09-28 00:55:01 +08:00
|
|
|
ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
|
2013-06-13 01:52:10 +08:00
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not write otp (%d)\n", ret);
|
2014-03-11 23:33:28 +08:00
|
|
|
return ret;
|
2013-06-13 01:52:10 +08:00
|
|
|
}
|
|
|
|
|
2015-06-18 15:01:10 +08:00
|
|
|
ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
|
2013-06-13 01:52:10 +08:00
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not execute otp (%d)\n", ret);
|
2014-03-11 23:33:28 +08:00
|
|
|
return ret;
|
2013-06-13 01:52:10 +08:00
|
|
|
}
|
|
|
|
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
|
2014-03-11 23:33:28 +08:00
|
|
|
|
2015-04-29 01:19:30 +08:00
|
|
|
if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
|
2015-10-05 22:56:34 +08:00
|
|
|
ar->fw_features)) &&
|
|
|
|
result != 0) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "otp calibration failed: %d", result);
|
2014-03-11 23:33:28 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
2013-06-13 01:52:10 +08:00
|
|
|
}
|
|
|
|
|
2014-09-10 23:23:30 +08:00
|
|
|
static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode)
|
2013-06-13 01:52:10 +08:00
|
|
|
{
|
2014-09-10 23:23:30 +08:00
|
|
|
u32 address, data_len;
|
|
|
|
const char *mode_name;
|
|
|
|
const void *data;
|
2013-06-13 01:52:10 +08:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
address = ar->hw_params.patch_load_addr;
|
|
|
|
|
2014-09-10 23:23:30 +08:00
|
|
|
switch (mode) {
|
|
|
|
case ATH10K_FIRMWARE_MODE_NORMAL:
|
|
|
|
data = ar->firmware_data;
|
|
|
|
data_len = ar->firmware_len;
|
|
|
|
mode_name = "normal";
|
2015-06-18 15:01:09 +08:00
|
|
|
ret = ath10k_swap_code_seg_configure(ar,
|
2015-10-05 22:56:35 +08:00
|
|
|
ATH10K_SWAP_CODE_SEG_BIN_TYPE_FW);
|
2015-06-18 15:01:09 +08:00
|
|
|
if (ret) {
|
|
|
|
ath10k_err(ar, "failed to configure fw code swap: %d\n",
|
|
|
|
ret);
|
|
|
|
return ret;
|
|
|
|
}
|
2014-09-10 23:23:30 +08:00
|
|
|
break;
|
|
|
|
case ATH10K_FIRMWARE_MODE_UTF:
|
|
|
|
data = ar->testmode.utf->data;
|
|
|
|
data_len = ar->testmode.utf->size;
|
|
|
|
mode_name = "utf";
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ath10k_err(ar, "unknown firmware mode: %d\n", mode);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
|
|
|
"boot uploading firmware image %p len %d mode %s\n",
|
|
|
|
data, data_len, mode_name);
|
|
|
|
|
|
|
|
ret = ath10k_bmi_fast_download(ar, address, data, data_len);
|
2013-06-13 01:52:10 +08:00
|
|
|
if (ret) {
|
2014-09-10 23:23:30 +08:00
|
|
|
ath10k_err(ar, "failed to download %s firmware: %d\n",
|
|
|
|
mode_name, ret);
|
|
|
|
return ret;
|
2013-06-13 01:52:10 +08:00
|
|
|
}
|
|
|
|
|
2013-07-16 15:38:58 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ath10k_core_free_firmware_files(struct ath10k *ar)
|
|
|
|
{
|
2015-02-05 02:30:23 +08:00
|
|
|
if (!IS_ERR(ar->board))
|
2013-09-28 00:54:55 +08:00
|
|
|
release_firmware(ar->board);
|
2013-07-16 15:38:58 +08:00
|
|
|
|
2015-02-05 02:30:23 +08:00
|
|
|
if (!IS_ERR(ar->otp))
|
2013-07-16 15:38:58 +08:00
|
|
|
release_firmware(ar->otp);
|
|
|
|
|
2015-02-05 02:30:23 +08:00
|
|
|
if (!IS_ERR(ar->firmware))
|
2013-07-16 15:38:58 +08:00
|
|
|
release_firmware(ar->firmware);
|
|
|
|
|
2015-02-05 02:30:23 +08:00
|
|
|
if (!IS_ERR(ar->cal_file))
|
2014-10-13 14:40:59 +08:00
|
|
|
release_firmware(ar->cal_file);
|
|
|
|
|
2015-06-18 15:01:09 +08:00
|
|
|
ath10k_swap_code_seg_release(ar);
|
|
|
|
|
2013-09-28 00:54:55 +08:00
|
|
|
ar->board = NULL;
|
2013-09-28 00:55:01 +08:00
|
|
|
ar->board_data = NULL;
|
|
|
|
ar->board_len = 0;
|
|
|
|
|
2013-07-16 15:38:58 +08:00
|
|
|
ar->otp = NULL;
|
2013-09-28 00:55:01 +08:00
|
|
|
ar->otp_data = NULL;
|
|
|
|
ar->otp_len = 0;
|
|
|
|
|
2013-07-16 15:38:58 +08:00
|
|
|
ar->firmware = NULL;
|
2013-09-28 00:55:01 +08:00
|
|
|
ar->firmware_data = NULL;
|
|
|
|
ar->firmware_len = 0;
|
2014-10-13 14:40:59 +08:00
|
|
|
|
|
|
|
ar->cal_file = NULL;
|
2015-06-18 15:01:09 +08:00
|
|
|
|
2014-10-13 14:40:59 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static int ath10k_fetch_cal_file(struct ath10k *ar)
|
|
|
|
{
|
|
|
|
char filename[100];
|
|
|
|
|
|
|
|
/* cal-<bus>-<id>.bin */
|
|
|
|
scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
|
|
|
|
ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
|
|
|
|
|
|
|
|
ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
|
|
|
|
if (IS_ERR(ar->cal_file))
|
|
|
|
/* calibration file is optional, don't print any warnings */
|
|
|
|
return PTR_ERR(ar->cal_file);
|
|
|
|
|
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
|
|
|
|
ATH10K_FW_DIR, filename);
|
|
|
|
|
|
|
|
return 0;
|
2013-07-16 15:38:58 +08:00
|
|
|
}
|
|
|
|
|
2015-04-17 17:19:17 +08:00
|
|
|
static int ath10k_core_fetch_spec_board_file(struct ath10k *ar)
|
2013-07-16 15:38:58 +08:00
|
|
|
{
|
2015-04-17 17:19:17 +08:00
|
|
|
char filename[100];
|
|
|
|
|
|
|
|
scnprintf(filename, sizeof(filename), "board-%s-%s.bin",
|
|
|
|
ath10k_bus_str(ar->hif.bus), ar->spec_board_id);
|
|
|
|
|
|
|
|
ar->board = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, filename);
|
|
|
|
if (IS_ERR(ar->board))
|
|
|
|
return PTR_ERR(ar->board);
|
|
|
|
|
|
|
|
ar->board_data = ar->board->data;
|
|
|
|
ar->board_len = ar->board->size;
|
|
|
|
ar->spec_board_loaded = true;
|
2013-07-16 15:38:58 +08:00
|
|
|
|
2015-04-17 17:19:17 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ath10k_core_fetch_generic_board_file(struct ath10k *ar)
|
|
|
|
{
|
2015-04-17 17:19:16 +08:00
|
|
|
if (!ar->hw_params.fw.board) {
|
|
|
|
ath10k_err(ar, "failed to find board file fw entry\n");
|
2013-07-16 15:38:58 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2013-09-28 00:54:55 +08:00
|
|
|
ar->board = ath10k_fetch_fw_file(ar,
|
|
|
|
ar->hw_params.fw.dir,
|
|
|
|
ar->hw_params.fw.board);
|
2015-04-17 17:19:17 +08:00
|
|
|
if (IS_ERR(ar->board))
|
|
|
|
return PTR_ERR(ar->board);
|
2013-07-16 15:38:58 +08:00
|
|
|
|
2013-09-28 00:55:01 +08:00
|
|
|
ar->board_data = ar->board->data;
|
|
|
|
ar->board_len = ar->board->size;
|
2015-04-17 17:19:17 +08:00
|
|
|
ar->spec_board_loaded = false;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ath10k_core_fetch_board_file(struct ath10k *ar)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (strlen(ar->spec_board_id) > 0) {
|
|
|
|
ret = ath10k_core_fetch_spec_board_file(ar);
|
|
|
|
if (ret) {
|
|
|
|
ath10k_info(ar, "failed to load spec board file, falling back to generic: %d\n",
|
|
|
|
ret);
|
|
|
|
goto generic;
|
|
|
|
}
|
|
|
|
|
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT, "found specific board file for %s\n",
|
|
|
|
ar->spec_board_id);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
generic:
|
|
|
|
ret = ath10k_core_fetch_generic_board_file(ar);
|
|
|
|
if (ret) {
|
|
|
|
ath10k_err(ar, "failed to fetch generic board data: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
2013-09-28 00:55:01 +08:00
|
|
|
|
2015-04-17 17:19:16 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if (ar->hw_params.fw.fw == NULL) {
|
|
|
|
ath10k_err(ar, "firmware file not defined\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2013-07-16 15:38:58 +08:00
|
|
|
ar->firmware = ath10k_fetch_fw_file(ar,
|
|
|
|
ar->hw_params.fw.dir,
|
|
|
|
ar->hw_params.fw.fw);
|
|
|
|
if (IS_ERR(ar->firmware)) {
|
|
|
|
ret = PTR_ERR(ar->firmware);
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not fetch firmware (%d)\n", ret);
|
2013-07-16 15:38:58 +08:00
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
2013-09-28 00:55:01 +08:00
|
|
|
ar->firmware_data = ar->firmware->data;
|
|
|
|
ar->firmware_len = ar->firmware->size;
|
|
|
|
|
2013-07-16 15:38:58 +08:00
|
|
|
/* OTP may be undefined. If so, don't fetch it at all */
|
|
|
|
if (ar->hw_params.fw.otp == NULL)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
ar->otp = ath10k_fetch_fw_file(ar,
|
|
|
|
ar->hw_params.fw.dir,
|
|
|
|
ar->hw_params.fw.otp);
|
|
|
|
if (IS_ERR(ar->otp)) {
|
|
|
|
ret = PTR_ERR(ar->otp);
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not fetch otp (%d)\n", ret);
|
2013-07-16 15:38:58 +08:00
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
2013-09-28 00:55:01 +08:00
|
|
|
ar->otp_data = ar->otp->data;
|
|
|
|
ar->otp_len = ar->otp->size;
|
|
|
|
|
2013-07-16 15:38:58 +08:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
err:
|
|
|
|
ath10k_core_free_firmware_files(ar);
|
2013-06-13 01:52:10 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2013-09-28 00:55:07 +08:00
|
|
|
static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
|
|
|
|
{
|
|
|
|
size_t magic_len, len, ie_len;
|
|
|
|
int ie_id, i, index, bit, ret;
|
|
|
|
struct ath10k_fw_ie *hdr;
|
|
|
|
const u8 *data;
|
2014-12-03 16:10:08 +08:00
|
|
|
__le32 *timestamp, *version;
|
2013-09-28 00:55:07 +08:00
|
|
|
|
|
|
|
/* first fetch the firmware file (firmware-*.bin) */
|
|
|
|
ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
|
|
|
|
if (IS_ERR(ar->firmware)) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
|
2014-03-25 03:20:41 +08:00
|
|
|
ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
|
2013-09-28 00:55:07 +08:00
|
|
|
return PTR_ERR(ar->firmware);
|
|
|
|
}
|
|
|
|
|
|
|
|
data = ar->firmware->data;
|
|
|
|
len = ar->firmware->size;
|
|
|
|
|
|
|
|
/* magic also includes the null byte, check that as well */
|
|
|
|
magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
|
|
|
|
|
|
|
|
if (len < magic_len) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
|
2014-03-25 03:20:41 +08:00
|
|
|
ar->hw_params.fw.dir, name, len);
|
2013-10-04 14:13:20 +08:00
|
|
|
ret = -EINVAL;
|
|
|
|
goto err;
|
2013-09-28 00:55:07 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "invalid firmware magic\n");
|
2013-10-04 14:13:20 +08:00
|
|
|
ret = -EINVAL;
|
|
|
|
goto err;
|
2013-09-28 00:55:07 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* jump over the padding */
|
|
|
|
magic_len = ALIGN(magic_len, 4);
|
|
|
|
|
|
|
|
len -= magic_len;
|
|
|
|
data += magic_len;
|
|
|
|
|
|
|
|
/* loop elements */
|
|
|
|
while (len > sizeof(struct ath10k_fw_ie)) {
|
|
|
|
hdr = (struct ath10k_fw_ie *)data;
|
|
|
|
|
|
|
|
ie_id = le32_to_cpu(hdr->id);
|
|
|
|
ie_len = le32_to_cpu(hdr->len);
|
|
|
|
|
|
|
|
len -= sizeof(*hdr);
|
|
|
|
data += sizeof(*hdr);
|
|
|
|
|
|
|
|
if (len < ie_len) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
|
2013-09-28 00:55:07 +08:00
|
|
|
ie_id, len, ie_len);
|
2013-10-04 14:13:20 +08:00
|
|
|
ret = -EINVAL;
|
|
|
|
goto err;
|
2013-09-28 00:55:07 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
switch (ie_id) {
|
|
|
|
case ATH10K_FW_IE_FW_VERSION:
|
|
|
|
if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
|
|
|
|
break;
|
|
|
|
|
|
|
|
memcpy(ar->hw->wiphy->fw_version, data, ie_len);
|
|
|
|
ar->hw->wiphy->fw_version[ie_len] = '\0';
|
|
|
|
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
2013-09-28 00:55:07 +08:00
|
|
|
"found fw version %s\n",
|
|
|
|
ar->hw->wiphy->fw_version);
|
|
|
|
break;
|
|
|
|
case ATH10K_FW_IE_TIMESTAMP:
|
|
|
|
if (ie_len != sizeof(u32))
|
|
|
|
break;
|
|
|
|
|
|
|
|
timestamp = (__le32 *)data;
|
|
|
|
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
|
2013-09-28 00:55:07 +08:00
|
|
|
le32_to_cpup(timestamp));
|
|
|
|
break;
|
|
|
|
case ATH10K_FW_IE_FEATURES:
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
2013-09-28 00:55:07 +08:00
|
|
|
"found firmware features ie (%zd B)\n",
|
|
|
|
ie_len);
|
|
|
|
|
|
|
|
for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
|
|
|
|
index = i / 8;
|
|
|
|
bit = i % 8;
|
|
|
|
|
|
|
|
if (index == ie_len)
|
|
|
|
break;
|
|
|
|
|
2014-02-05 01:51:38 +08:00
|
|
|
if (data[index] & (1 << bit)) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
2014-02-05 01:51:38 +08:00
|
|
|
"Enabling feature bit: %i\n",
|
|
|
|
i);
|
2013-09-28 00:55:07 +08:00
|
|
|
__set_bit(i, ar->fw_features);
|
2014-02-05 01:51:38 +08:00
|
|
|
}
|
2013-09-28 00:55:07 +08:00
|
|
|
}
|
|
|
|
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
|
2013-09-28 00:55:07 +08:00
|
|
|
ar->fw_features,
|
|
|
|
sizeof(ar->fw_features));
|
|
|
|
break;
|
|
|
|
case ATH10K_FW_IE_FW_IMAGE:
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
2013-09-28 00:55:07 +08:00
|
|
|
"found fw image ie (%zd B)\n",
|
|
|
|
ie_len);
|
|
|
|
|
|
|
|
ar->firmware_data = data;
|
|
|
|
ar->firmware_len = ie_len;
|
|
|
|
|
|
|
|
break;
|
|
|
|
case ATH10K_FW_IE_OTP_IMAGE:
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
2013-09-28 00:55:07 +08:00
|
|
|
"found otp image ie (%zd B)\n",
|
|
|
|
ie_len);
|
|
|
|
|
|
|
|
ar->otp_data = data;
|
|
|
|
ar->otp_len = ie_len;
|
|
|
|
|
|
|
|
break;
|
2014-12-03 16:10:08 +08:00
|
|
|
case ATH10K_FW_IE_WMI_OP_VERSION:
|
|
|
|
if (ie_len != sizeof(u32))
|
|
|
|
break;
|
|
|
|
|
|
|
|
version = (__le32 *)data;
|
|
|
|
|
|
|
|
ar->wmi.op_version = le32_to_cpup(version);
|
|
|
|
|
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
|
|
|
|
ar->wmi.op_version);
|
|
|
|
break;
|
2015-03-25 19:12:27 +08:00
|
|
|
case ATH10K_FW_IE_HTT_OP_VERSION:
|
|
|
|
if (ie_len != sizeof(u32))
|
|
|
|
break;
|
|
|
|
|
|
|
|
version = (__le32 *)data;
|
|
|
|
|
|
|
|
ar->htt.op_version = le32_to_cpup(version);
|
|
|
|
|
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
|
|
|
|
ar->htt.op_version);
|
|
|
|
break;
|
2015-06-18 15:01:09 +08:00
|
|
|
case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
|
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
|
|
|
"found fw code swap image ie (%zd B)\n",
|
|
|
|
ie_len);
|
|
|
|
ar->swap.firmware_codeswap_data = data;
|
|
|
|
ar->swap.firmware_codeswap_len = ie_len;
|
|
|
|
break;
|
2013-09-28 00:55:07 +08:00
|
|
|
default:
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_warn(ar, "Unknown FW IE: %u\n",
|
2013-09-28 00:55:07 +08:00
|
|
|
le32_to_cpu(hdr->id));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* jump over the padding */
|
|
|
|
ie_len = ALIGN(ie_len, 4);
|
|
|
|
|
|
|
|
len -= ie_len;
|
|
|
|
data += ie_len;
|
2013-10-09 02:48:15 +08:00
|
|
|
}
|
2013-09-28 00:55:07 +08:00
|
|
|
|
|
|
|
if (!ar->firmware_data || !ar->firmware_len) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
|
2014-03-25 03:20:41 +08:00
|
|
|
ar->hw_params.fw.dir, name);
|
2013-09-28 00:55:07 +08:00
|
|
|
ret = -ENOMEDIUM;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err:
|
|
|
|
ath10k_core_free_firmware_files(ar);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2014-10-13 14:40:59 +08:00
|
|
|
/* calibration file is optional, don't check for any errors */
|
|
|
|
ath10k_fetch_cal_file(ar);
|
|
|
|
|
2015-04-17 17:19:16 +08:00
|
|
|
ret = ath10k_core_fetch_board_file(ar);
|
|
|
|
if (ret) {
|
|
|
|
ath10k_err(ar, "failed to fetch board file: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-03-25 19:12:42 +08:00
|
|
|
ar->fw_api = 5;
|
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
|
|
|
|
|
|
|
|
ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API5_FILE);
|
|
|
|
if (ret == 0)
|
|
|
|
goto success;
|
|
|
|
|
2014-12-17 18:21:12 +08:00
|
|
|
ar->fw_api = 4;
|
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
|
|
|
|
|
|
|
|
ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE);
|
|
|
|
if (ret == 0)
|
|
|
|
goto success;
|
|
|
|
|
2014-07-25 19:32:17 +08:00
|
|
|
ar->fw_api = 3;
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
|
2014-07-25 19:32:17 +08:00
|
|
|
|
|
|
|
ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
|
|
|
|
if (ret == 0)
|
|
|
|
goto success;
|
|
|
|
|
2014-03-25 03:20:41 +08:00
|
|
|
ar->fw_api = 2;
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
|
2014-03-25 03:20:41 +08:00
|
|
|
|
2013-09-28 00:55:07 +08:00
|
|
|
ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
|
2014-03-25 03:20:41 +08:00
|
|
|
if (ret == 0)
|
|
|
|
goto success;
|
|
|
|
|
|
|
|
ar->fw_api = 1;
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
|
2013-09-28 00:55:07 +08:00
|
|
|
|
|
|
|
ret = ath10k_core_fetch_firmware_api_1(ar);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2014-03-25 03:20:41 +08:00
|
|
|
success:
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
|
2013-09-28 00:55:07 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-10-13 14:40:53 +08:00
|
|
|
static int ath10k_download_cal_data(struct ath10k *ar)
|
2013-06-13 01:52:10 +08:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2014-10-13 14:40:59 +08:00
|
|
|
ret = ath10k_download_cal_file(ar);
|
|
|
|
if (ret == 0) {
|
|
|
|
ar->cal_mode = ATH10K_CAL_MODE_FILE;
|
|
|
|
goto done;
|
|
|
|
}
|
|
|
|
|
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
2014-12-02 16:55:54 +08:00
|
|
|
"boot did not find a calibration file, try DT next: %d\n",
|
|
|
|
ret);
|
|
|
|
|
|
|
|
ret = ath10k_download_cal_dt(ar);
|
|
|
|
if (ret == 0) {
|
|
|
|
ar->cal_mode = ATH10K_CAL_MODE_DT;
|
|
|
|
goto done;
|
|
|
|
}
|
|
|
|
|
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
|
|
|
"boot did not find DT entry, try OTP next: %d\n",
|
2014-10-13 14:40:59 +08:00
|
|
|
ret);
|
|
|
|
|
2013-06-13 01:52:10 +08:00
|
|
|
ret = ath10k_download_and_run_otp(ar);
|
2014-03-25 03:20:42 +08:00
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "failed to run otp: %d\n", ret);
|
2013-06-13 01:52:10 +08:00
|
|
|
return ret;
|
2014-03-25 03:20:42 +08:00
|
|
|
}
|
2013-06-13 01:52:10 +08:00
|
|
|
|
2014-10-13 14:40:59 +08:00
|
|
|
ar->cal_mode = ATH10K_CAL_MODE_OTP;
|
|
|
|
|
|
|
|
done:
|
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
|
|
|
|
ath10k_cal_mode_str(ar->cal_mode));
|
|
|
|
return 0;
|
2013-06-13 01:52:10 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static int ath10k_init_uart(struct ath10k *ar)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Explicitly setting UART prints to zero as target turns it on
|
|
|
|
* based on scratch registers.
|
|
|
|
*/
|
|
|
|
ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
|
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
|
2013-06-13 01:52:10 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2013-11-20 16:00:41 +08:00
|
|
|
if (!uart_print)
|
2013-06-13 01:52:10 +08:00
|
|
|
return 0;
|
|
|
|
|
2014-12-02 16:55:55 +08:00
|
|
|
ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
|
2013-06-13 01:52:10 +08:00
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
|
2013-06-13 01:52:10 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
|
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
|
2013-06-13 01:52:10 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2013-09-03 20:24:02 +08:00
|
|
|
/* Set the UART baud rate to 19200. */
|
|
|
|
ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
|
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
|
2013-09-03 20:24:02 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_info(ar, "UART prints enabled\n");
|
2013-06-13 01:52:10 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ath10k_init_hw_params(struct ath10k *ar)
|
|
|
|
{
|
|
|
|
const struct ath10k_hw_params *uninitialized_var(hw_params);
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
|
|
|
|
hw_params = &ath10k_hw_params_list[i];
|
|
|
|
|
|
|
|
if (hw_params->id == ar->target_version)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
|
2013-06-13 01:52:10 +08:00
|
|
|
ar->target_version);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ar->hw_params = *hw_params;
|
|
|
|
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
|
2013-11-20 16:00:41 +08:00
|
|
|
ar->hw_params.name, ar->target_version);
|
2013-06-13 01:52:10 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-07-16 15:54:35 +08:00
|
|
|
static void ath10k_core_restart(struct work_struct *work)
|
|
|
|
{
|
|
|
|
struct ath10k *ar = container_of(work, struct ath10k, restart_work);
|
|
|
|
|
2014-10-28 17:34:38 +08:00
|
|
|
set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
|
|
|
|
|
|
|
|
/* Place a barrier to make sure the compiler doesn't reorder
|
|
|
|
* CRASH_FLUSH and calling other functions.
|
|
|
|
*/
|
|
|
|
barrier();
|
|
|
|
|
|
|
|
ieee80211_stop_queues(ar->hw);
|
|
|
|
ath10k_drain_tx(ar);
|
|
|
|
complete_all(&ar->scan.started);
|
|
|
|
complete_all(&ar->scan.completed);
|
|
|
|
complete_all(&ar->scan.on_channel);
|
|
|
|
complete_all(&ar->offchan_tx_completed);
|
|
|
|
complete_all(&ar->install_key_done);
|
|
|
|
complete_all(&ar->vdev_setup_done);
|
2014-12-17 18:22:26 +08:00
|
|
|
complete_all(&ar->thermal.wmi_sync);
|
2014-10-28 17:34:38 +08:00
|
|
|
wake_up(&ar->htt.empty_tx_wq);
|
|
|
|
wake_up(&ar->wmi.tx_credits_wq);
|
|
|
|
wake_up(&ar->peer_mapping_wq);
|
|
|
|
|
2013-07-16 15:54:35 +08:00
|
|
|
mutex_lock(&ar->conf_mutex);
|
|
|
|
|
|
|
|
switch (ar->state) {
|
|
|
|
case ATH10K_STATE_ON:
|
|
|
|
ar->state = ATH10K_STATE_RESTARTING;
|
2014-08-22 20:33:18 +08:00
|
|
|
ath10k_hif_stop(ar);
|
2014-08-05 20:54:44 +08:00
|
|
|
ath10k_scan_finish(ar);
|
2013-07-16 15:54:35 +08:00
|
|
|
ieee80211_restart_hw(ar->hw);
|
|
|
|
break;
|
|
|
|
case ATH10K_STATE_OFF:
|
2013-10-16 21:46:05 +08:00
|
|
|
/* this can happen if driver is being unloaded
|
|
|
|
* or if the crash happens during FW probing */
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
|
2013-07-16 15:54:35 +08:00
|
|
|
break;
|
|
|
|
case ATH10K_STATE_RESTARTING:
|
2014-05-26 17:46:03 +08:00
|
|
|
/* hw restart might be requested from multiple places */
|
|
|
|
break;
|
2013-07-16 15:54:35 +08:00
|
|
|
case ATH10K_STATE_RESTARTED:
|
|
|
|
ar->state = ATH10K_STATE_WEDGED;
|
|
|
|
/* fall through */
|
|
|
|
case ATH10K_STATE_WEDGED:
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_warn(ar, "device is wedged, will not restart\n");
|
2013-07-16 15:54:35 +08:00
|
|
|
break;
|
2014-09-10 23:23:30 +08:00
|
|
|
case ATH10K_STATE_UTF:
|
|
|
|
ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
|
|
|
|
break;
|
2013-07-16 15:54:35 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
mutex_unlock(&ar->conf_mutex);
|
|
|
|
}
|
|
|
|
|
2014-12-03 16:09:59 +08:00
|
|
|
static int ath10k_core_init_firmware_features(struct ath10k *ar)
|
2014-11-25 22:16:05 +08:00
|
|
|
{
|
2014-12-03 16:09:59 +08:00
|
|
|
if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
|
|
|
|
!test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
|
|
|
|
ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2014-12-03 16:10:08 +08:00
|
|
|
if (ar->wmi.op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
|
|
|
|
ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
|
|
|
|
ATH10K_FW_WMI_OP_VERSION_MAX, ar->wmi.op_version);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
ath10k: enable raw encap mode and software crypto engine
This patch enables raw Rx/Tx encap mode to support software based
crypto engine. This patch introduces a new module param 'cryptmode'.
cryptmode:
0: Use hardware crypto engine globally with native Wi-Fi mode TX/RX
encapsulation to the firmware. This is the default mode.
1: Use sofware crypto engine globally with raw mode TX/RX
encapsulation to the firmware.
Known limitation:
A-MSDU must be disabled for RAW Tx encap mode to perform well when
heavy traffic is applied.
Testing: (by Michal Kazior <michal.kazior@tieto.com>)
a) Performance Testing
cryptmode=1
ap=qca988x sta=killer1525
killer1525 -> qca988x 194.496 mbps [tcp1 ip4]
killer1525 -> qca988x 238.309 mbps [tcp5 ip4]
killer1525 -> qca988x 266.958 mbps [udp1 ip4]
killer1525 -> qca988x 477.468 mbps [udp5 ip4]
qca988x -> killer1525 301.378 mbps [tcp1 ip4]
qca988x -> killer1525 297.949 mbps [tcp5 ip4]
qca988x -> killer1525 331.351 mbps [udp1 ip4]
qca988x -> killer1525 371.528 mbps [udp5 ip4]
ap=killer1525 sta=qca988x
qca988x -> killer1525 331.447 mbps [tcp1 ip4]
qca988x -> killer1525 328.783 mbps [tcp5 ip4]
qca988x -> killer1525 375.309 mbps [udp1 ip4]
qca988x -> killer1525 403.379 mbps [udp5 ip4]
killer1525 -> qca988x 203.689 mbps [tcp1 ip4]
killer1525 -> qca988x 222.339 mbps [tcp5 ip4]
killer1525 -> qca988x 264.199 mbps [udp1 ip4]
killer1525 -> qca988x 479.371 mbps [udp5 ip4]
Note:
- only open network tested for RAW vs nwifi performance comparison
- killer1525 (qca6174 hw2.2) is 2x2 device (hence max 866mbps)
- used iperf
- OTA, devices a few cm apart from each other, no shielding
- tcpX/udpX, X - means number of threads used
Overview:
- relative Tx performance drop is seen but is within reasonable and
expected threshold (A-MSDU must be disabled with RAW Tx)
b) Connectivity Testing
cryptmode=1
ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta2br1vlan OK
ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta2br1vlan OK
ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta2br1vlan OK
ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta2br1vlan OK
Note:
- each test takes all possible endpoint pairs and pings
- each pair-ping flushes arp table
- ip6 is used
c) Testbed Topology:
1ap1sta:
[ap] ---- [sta]
endpoints: ap, sta
1ap1sta2br:
[veth0] [ap] ---- [sta] [veth2]
| | | |
[veth1] | \ [veth3]
\ / \ /
[br0] [br1]
endpoints: veth0, veth2, br0, br1
note: STA works in 4addr mode, AP has wds_sta=1
1ap1sta2br1vlan:
[veth0] [ap] ---- [sta] [veth2]
| | | |
[veth1] | \ [veth3]
\ / \ /
[br0] [br1]
| |
[vlan0_id2] [vlan1_id2]
endpoints: vlan0_id2, vlan1_id2
note: STA works in 4addr mode, AP has wds_sta=1
Credits:
Thanks to Michal Kazior <michal.kazior@tieto.com> who helped find the
amsdu issue, contributed a workaround (already squashed into this
patch), and contributed the throughput and connectivity tests results.
Signed-off-by: David Liu <cfliu.tw@gmail.com>
Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Tested-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-07-25 01:25:32 +08:00
|
|
|
ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
|
|
|
|
switch (ath10k_cryptmode_param) {
|
|
|
|
case ATH10K_CRYPT_MODE_HW:
|
|
|
|
clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
|
|
|
|
clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
|
|
|
|
break;
|
|
|
|
case ATH10K_CRYPT_MODE_SW:
|
|
|
|
if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
|
|
|
|
ar->fw_features)) {
|
|
|
|
ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
|
|
|
|
set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ath10k_info(ar, "invalid cryptmode: %d\n",
|
|
|
|
ath10k_cryptmode_param);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
|
|
|
|
ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
|
|
|
|
|
2015-09-10 00:47:36 +08:00
|
|
|
if (rawmode) {
|
|
|
|
if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
|
|
|
|
ar->fw_features)) {
|
|
|
|
ath10k_err(ar, "rawmode = 1 requires support from firmware");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
|
|
|
|
}
|
|
|
|
|
ath10k: enable raw encap mode and software crypto engine
This patch enables raw Rx/Tx encap mode to support software based
crypto engine. This patch introduces a new module param 'cryptmode'.
cryptmode:
0: Use hardware crypto engine globally with native Wi-Fi mode TX/RX
encapsulation to the firmware. This is the default mode.
1: Use sofware crypto engine globally with raw mode TX/RX
encapsulation to the firmware.
Known limitation:
A-MSDU must be disabled for RAW Tx encap mode to perform well when
heavy traffic is applied.
Testing: (by Michal Kazior <michal.kazior@tieto.com>)
a) Performance Testing
cryptmode=1
ap=qca988x sta=killer1525
killer1525 -> qca988x 194.496 mbps [tcp1 ip4]
killer1525 -> qca988x 238.309 mbps [tcp5 ip4]
killer1525 -> qca988x 266.958 mbps [udp1 ip4]
killer1525 -> qca988x 477.468 mbps [udp5 ip4]
qca988x -> killer1525 301.378 mbps [tcp1 ip4]
qca988x -> killer1525 297.949 mbps [tcp5 ip4]
qca988x -> killer1525 331.351 mbps [udp1 ip4]
qca988x -> killer1525 371.528 mbps [udp5 ip4]
ap=killer1525 sta=qca988x
qca988x -> killer1525 331.447 mbps [tcp1 ip4]
qca988x -> killer1525 328.783 mbps [tcp5 ip4]
qca988x -> killer1525 375.309 mbps [udp1 ip4]
qca988x -> killer1525 403.379 mbps [udp5 ip4]
killer1525 -> qca988x 203.689 mbps [tcp1 ip4]
killer1525 -> qca988x 222.339 mbps [tcp5 ip4]
killer1525 -> qca988x 264.199 mbps [udp1 ip4]
killer1525 -> qca988x 479.371 mbps [udp5 ip4]
Note:
- only open network tested for RAW vs nwifi performance comparison
- killer1525 (qca6174 hw2.2) is 2x2 device (hence max 866mbps)
- used iperf
- OTA, devices a few cm apart from each other, no shielding
- tcpX/udpX, X - means number of threads used
Overview:
- relative Tx performance drop is seen but is within reasonable and
expected threshold (A-MSDU must be disabled with RAW Tx)
b) Connectivity Testing
cryptmode=1
ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta OK
ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta OK
ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta2br OK
ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta2br OK
ap=iwl6205 sta1=qca988x crypto=open topology-1ap1sta2br1vlan OK
ap=iwl6205 sta1=qca988x crypto=wep1 topology-1ap1sta2br1vlan OK
ap=iwl6205 sta1=qca988x crypto=wpa topology-1ap1sta2br1vlan OK
ap=iwl6205 sta1=qca988x crypto=wpa-ccmp topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=open topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=wep1 topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=wpa topology-1ap1sta2br1vlan OK
ap=qca988x sta1=iwl6205 crypto=wpa-ccmp topology-1ap1sta2br1vlan OK
Note:
- each test takes all possible endpoint pairs and pings
- each pair-ping flushes arp table
- ip6 is used
c) Testbed Topology:
1ap1sta:
[ap] ---- [sta]
endpoints: ap, sta
1ap1sta2br:
[veth0] [ap] ---- [sta] [veth2]
| | | |
[veth1] | \ [veth3]
\ / \ /
[br0] [br1]
endpoints: veth0, veth2, br0, br1
note: STA works in 4addr mode, AP has wds_sta=1
1ap1sta2br1vlan:
[veth0] [ap] ---- [sta] [veth2]
| | | |
[veth1] | \ [veth3]
\ / \ /
[br0] [br1]
| |
[vlan0_id2] [vlan1_id2]
endpoints: vlan0_id2, vlan1_id2
note: STA works in 4addr mode, AP has wds_sta=1
Credits:
Thanks to Michal Kazior <michal.kazior@tieto.com> who helped find the
amsdu issue, contributed a workaround (already squashed into this
patch), and contributed the throughput and connectivity tests results.
Signed-off-by: David Liu <cfliu.tw@gmail.com>
Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Tested-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-07-25 01:25:32 +08:00
|
|
|
if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
|
|
|
|
ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
|
|
|
|
|
|
|
|
/* Workaround:
|
|
|
|
*
|
|
|
|
* Firmware A-MSDU aggregation breaks with RAW Tx encap mode
|
|
|
|
* and causes enormous performance issues (malformed frames,
|
|
|
|
* etc).
|
|
|
|
*
|
|
|
|
* Disabling A-MSDU makes RAW mode stable with heavy traffic
|
|
|
|
* albeit a bit slower compared to regular operation.
|
|
|
|
*/
|
|
|
|
ar->htt.max_num_amsdu = 1;
|
|
|
|
}
|
|
|
|
|
2014-12-03 16:10:08 +08:00
|
|
|
/* Backwards compatibility for firmwares without
|
|
|
|
* ATH10K_FW_IE_WMI_OP_VERSION.
|
|
|
|
*/
|
|
|
|
if (ar->wmi.op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
|
|
|
|
if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
|
2014-12-17 18:21:12 +08:00
|
|
|
if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
|
|
|
|
ar->fw_features))
|
2014-12-03 16:10:08 +08:00
|
|
|
ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
|
|
|
|
else
|
|
|
|
ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
|
|
|
|
} else {
|
|
|
|
ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (ar->wmi.op_version) {
|
|
|
|
case ATH10K_FW_WMI_OP_VERSION_MAIN:
|
2014-11-25 22:16:05 +08:00
|
|
|
ar->max_num_peers = TARGET_NUM_PEERS;
|
|
|
|
ar->max_num_stations = TARGET_NUM_STATIONS;
|
2014-12-17 18:20:45 +08:00
|
|
|
ar->max_num_vdevs = TARGET_NUM_VDEVS;
|
2014-12-03 16:10:17 +08:00
|
|
|
ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
|
2015-04-02 03:53:21 +08:00
|
|
|
ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
|
|
|
|
WMI_STAT_PEER;
|
2015-06-22 22:52:26 +08:00
|
|
|
ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
|
2014-12-03 16:10:08 +08:00
|
|
|
break;
|
|
|
|
case ATH10K_FW_WMI_OP_VERSION_10_1:
|
|
|
|
case ATH10K_FW_WMI_OP_VERSION_10_2:
|
2014-12-17 18:21:12 +08:00
|
|
|
case ATH10K_FW_WMI_OP_VERSION_10_2_4:
|
2014-12-03 16:10:08 +08:00
|
|
|
ar->max_num_peers = TARGET_10X_NUM_PEERS;
|
|
|
|
ar->max_num_stations = TARGET_10X_NUM_STATIONS;
|
2014-12-17 18:20:45 +08:00
|
|
|
ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
|
2014-12-03 16:10:17 +08:00
|
|
|
ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
|
2015-04-02 03:53:21 +08:00
|
|
|
ar->fw_stats_req_mask = WMI_STAT_PEER;
|
2015-06-22 22:52:26 +08:00
|
|
|
ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
|
2014-12-03 16:10:08 +08:00
|
|
|
break;
|
2014-12-03 16:11:32 +08:00
|
|
|
case ATH10K_FW_WMI_OP_VERSION_TLV:
|
|
|
|
ar->max_num_peers = TARGET_TLV_NUM_PEERS;
|
|
|
|
ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
|
2015-01-08 18:36:56 +08:00
|
|
|
ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
|
2015-03-30 14:51:52 +08:00
|
|
|
ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
|
2014-12-03 16:11:32 +08:00
|
|
|
ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
|
2015-03-23 23:32:54 +08:00
|
|
|
ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
|
2015-04-02 03:53:21 +08:00
|
|
|
ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
|
|
|
|
WMI_STAT_PEER;
|
2015-06-22 22:52:26 +08:00
|
|
|
ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
|
2014-12-03 16:11:32 +08:00
|
|
|
break;
|
2015-06-22 22:40:09 +08:00
|
|
|
case ATH10K_FW_WMI_OP_VERSION_10_4:
|
2015-06-22 22:40:15 +08:00
|
|
|
ar->max_num_peers = TARGET_10_4_NUM_PEERS;
|
|
|
|
ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
|
|
|
|
ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
|
|
|
|
ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
|
|
|
|
ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
|
2015-06-22 22:52:24 +08:00
|
|
|
ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
|
2015-06-22 22:40:15 +08:00
|
|
|
ar->fw_stats_req_mask = WMI_STAT_PEER;
|
2015-06-22 22:52:26 +08:00
|
|
|
ar->max_spatial_stream = WMI_10_4_MAX_SPATIAL_STREAM;
|
2015-06-22 22:40:15 +08:00
|
|
|
break;
|
2014-12-03 16:10:08 +08:00
|
|
|
case ATH10K_FW_WMI_OP_VERSION_UNSET:
|
|
|
|
case ATH10K_FW_WMI_OP_VERSION_MAX:
|
|
|
|
WARN_ON(1);
|
|
|
|
return -EINVAL;
|
2014-11-25 22:16:05 +08:00
|
|
|
}
|
2014-12-03 16:09:59 +08:00
|
|
|
|
2015-03-30 19:14:28 +08:00
|
|
|
/* Backwards compatibility for firmwares without
|
|
|
|
* ATH10K_FW_IE_HTT_OP_VERSION.
|
|
|
|
*/
|
|
|
|
if (ar->htt.op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
|
|
|
|
switch (ar->wmi.op_version) {
|
|
|
|
case ATH10K_FW_WMI_OP_VERSION_MAIN:
|
|
|
|
ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
|
|
|
|
break;
|
|
|
|
case ATH10K_FW_WMI_OP_VERSION_10_1:
|
|
|
|
case ATH10K_FW_WMI_OP_VERSION_10_2:
|
|
|
|
case ATH10K_FW_WMI_OP_VERSION_10_2_4:
|
|
|
|
ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
|
|
|
|
break;
|
|
|
|
case ATH10K_FW_WMI_OP_VERSION_TLV:
|
|
|
|
ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
|
|
|
|
break;
|
2015-06-22 22:40:09 +08:00
|
|
|
case ATH10K_FW_WMI_OP_VERSION_10_4:
|
2015-03-30 19:14:28 +08:00
|
|
|
case ATH10K_FW_WMI_OP_VERSION_UNSET:
|
|
|
|
case ATH10K_FW_WMI_OP_VERSION_MAX:
|
|
|
|
WARN_ON(1);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-12-03 16:09:59 +08:00
|
|
|
return 0;
|
2014-11-25 22:16:05 +08:00
|
|
|
}
|
|
|
|
|
2014-09-10 23:23:30 +08:00
|
|
|
int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
|
2013-06-13 01:52:10 +08:00
|
|
|
{
|
|
|
|
int status;
|
|
|
|
|
2013-10-09 02:45:25 +08:00
|
|
|
lockdep_assert_held(&ar->conf_mutex);
|
|
|
|
|
2014-10-28 17:34:38 +08:00
|
|
|
clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
|
|
|
|
|
2013-07-16 15:38:53 +08:00
|
|
|
ath10k_bmi_start(ar);
|
|
|
|
|
2013-06-13 01:52:10 +08:00
|
|
|
if (ath10k_init_configure_target(ar)) {
|
|
|
|
status = -EINVAL;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
2014-10-13 14:40:53 +08:00
|
|
|
status = ath10k_download_cal_data(ar);
|
|
|
|
if (status)
|
|
|
|
goto err;
|
|
|
|
|
2015-05-29 22:51:53 +08:00
|
|
|
/* Some of of qca988x solutions are having global reset issue
|
2015-10-05 22:56:35 +08:00
|
|
|
* during target initialization. Bypassing PLL setting before
|
|
|
|
* downloading firmware and letting the SoC run on REF_CLK is
|
|
|
|
* fixing the problem. Corresponding firmware change is also needed
|
|
|
|
* to set the clock source once the target is initialized.
|
2015-05-29 22:51:53 +08:00
|
|
|
*/
|
|
|
|
if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
|
|
|
|
ar->fw_features)) {
|
|
|
|
status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
|
|
|
|
if (status) {
|
|
|
|
ath10k_err(ar, "could not write to skip_clock_init: %d\n",
|
|
|
|
status);
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-10-13 14:40:53 +08:00
|
|
|
status = ath10k_download_fw(ar, mode);
|
2013-06-13 01:52:10 +08:00
|
|
|
if (status)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
status = ath10k_init_uart(ar);
|
|
|
|
if (status)
|
|
|
|
goto err;
|
|
|
|
|
2013-07-05 21:15:13 +08:00
|
|
|
ar->htc.htc_ops.target_send_suspend_complete =
|
|
|
|
ath10k_send_suspend_complete;
|
2013-06-13 01:52:10 +08:00
|
|
|
|
2013-07-05 21:15:13 +08:00
|
|
|
status = ath10k_htc_init(ar);
|
|
|
|
if (status) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not init HTC (%d)\n", status);
|
2013-06-13 01:52:10 +08:00
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
|
|
|
status = ath10k_bmi_done(ar);
|
|
|
|
if (status)
|
2013-07-05 21:15:13 +08:00
|
|
|
goto err;
|
2013-06-13 01:52:10 +08:00
|
|
|
|
|
|
|
status = ath10k_wmi_attach(ar);
|
|
|
|
if (status) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "WMI attach failed: %d\n", status);
|
2013-07-05 21:15:13 +08:00
|
|
|
goto err;
|
2013-06-13 01:52:10 +08:00
|
|
|
}
|
|
|
|
|
2014-05-16 22:15:39 +08:00
|
|
|
status = ath10k_htt_init(ar);
|
|
|
|
if (status) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "failed to init htt: %d\n", status);
|
2014-05-16 22:15:39 +08:00
|
|
|
goto err_wmi_detach;
|
|
|
|
}
|
|
|
|
|
|
|
|
status = ath10k_htt_tx_alloc(&ar->htt);
|
|
|
|
if (status) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
|
2014-05-16 22:15:39 +08:00
|
|
|
goto err_wmi_detach;
|
|
|
|
}
|
|
|
|
|
|
|
|
status = ath10k_htt_rx_alloc(&ar->htt);
|
|
|
|
if (status) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
|
2014-05-16 22:15:39 +08:00
|
|
|
goto err_htt_tx_detach;
|
|
|
|
}
|
|
|
|
|
2013-11-08 15:05:18 +08:00
|
|
|
status = ath10k_hif_start(ar);
|
|
|
|
if (status) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not start HIF: %d\n", status);
|
2014-05-16 22:15:39 +08:00
|
|
|
goto err_htt_rx_detach;
|
2013-11-08 15:05:18 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
status = ath10k_htc_wait_target(&ar->htc);
|
|
|
|
if (status) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "failed to connect to HTC: %d\n", status);
|
2013-11-08 15:05:18 +08:00
|
|
|
goto err_hif_stop;
|
|
|
|
}
|
2013-06-13 01:52:10 +08:00
|
|
|
|
2014-09-10 23:23:30 +08:00
|
|
|
if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
|
|
|
|
status = ath10k_htt_connect(&ar->htt);
|
|
|
|
if (status) {
|
|
|
|
ath10k_err(ar, "failed to connect htt (%d)\n", status);
|
|
|
|
goto err_hif_stop;
|
|
|
|
}
|
2013-06-13 01:52:10 +08:00
|
|
|
}
|
|
|
|
|
2014-05-16 22:15:39 +08:00
|
|
|
status = ath10k_wmi_connect(ar);
|
|
|
|
if (status) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not connect wmi: %d\n", status);
|
2014-05-16 22:15:39 +08:00
|
|
|
goto err_hif_stop;
|
|
|
|
}
|
|
|
|
|
|
|
|
status = ath10k_htc_start(&ar->htc);
|
|
|
|
if (status) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "failed to start htc: %d\n", status);
|
2014-05-16 22:15:39 +08:00
|
|
|
goto err_hif_stop;
|
|
|
|
}
|
|
|
|
|
2014-09-10 23:23:30 +08:00
|
|
|
if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
|
|
|
|
status = ath10k_wmi_wait_for_service_ready(ar);
|
2015-03-30 20:39:21 +08:00
|
|
|
if (status) {
|
2014-09-10 23:23:30 +08:00
|
|
|
ath10k_warn(ar, "wmi service ready event not received");
|
|
|
|
goto err_hif_stop;
|
|
|
|
}
|
2014-05-16 22:15:39 +08:00
|
|
|
}
|
2013-06-13 01:52:10 +08:00
|
|
|
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
|
2013-11-20 16:00:41 +08:00
|
|
|
ar->hw->wiphy->fw_version);
|
2013-06-13 01:52:10 +08:00
|
|
|
|
|
|
|
status = ath10k_wmi_cmd_init(ar);
|
|
|
|
if (status) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not send WMI init command (%d)\n",
|
|
|
|
status);
|
2014-08-07 17:03:31 +08:00
|
|
|
goto err_hif_stop;
|
2013-06-13 01:52:10 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
status = ath10k_wmi_wait_for_unified_ready(ar);
|
2015-03-30 20:39:21 +08:00
|
|
|
if (status) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "wmi unified ready event not received\n");
|
2014-08-07 17:03:31 +08:00
|
|
|
goto err_hif_stop;
|
2013-06-13 01:52:10 +08:00
|
|
|
}
|
|
|
|
|
2015-01-24 18:14:48 +08:00
|
|
|
/* If firmware indicates Full Rx Reorder support it must be used in a
|
|
|
|
* slightly different manner. Let HTT code know.
|
|
|
|
*/
|
|
|
|
ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
|
|
|
|
ar->wmi.svc_map));
|
|
|
|
|
|
|
|
status = ath10k_htt_rx_ring_refill(ar);
|
|
|
|
if (status) {
|
|
|
|
ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
|
|
|
|
goto err_hif_stop;
|
|
|
|
}
|
|
|
|
|
2014-09-10 23:23:30 +08:00
|
|
|
/* we don't care about HTT in UTF mode */
|
|
|
|
if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
|
|
|
|
status = ath10k_htt_setup(&ar->htt);
|
|
|
|
if (status) {
|
|
|
|
ath10k_err(ar, "failed to setup htt: %d\n", status);
|
|
|
|
goto err_hif_stop;
|
|
|
|
}
|
2014-05-16 22:15:39 +08:00
|
|
|
}
|
2013-06-13 01:52:10 +08:00
|
|
|
|
2013-09-03 16:44:03 +08:00
|
|
|
status = ath10k_debug_start(ar);
|
|
|
|
if (status)
|
2014-08-07 17:03:31 +08:00
|
|
|
goto err_hif_stop;
|
2013-09-03 16:44:03 +08:00
|
|
|
|
2014-12-17 18:20:45 +08:00
|
|
|
ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
|
2014-06-03 02:19:45 +08:00
|
|
|
|
2013-10-16 20:44:45 +08:00
|
|
|
INIT_LIST_HEAD(&ar->arvifs);
|
2013-07-16 15:38:55 +08:00
|
|
|
|
2013-07-16 15:38:51 +08:00
|
|
|
return 0;
|
|
|
|
|
2013-11-08 15:05:18 +08:00
|
|
|
err_hif_stop:
|
|
|
|
ath10k_hif_stop(ar);
|
2014-05-16 22:15:39 +08:00
|
|
|
err_htt_rx_detach:
|
|
|
|
ath10k_htt_rx_free(&ar->htt);
|
|
|
|
err_htt_tx_detach:
|
|
|
|
ath10k_htt_tx_free(&ar->htt);
|
2013-07-16 15:38:51 +08:00
|
|
|
err_wmi_detach:
|
|
|
|
ath10k_wmi_detach(ar);
|
|
|
|
err:
|
|
|
|
return status;
|
|
|
|
}
|
2013-07-16 15:38:57 +08:00
|
|
|
EXPORT_SYMBOL(ath10k_core_start);
|
2013-07-16 15:38:51 +08:00
|
|
|
|
2014-02-11 00:14:24 +08:00
|
|
|
int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
|
|
|
|
{
|
|
|
|
int ret;
|
2015-03-30 20:39:21 +08:00
|
|
|
unsigned long time_left;
|
2014-02-11 00:14:24 +08:00
|
|
|
|
|
|
|
reinit_completion(&ar->target_suspend);
|
|
|
|
|
|
|
|
ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
|
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_warn(ar, "could not suspend target (%d)\n", ret);
|
2014-02-11 00:14:24 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-03-30 20:39:21 +08:00
|
|
|
time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
|
2014-02-11 00:14:24 +08:00
|
|
|
|
2015-03-30 20:39:21 +08:00
|
|
|
if (!time_left) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_warn(ar, "suspend timed out - target pause event never came\n");
|
2014-02-11 00:14:24 +08:00
|
|
|
return -ETIMEDOUT;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-07-16 15:38:51 +08:00
|
|
|
void ath10k_core_stop(struct ath10k *ar)
|
|
|
|
{
|
2013-10-09 02:45:25 +08:00
|
|
|
lockdep_assert_held(&ar->conf_mutex);
|
2015-07-09 16:49:42 +08:00
|
|
|
ath10k_debug_stop(ar);
|
2013-10-09 02:45:25 +08:00
|
|
|
|
2014-02-11 00:14:24 +08:00
|
|
|
/* try to suspend target */
|
2014-09-10 23:23:30 +08:00
|
|
|
if (ar->state != ATH10K_STATE_RESTARTING &&
|
|
|
|
ar->state != ATH10K_STATE_UTF)
|
2014-04-24 00:30:04 +08:00
|
|
|
ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
|
|
|
|
|
2014-05-16 22:15:39 +08:00
|
|
|
ath10k_hif_stop(ar);
|
|
|
|
ath10k_htt_tx_free(&ar->htt);
|
|
|
|
ath10k_htt_rx_free(&ar->htt);
|
2013-07-16 15:38:51 +08:00
|
|
|
ath10k_wmi_detach(ar);
|
|
|
|
}
|
2013-07-16 15:38:57 +08:00
|
|
|
EXPORT_SYMBOL(ath10k_core_stop);
|
|
|
|
|
|
|
|
/* mac80211 manages fw/hw initialization through start/stop hooks. However in
|
|
|
|
* order to know what hw capabilities should be advertised to mac80211 it is
|
|
|
|
* necessary to load the firmware (and tear it down immediately since start
|
|
|
|
* hook will try to init it again) before registering */
|
|
|
|
static int ath10k_core_probe_fw(struct ath10k *ar)
|
|
|
|
{
|
2013-07-16 15:38:58 +08:00
|
|
|
struct bmi_target_info target_info;
|
|
|
|
int ret = 0;
|
2013-07-16 15:38:57 +08:00
|
|
|
|
|
|
|
ret = ath10k_hif_power_up(ar);
|
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not start pci hif (%d)\n", ret);
|
2013-07-16 15:38:57 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2013-07-16 15:38:58 +08:00
|
|
|
memset(&target_info, 0, sizeof(target_info));
|
|
|
|
ret = ath10k_bmi_get_target_info(ar, &target_info);
|
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not get target info (%d)\n", ret);
|
2014-12-03 16:09:31 +08:00
|
|
|
goto err_power_down;
|
2013-07-16 15:38:58 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
ar->target_version = target_info.version;
|
|
|
|
ar->hw->wiphy->hw_version = target_info.version;
|
|
|
|
|
|
|
|
ret = ath10k_init_hw_params(ar);
|
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not get hw params (%d)\n", ret);
|
2014-12-03 16:09:31 +08:00
|
|
|
goto err_power_down;
|
2013-07-16 15:38:58 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
ret = ath10k_core_fetch_firmware_files(ar);
|
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
|
2014-12-03 16:09:31 +08:00
|
|
|
goto err_power_down;
|
2013-07-16 15:38:58 +08:00
|
|
|
}
|
|
|
|
|
2014-12-03 16:09:59 +08:00
|
|
|
ret = ath10k_core_init_firmware_features(ar);
|
|
|
|
if (ret) {
|
|
|
|
ath10k_err(ar, "fatal problem with firmware features: %d\n",
|
|
|
|
ret);
|
|
|
|
goto err_free_firmware_files;
|
|
|
|
}
|
2014-11-25 22:16:05 +08:00
|
|
|
|
2015-06-18 15:01:09 +08:00
|
|
|
ret = ath10k_swap_code_seg_init(ar);
|
|
|
|
if (ret) {
|
|
|
|
ath10k_err(ar, "failed to initialize code swap segment: %d\n",
|
|
|
|
ret);
|
|
|
|
goto err_free_firmware_files;
|
|
|
|
}
|
|
|
|
|
2013-10-09 02:45:25 +08:00
|
|
|
mutex_lock(&ar->conf_mutex);
|
|
|
|
|
2014-09-10 23:23:30 +08:00
|
|
|
ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL);
|
2013-07-16 15:38:57 +08:00
|
|
|
if (ret) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not init core (%d)\n", ret);
|
2014-12-03 16:09:31 +08:00
|
|
|
goto err_unlock;
|
2013-07-16 15:38:57 +08:00
|
|
|
}
|
|
|
|
|
2014-08-22 20:23:29 +08:00
|
|
|
ath10k_print_driver_info(ar);
|
2013-07-16 15:38:57 +08:00
|
|
|
ath10k_core_stop(ar);
|
2013-10-09 02:45:25 +08:00
|
|
|
|
|
|
|
mutex_unlock(&ar->conf_mutex);
|
|
|
|
|
2013-07-16 15:38:57 +08:00
|
|
|
ath10k_hif_power_down(ar);
|
|
|
|
return 0;
|
2014-12-03 16:09:31 +08:00
|
|
|
|
|
|
|
err_unlock:
|
|
|
|
mutex_unlock(&ar->conf_mutex);
|
|
|
|
|
2014-12-03 16:09:59 +08:00
|
|
|
err_free_firmware_files:
|
2014-12-03 16:09:31 +08:00
|
|
|
ath10k_core_free_firmware_files(ar);
|
|
|
|
|
|
|
|
err_power_down:
|
|
|
|
ath10k_hif_power_down(ar);
|
|
|
|
|
|
|
|
return ret;
|
2013-07-16 15:38:57 +08:00
|
|
|
}
|
2013-07-16 15:38:51 +08:00
|
|
|
|
2014-05-23 18:28:47 +08:00
|
|
|
static void ath10k_core_register_work(struct work_struct *work)
|
2013-07-16 15:38:51 +08:00
|
|
|
{
|
2014-05-23 18:28:47 +08:00
|
|
|
struct ath10k *ar = container_of(work, struct ath10k, register_work);
|
2013-07-16 15:38:51 +08:00
|
|
|
int status;
|
|
|
|
|
2013-07-16 15:38:57 +08:00
|
|
|
status = ath10k_core_probe_fw(ar);
|
|
|
|
if (status) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not probe fw (%d)\n", status);
|
2014-05-23 18:28:47 +08:00
|
|
|
goto err;
|
2013-07-16 15:38:57 +08:00
|
|
|
}
|
2013-07-16 15:38:51 +08:00
|
|
|
|
2013-06-13 01:52:10 +08:00
|
|
|
status = ath10k_mac_register(ar);
|
2013-07-16 15:38:57 +08:00
|
|
|
if (status) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
|
2013-07-16 15:38:58 +08:00
|
|
|
goto err_release_fw;
|
2013-07-16 15:38:57 +08:00
|
|
|
}
|
2013-06-13 01:52:10 +08:00
|
|
|
|
2014-09-04 15:13:08 +08:00
|
|
|
status = ath10k_debug_register(ar);
|
2013-06-13 01:52:10 +08:00
|
|
|
if (status) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "unable to initialize debugfs\n");
|
2013-06-13 01:52:10 +08:00
|
|
|
goto err_unregister_mac;
|
|
|
|
}
|
|
|
|
|
2014-08-02 14:12:54 +08:00
|
|
|
status = ath10k_spectral_create(ar);
|
|
|
|
if (status) {
|
2014-08-25 18:09:38 +08:00
|
|
|
ath10k_err(ar, "failed to initialize spectral\n");
|
2014-08-02 14:12:54 +08:00
|
|
|
goto err_debug_destroy;
|
|
|
|
}
|
|
|
|
|
2014-12-17 18:22:07 +08:00
|
|
|
status = ath10k_thermal_register(ar);
|
|
|
|
if (status) {
|
|
|
|
ath10k_err(ar, "could not register thermal device: %d\n",
|
|
|
|
status);
|
|
|
|
goto err_spectral_destroy;
|
|
|
|
}
|
|
|
|
|
2014-05-23 18:28:47 +08:00
|
|
|
set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
|
|
|
|
return;
|
2013-06-13 01:52:10 +08:00
|
|
|
|
2014-12-17 18:22:07 +08:00
|
|
|
err_spectral_destroy:
|
|
|
|
ath10k_spectral_destroy(ar);
|
2014-08-02 14:12:54 +08:00
|
|
|
err_debug_destroy:
|
|
|
|
ath10k_debug_destroy(ar);
|
2013-06-13 01:52:10 +08:00
|
|
|
err_unregister_mac:
|
|
|
|
ath10k_mac_unregister(ar);
|
2013-07-16 15:38:58 +08:00
|
|
|
err_release_fw:
|
|
|
|
ath10k_core_free_firmware_files(ar);
|
2014-05-23 18:28:47 +08:00
|
|
|
err:
|
2014-07-14 21:07:29 +08:00
|
|
|
/* TODO: It's probably a good idea to release device from the driver
|
|
|
|
* but calling device_release_driver() here will cause a deadlock.
|
|
|
|
*/
|
2014-05-23 18:28:47 +08:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
int ath10k_core_register(struct ath10k *ar, u32 chip_id)
|
|
|
|
{
|
|
|
|
ar->chip_id = chip_id;
|
|
|
|
queue_work(ar->workqueue, &ar->register_work);
|
|
|
|
|
|
|
|
return 0;
|
2013-06-13 01:52:10 +08:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(ath10k_core_register);
|
|
|
|
|
|
|
|
void ath10k_core_unregister(struct ath10k *ar)
|
|
|
|
{
|
2014-05-23 18:28:47 +08:00
|
|
|
cancel_work_sync(&ar->register_work);
|
|
|
|
|
|
|
|
if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
|
|
|
|
return;
|
|
|
|
|
2014-12-17 18:22:07 +08:00
|
|
|
ath10k_thermal_unregister(ar);
|
2014-08-12 23:12:17 +08:00
|
|
|
/* Stop spectral before unregistering from mac80211 to remove the
|
|
|
|
* relayfs debugfs file cleanly. Otherwise the parent debugfs tree
|
|
|
|
* would be already be free'd recursively, leading to a double free.
|
|
|
|
*/
|
|
|
|
ath10k_spectral_destroy(ar);
|
|
|
|
|
2013-06-13 01:52:10 +08:00
|
|
|
/* We must unregister from mac80211 before we stop HTC and HIF.
|
|
|
|
* Otherwise we will fail to submit commands to FW and mac80211 will be
|
|
|
|
* unhappy about callback failures. */
|
|
|
|
ath10k_mac_unregister(ar);
|
2013-09-03 16:44:03 +08:00
|
|
|
|
2014-09-10 23:23:30 +08:00
|
|
|
ath10k_testmode_destroy(ar);
|
|
|
|
|
2013-07-16 15:38:58 +08:00
|
|
|
ath10k_core_free_firmware_files(ar);
|
2013-11-05 01:18:16 +08:00
|
|
|
|
2014-09-04 15:13:08 +08:00
|
|
|
ath10k_debug_unregister(ar);
|
2013-06-13 01:52:10 +08:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(ath10k_core_unregister);
|
|
|
|
|
2014-08-07 17:03:27 +08:00
|
|
|
struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
|
2014-10-13 14:40:47 +08:00
|
|
|
enum ath10k_bus bus,
|
2015-01-24 18:14:49 +08:00
|
|
|
enum ath10k_hw_rev hw_rev,
|
2014-05-23 18:28:45 +08:00
|
|
|
const struct ath10k_hif_ops *hif_ops)
|
|
|
|
{
|
|
|
|
struct ath10k *ar;
|
2014-09-04 15:13:08 +08:00
|
|
|
int ret;
|
2014-05-23 18:28:45 +08:00
|
|
|
|
2014-08-07 17:03:27 +08:00
|
|
|
ar = ath10k_mac_create(priv_size);
|
2014-05-23 18:28:45 +08:00
|
|
|
if (!ar)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
ar->ath_common.priv = ar;
|
|
|
|
ar->ath_common.hw = ar->hw;
|
|
|
|
ar->dev = dev;
|
2015-01-24 18:14:49 +08:00
|
|
|
ar->hw_rev = hw_rev;
|
2014-05-23 18:28:45 +08:00
|
|
|
ar->hif.ops = hif_ops;
|
2014-10-13 14:40:47 +08:00
|
|
|
ar->hif.bus = bus;
|
2014-05-23 18:28:45 +08:00
|
|
|
|
2015-01-24 18:14:49 +08:00
|
|
|
switch (hw_rev) {
|
|
|
|
case ATH10K_HW_QCA988X:
|
|
|
|
ar->regs = &qca988x_regs;
|
2015-06-18 15:01:01 +08:00
|
|
|
ar->hw_values = &qca988x_values;
|
2015-01-24 18:14:49 +08:00
|
|
|
break;
|
|
|
|
case ATH10K_HW_QCA6174:
|
|
|
|
ar->regs = &qca6174_regs;
|
2015-06-18 15:01:01 +08:00
|
|
|
ar->hw_values = &qca6174_values;
|
2015-01-24 18:14:49 +08:00
|
|
|
break;
|
2015-06-18 15:01:03 +08:00
|
|
|
case ATH10K_HW_QCA99X0:
|
|
|
|
ar->regs = &qca99x0_regs;
|
|
|
|
ar->hw_values = &qca99x0_values;
|
|
|
|
break;
|
2015-01-24 18:14:49 +08:00
|
|
|
default:
|
|
|
|
ath10k_err(ar, "unsupported core hardware revision %d\n",
|
|
|
|
hw_rev);
|
|
|
|
ret = -ENOTSUPP;
|
|
|
|
goto err_free_mac;
|
|
|
|
}
|
|
|
|
|
2014-05-23 18:28:45 +08:00
|
|
|
init_completion(&ar->scan.started);
|
|
|
|
init_completion(&ar->scan.completed);
|
|
|
|
init_completion(&ar->scan.on_channel);
|
|
|
|
init_completion(&ar->target_suspend);
|
2015-03-23 23:32:53 +08:00
|
|
|
init_completion(&ar->wow.wakeup_completed);
|
2014-05-23 18:28:45 +08:00
|
|
|
|
|
|
|
init_completion(&ar->install_key_done);
|
|
|
|
init_completion(&ar->vdev_setup_done);
|
2014-12-17 18:22:26 +08:00
|
|
|
init_completion(&ar->thermal.wmi_sync);
|
2014-05-23 18:28:45 +08:00
|
|
|
|
2014-08-05 20:54:44 +08:00
|
|
|
INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
|
2014-05-23 18:28:45 +08:00
|
|
|
|
|
|
|
ar->workqueue = create_singlethread_workqueue("ath10k_wq");
|
|
|
|
if (!ar->workqueue)
|
2014-09-04 15:13:08 +08:00
|
|
|
goto err_free_mac;
|
2014-05-23 18:28:45 +08:00
|
|
|
|
2015-07-29 16:40:38 +08:00
|
|
|
ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
|
|
|
|
if (!ar->workqueue_aux)
|
|
|
|
goto err_free_wq;
|
|
|
|
|
2014-05-23 18:28:45 +08:00
|
|
|
mutex_init(&ar->conf_mutex);
|
|
|
|
spin_lock_init(&ar->data_lock);
|
|
|
|
|
|
|
|
INIT_LIST_HEAD(&ar->peers);
|
|
|
|
init_waitqueue_head(&ar->peer_mapping_wq);
|
2014-10-28 17:34:38 +08:00
|
|
|
init_waitqueue_head(&ar->htt.empty_tx_wq);
|
|
|
|
init_waitqueue_head(&ar->wmi.tx_credits_wq);
|
2014-05-23 18:28:45 +08:00
|
|
|
|
|
|
|
init_completion(&ar->offchan_tx_completed);
|
|
|
|
INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
|
|
|
|
skb_queue_head_init(&ar->offchan_tx_queue);
|
|
|
|
|
|
|
|
INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
|
|
|
|
skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
|
|
|
|
|
2014-05-23 18:28:47 +08:00
|
|
|
INIT_WORK(&ar->register_work, ath10k_core_register_work);
|
2014-05-23 18:28:45 +08:00
|
|
|
INIT_WORK(&ar->restart_work, ath10k_core_restart);
|
|
|
|
|
2014-09-04 15:13:08 +08:00
|
|
|
ret = ath10k_debug_create(ar);
|
|
|
|
if (ret)
|
2015-07-29 16:40:38 +08:00
|
|
|
goto err_free_aux_wq;
|
2014-09-04 15:13:08 +08:00
|
|
|
|
2014-05-23 18:28:45 +08:00
|
|
|
return ar;
|
|
|
|
|
2015-07-29 16:40:38 +08:00
|
|
|
err_free_aux_wq:
|
|
|
|
destroy_workqueue(ar->workqueue_aux);
|
2014-09-04 15:13:08 +08:00
|
|
|
err_free_wq:
|
|
|
|
destroy_workqueue(ar->workqueue);
|
|
|
|
|
|
|
|
err_free_mac:
|
2014-05-23 18:28:45 +08:00
|
|
|
ath10k_mac_destroy(ar);
|
2014-09-04 15:13:08 +08:00
|
|
|
|
2014-05-23 18:28:45 +08:00
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(ath10k_core_create);
|
|
|
|
|
|
|
|
void ath10k_core_destroy(struct ath10k *ar)
|
|
|
|
{
|
|
|
|
flush_workqueue(ar->workqueue);
|
|
|
|
destroy_workqueue(ar->workqueue);
|
|
|
|
|
2015-07-29 16:40:38 +08:00
|
|
|
flush_workqueue(ar->workqueue_aux);
|
|
|
|
destroy_workqueue(ar->workqueue_aux);
|
|
|
|
|
2014-09-04 15:13:08 +08:00
|
|
|
ath10k_debug_destroy(ar);
|
2015-08-28 19:51:34 +08:00
|
|
|
ath10k_wmi_free_host_mem(ar);
|
2014-05-23 18:28:45 +08:00
|
|
|
ath10k_mac_destroy(ar);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(ath10k_core_destroy);
|
|
|
|
|
2013-06-13 01:52:10 +08:00
|
|
|
MODULE_AUTHOR("Qualcomm Atheros");
|
|
|
|
MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
|
|
|
|
MODULE_LICENSE("Dual BSD/GPL");
|