2012-06-04 15:56:15 +08:00
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/*
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* FIXME correct answer depends on hmc_mode,
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* as does (on omap1) any nonzero value for config->otg port number
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*/
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2013-04-02 04:03:00 +08:00
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#if IS_ENABLED(CONFIG_USB_OMAP)
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2012-06-04 15:56:15 +08:00
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#define is_usb0_device(config) 1
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#else
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#define is_usb0_device(config) 0
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#endif
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2013-12-06 22:13:04 +08:00
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#include <linux/platform_data/usb-omap1.h>
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2012-06-04 15:56:15 +08:00
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void omap_otg_init(struct omap_usb_config *config);
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#if defined(CONFIG_USB) || defined(CONFIG_USB_MODULE)
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void omap1_usb_init(struct omap_usb_config *pdata);
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#else
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static inline void omap1_usb_init(struct omap_usb_config *pdata)
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{
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}
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#endif
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#define OMAP1_OTG_BASE 0xfffb0400
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#define OMAP1_UDC_BASE 0xfffb4000
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#define OMAP1_OHCI_BASE 0xfffba000
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#define OMAP2_OHCI_BASE 0x4805e000
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#define OMAP2_UDC_BASE 0x4805e200
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#define OMAP2_OTG_BASE 0x4805e300
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#define OTG_BASE OMAP1_OTG_BASE
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#define UDC_BASE OMAP1_UDC_BASE
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#define OMAP_OHCI_BASE OMAP1_OHCI_BASE
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/*
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* OTG and transceiver registers, for OMAPs starting with ARM926
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*/
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#define OTG_REV (OTG_BASE + 0x00)
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#define OTG_SYSCON_1 (OTG_BASE + 0x04)
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# define USB2_TRX_MODE(w) (((w)>>24)&0x07)
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# define USB1_TRX_MODE(w) (((w)>>20)&0x07)
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# define USB0_TRX_MODE(w) (((w)>>16)&0x07)
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# define OTG_IDLE_EN (1 << 15)
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# define HST_IDLE_EN (1 << 14)
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# define DEV_IDLE_EN (1 << 13)
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# define OTG_RESET_DONE (1 << 2)
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# define OTG_SOFT_RESET (1 << 1)
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#define OTG_SYSCON_2 (OTG_BASE + 0x08)
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# define OTG_EN (1 << 31)
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# define USBX_SYNCHRO (1 << 30)
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# define OTG_MST16 (1 << 29)
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# define SRP_GPDATA (1 << 28)
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# define SRP_GPDVBUS (1 << 27)
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# define SRP_GPUVBUS(w) (((w)>>24)&0x07)
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# define A_WAIT_VRISE(w) (((w)>>20)&0x07)
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# define B_ASE_BRST(w) (((w)>>16)&0x07)
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# define SRP_DPW (1 << 14)
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# define SRP_DATA (1 << 13)
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# define SRP_VBUS (1 << 12)
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# define OTG_PADEN (1 << 10)
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# define HMC_PADEN (1 << 9)
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# define UHOST_EN (1 << 8)
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# define HMC_TLLSPEED (1 << 7)
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# define HMC_TLLATTACH (1 << 6)
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# define OTG_HMC(w) (((w)>>0)&0x3f)
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#define OTG_CTRL (OTG_BASE + 0x0c)
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# define OTG_USB2_EN (1 << 29)
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# define OTG_USB2_DP (1 << 28)
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# define OTG_USB2_DM (1 << 27)
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# define OTG_USB1_EN (1 << 26)
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# define OTG_USB1_DP (1 << 25)
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# define OTG_USB1_DM (1 << 24)
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# define OTG_USB0_EN (1 << 23)
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# define OTG_USB0_DP (1 << 22)
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# define OTG_USB0_DM (1 << 21)
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# define OTG_ASESSVLD (1 << 20)
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# define OTG_BSESSEND (1 << 19)
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# define OTG_BSESSVLD (1 << 18)
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# define OTG_VBUSVLD (1 << 17)
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# define OTG_ID (1 << 16)
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# define OTG_DRIVER_SEL (1 << 15)
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# define OTG_A_SETB_HNPEN (1 << 12)
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# define OTG_A_BUSREQ (1 << 11)
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# define OTG_B_HNPEN (1 << 9)
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# define OTG_B_BUSREQ (1 << 8)
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# define OTG_BUSDROP (1 << 7)
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# define OTG_PULLDOWN (1 << 5)
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# define OTG_PULLUP (1 << 4)
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# define OTG_DRV_VBUS (1 << 3)
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# define OTG_PD_VBUS (1 << 2)
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# define OTG_PU_VBUS (1 << 1)
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# define OTG_PU_ID (1 << 0)
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#define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */
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# define DRIVER_SWITCH (1 << 15)
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# define A_VBUS_ERR (1 << 13)
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# define A_REQ_TMROUT (1 << 12)
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# define A_SRP_DETECT (1 << 11)
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# define B_HNP_FAIL (1 << 10)
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# define B_SRP_TMROUT (1 << 9)
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# define B_SRP_DONE (1 << 8)
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# define B_SRP_STARTED (1 << 7)
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# define OPRT_CHG (1 << 0)
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#define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */
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// same bits as in IRQ_EN
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#define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */
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# define OTGVPD (1 << 14)
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# define OTGVPU (1 << 13)
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# define OTGPUID (1 << 12)
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# define USB2VDR (1 << 10)
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# define USB2PDEN (1 << 9)
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# define USB2PUEN (1 << 8)
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# define USB1VDR (1 << 6)
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# define USB1PDEN (1 << 5)
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# define USB1PUEN (1 << 4)
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# define USB0VDR (1 << 2)
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# define USB0PDEN (1 << 1)
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# define USB0PUEN (1 << 0)
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#define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */
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#define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */
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/*-------------------------------------------------------------------------*/
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/* OMAP1 */
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#define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064)
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# define CONF_USB2_UNI_R (1 << 8)
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# define CONF_USB1_UNI_R (1 << 7)
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# define CONF_USB_PORT0_R(x) (((x)>>4)&0x7)
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# define CONF_USB0_ISOLATE_R (1 << 3)
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# define CONF_USB_PWRDN_DM_R (1 << 2)
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# define CONF_USB_PWRDN_DP_R (1 << 1)
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