2015-09-10 04:49:53 +08:00
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/*
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* Copyright (C) 2015 Microchip Technology
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/phy.h>
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#include <linux/microchipphy.h>
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#define DRIVER_AUTHOR "WOOJUNG HUH <woojung.huh@microchip.com>"
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#define DRIVER_DESC "Microchip LAN88XX PHY driver"
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struct lan88xx_priv {
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int chip_id;
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int chip_rev;
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__u32 wolopts;
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};
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static int lan88xx_phy_config_intr(struct phy_device *phydev)
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{
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int rc;
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
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/* unmask all source and clear them before enable */
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rc = phy_write(phydev, LAN88XX_INT_MASK, 0x7FFF);
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rc = phy_read(phydev, LAN88XX_INT_STS);
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rc = phy_write(phydev, LAN88XX_INT_MASK,
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LAN88XX_INT_MASK_MDINTPIN_EN_ |
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LAN88XX_INT_MASK_LINK_CHANGE_);
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} else {
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rc = phy_write(phydev, LAN88XX_INT_MASK, 0);
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}
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return rc < 0 ? rc : 0;
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}
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static int lan88xx_phy_ack_interrupt(struct phy_device *phydev)
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{
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int rc = phy_read(phydev, LAN88XX_INT_STS);
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return rc < 0 ? rc : 0;
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}
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2016-09-18 16:26:34 +08:00
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static int lan88xx_suspend(struct phy_device *phydev)
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2015-09-10 04:49:53 +08:00
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{
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struct lan88xx_priv *priv = phydev->priv;
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/* do not power down PHY when WOL is enabled */
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if (!priv->wolopts)
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genphy_suspend(phydev);
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return 0;
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}
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static int lan88xx_probe(struct phy_device *phydev)
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{
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2016-01-07 03:11:16 +08:00
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struct device *dev = &phydev->mdio.dev;
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2015-09-10 04:49:53 +08:00
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struct lan88xx_priv *priv;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->wolopts = 0;
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/* these values can be used to identify internal PHY */
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2016-01-07 03:11:12 +08:00
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priv->chip_id = phy_read_mmd_indirect(phydev, LAN88XX_MMD3_CHIP_ID, 3);
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2015-09-10 04:49:53 +08:00
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priv->chip_rev = phy_read_mmd_indirect(phydev, LAN88XX_MMD3_CHIP_REV,
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2016-01-07 03:11:12 +08:00
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3);
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2015-09-10 04:49:53 +08:00
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phydev->priv = priv;
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return 0;
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}
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static void lan88xx_remove(struct phy_device *phydev)
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{
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2016-01-07 03:11:16 +08:00
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struct device *dev = &phydev->mdio.dev;
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2015-09-10 04:49:53 +08:00
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struct lan88xx_priv *priv = phydev->priv;
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if (priv)
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devm_kfree(dev, priv);
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}
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static int lan88xx_set_wol(struct phy_device *phydev,
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struct ethtool_wolinfo *wol)
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{
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struct lan88xx_priv *priv = phydev->priv;
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priv->wolopts = wol->wolopts;
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return 0;
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}
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2016-11-18 06:10:02 +08:00
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static void lan88xx_set_mdix(struct phy_device *phydev)
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{
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int buf;
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int val;
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2016-11-29 17:46:49 +08:00
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switch (phydev->mdix_ctrl) {
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2016-11-18 06:10:02 +08:00
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case ETH_TP_MDI:
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val = LAN88XX_EXT_MODE_CTRL_MDI_;
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break;
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case ETH_TP_MDI_X:
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val = LAN88XX_EXT_MODE_CTRL_MDI_X_;
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break;
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case ETH_TP_MDI_AUTO:
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val = LAN88XX_EXT_MODE_CTRL_AUTO_MDIX_;
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break;
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default:
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return;
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}
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phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS, LAN88XX_EXT_PAGE_SPACE_1);
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buf = phy_read(phydev, LAN88XX_EXT_MODE_CTRL);
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buf &= ~LAN88XX_EXT_MODE_CTRL_MDIX_MASK_;
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buf |= val;
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phy_write(phydev, LAN88XX_EXT_MODE_CTRL, buf);
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phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS, LAN88XX_EXT_PAGE_SPACE_0);
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}
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static int lan88xx_config_aneg(struct phy_device *phydev)
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{
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lan88xx_set_mdix(phydev);
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return genphy_config_aneg(phydev);
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}
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2015-09-10 04:49:53 +08:00
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static struct phy_driver microchip_phy_driver[] = {
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{
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.phy_id = 0x0007c130,
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.phy_id_mask = 0xfffffff0,
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.name = "Microchip LAN88xx",
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net: phy: phy drivers should not set SUPPORTED_[Asym_]Pause
Instead of having individual PHY drivers set the SUPPORTED_Pause and
SUPPORTED_Asym_Pause flags, phylib itself should set those flags,
unless there is a hardware erratum or other special case. During
autonegotiation, the PHYs will determine whether to enable pause
frame support.
Pause frames are a feature that is supported by the MAC. It is the MAC
that generates the frames and that processes them. The PHY can only be
configured to allow them to pass through.
This commit also effectively reverts the recently applied c7a61319
("net: phy: dp83848: Support ethernet pause frames").
So the new process is:
1) Unless the PHY driver overrides it, phylib sets the SUPPORTED_Pause
and SUPPORTED_AsymPause bits in phydev->supported. This indicates that
the PHY supports pause frames.
2) The MAC driver checks phydev->supported before it calls phy_start().
If (SUPPORTED_Pause | SUPPORTED_AsymPause) is set, then the MAC driver
sets those bits in phydev->advertising, if it wants to enable pause
frame support.
3) When the link state changes, the MAC driver checks phydev->pause and
phydev->asym_pause, If the bits are set, then it enables the corresponding
features in the MAC. The algorithm is:
if (phydev->pause)
The MAC should be programmed to receive and honor
pause frames it receives, i.e. enable receive flow control.
if (phydev->pause != phydev->asym_pause)
The MAC should be programmed to transmit pause
frames when needed, i.e. enable transmit flow control.
Signed-off-by: Timur Tabi <timur@codeaurora.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-08 03:20:51 +08:00
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.features = PHY_GBIT_FEATURES,
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2015-09-10 04:49:53 +08:00
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.flags = PHY_HAS_INTERRUPT | PHY_HAS_MAGICANEG,
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.probe = lan88xx_probe,
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.remove = lan88xx_remove,
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.config_init = genphy_config_init,
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2016-11-18 06:10:02 +08:00
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.config_aneg = lan88xx_config_aneg,
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2015-09-10 04:49:53 +08:00
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.read_status = genphy_read_status,
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.ack_interrupt = lan88xx_phy_ack_interrupt,
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.config_intr = lan88xx_phy_config_intr,
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.suspend = lan88xx_suspend,
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.resume = genphy_resume,
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.set_wol = lan88xx_set_wol,
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} };
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module_phy_driver(microchip_phy_driver);
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static struct mdio_device_id __maybe_unused microchip_tbl[] = {
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{ 0x0007c130, 0xfffffff0 },
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{ }
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};
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MODULE_DEVICE_TABLE(mdio, microchip_tbl);
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MODULE_AUTHOR(DRIVER_AUTHOR);
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MODULE_DESCRIPTION(DRIVER_DESC);
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MODULE_LICENSE("GPL");
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