71 lines
1.8 KiB
C
71 lines
1.8 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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//
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// Copyright (c) 2021 MediaTek Inc.
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// Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
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#include <linux/clk-provider.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include "clk-mtk.h"
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#include "clk-gate.h"
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#include <dt-bindings/clock/mt8192-clk.h>
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static const struct mtk_gate_regs img_cg_regs = {
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.set_ofs = 0x4,
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.clr_ofs = 0x8,
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.sta_ofs = 0x0,
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};
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#define GATE_IMG(_id, _name, _parent, _shift) \
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GATE_MTK(_id, _name, _parent, &img_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
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static const struct mtk_gate img_clks[] = {
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GATE_IMG(CLK_IMG_LARB9, "img_larb9", "img1_sel", 0),
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GATE_IMG(CLK_IMG_LARB10, "img_larb10", "img1_sel", 1),
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GATE_IMG(CLK_IMG_DIP, "img_dip", "img1_sel", 2),
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GATE_IMG(CLK_IMG_GALS, "img_gals", "img1_sel", 12),
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};
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static const struct mtk_gate img2_clks[] = {
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GATE_IMG(CLK_IMG2_LARB11, "img2_larb11", "img1_sel", 0),
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GATE_IMG(CLK_IMG2_LARB12, "img2_larb12", "img1_sel", 1),
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GATE_IMG(CLK_IMG2_MFB, "img2_mfb", "img1_sel", 6),
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GATE_IMG(CLK_IMG2_WPE, "img2_wpe", "img1_sel", 7),
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GATE_IMG(CLK_IMG2_MSS, "img2_mss", "img1_sel", 8),
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GATE_IMG(CLK_IMG2_GALS, "img2_gals", "img1_sel", 12),
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};
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static const struct mtk_clk_desc img_desc = {
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.clks = img_clks,
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.num_clks = ARRAY_SIZE(img_clks),
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};
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static const struct mtk_clk_desc img2_desc = {
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.clks = img2_clks,
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.num_clks = ARRAY_SIZE(img2_clks),
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};
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static const struct of_device_id of_match_clk_mt8192_img[] = {
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{
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.compatible = "mediatek,mt8192-imgsys",
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.data = &img_desc,
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}, {
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.compatible = "mediatek,mt8192-imgsys2",
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.data = &img2_desc,
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}, {
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/* sentinel */
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}
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};
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static struct platform_driver clk_mt8192_img_drv = {
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.probe = mtk_clk_simple_probe,
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.driver = {
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.name = "clk-mt8192-img",
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.of_match_table = of_match_clk_mt8192_img,
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},
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};
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builtin_platform_driver(clk_mt8192_img_drv);
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