2008-06-20 14:18:09 +08:00
|
|
|
#ifndef ARCH_X86_CPU_H
|
|
|
|
#define ARCH_X86_CPU_H
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
/* attempt to consolidate cpu attributes */
|
|
|
|
struct cpu_dev {
|
2009-03-23 04:36:51 +08:00
|
|
|
const char *c_vendor;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
/* some have two possibilities for cpuid string */
|
2009-03-23 04:36:51 +08:00
|
|
|
const char *c_ident[2];
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2009-03-23 04:36:51 +08:00
|
|
|
void (*c_early_init)(struct cpuinfo_x86 *);
|
2011-08-06 02:01:16 +08:00
|
|
|
void (*c_bsp_init)(struct cpuinfo_x86 *);
|
2009-03-23 04:36:51 +08:00
|
|
|
void (*c_init)(struct cpuinfo_x86 *);
|
|
|
|
void (*c_identify)(struct cpuinfo_x86 *);
|
x86/tlb_info: get last level TLB entry number of CPU
For 4KB pages, x86 CPU has 2 or 1 level TLB, first level is data TLB and
instruction TLB, second level is shared TLB for both data and instructions.
For hupe page TLB, usually there is just one level and seperated by 2MB/4MB
and 1GB.
Although each levels TLB size is important for performance tuning, but for
genernal and rude optimizing, last level TLB entry number is suitable. And
in fact, last level TLB always has the biggest entry number.
This patch will get the biggest TLB entry number and use it in furture TLB
optimizing.
Accroding Borislav's suggestion, except tlb_ll[i/d]_* array, other
function and data will be released after system boot up.
For all kinds of x86 vendor friendly, vendor specific code was moved to its
specific files.
Signed-off-by: Alex Shi <alex.shi@intel.com>
Link: http://lkml.kernel.org/r/1340845344-27557-2-git-send-email-alex.shi@intel.com
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2012-06-28 09:02:16 +08:00
|
|
|
void (*c_detect_tlb)(struct cpuinfo_x86 *);
|
2015-07-21 05:47:58 +08:00
|
|
|
void (*c_bsp_resume)(struct cpuinfo_x86 *);
|
2009-03-23 04:36:51 +08:00
|
|
|
int c_x86_vendor;
|
2013-10-21 16:35:20 +08:00
|
|
|
#ifdef CONFIG_X86_32
|
|
|
|
/* Optional vendor specific routine to obtain the cache size. */
|
|
|
|
unsigned int (*legacy_cache_size)(struct cpuinfo_x86 *,
|
|
|
|
unsigned int);
|
|
|
|
|
|
|
|
/* Family/stepping-based lookup table for model names. */
|
|
|
|
struct legacy_cpu_model_info {
|
|
|
|
int family;
|
|
|
|
const char *model_names[16];
|
|
|
|
} legacy_models[5];
|
|
|
|
#endif
|
2005-04-17 06:20:36 +08:00
|
|
|
};
|
|
|
|
|
x86/tlb_info: get last level TLB entry number of CPU
For 4KB pages, x86 CPU has 2 or 1 level TLB, first level is data TLB and
instruction TLB, second level is shared TLB for both data and instructions.
For hupe page TLB, usually there is just one level and seperated by 2MB/4MB
and 1GB.
Although each levels TLB size is important for performance tuning, but for
genernal and rude optimizing, last level TLB entry number is suitable. And
in fact, last level TLB always has the biggest entry number.
This patch will get the biggest TLB entry number and use it in furture TLB
optimizing.
Accroding Borislav's suggestion, except tlb_ll[i/d]_* array, other
function and data will be released after system boot up.
For all kinds of x86 vendor friendly, vendor specific code was moved to its
specific files.
Signed-off-by: Alex Shi <alex.shi@intel.com>
Link: http://lkml.kernel.org/r/1340845344-27557-2-git-send-email-alex.shi@intel.com
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2012-06-28 09:02:16 +08:00
|
|
|
struct _tlb_table {
|
|
|
|
unsigned char descriptor;
|
|
|
|
char tlb_type;
|
|
|
|
unsigned int entries;
|
|
|
|
/* unsigned int ways; */
|
|
|
|
char info[128];
|
|
|
|
};
|
|
|
|
|
2008-09-05 03:09:45 +08:00
|
|
|
#define cpu_dev_register(cpu_devX) \
|
2009-03-12 20:08:49 +08:00
|
|
|
static const struct cpu_dev *const __cpu_dev_##cpu_devX __used \
|
2008-09-05 03:09:45 +08:00
|
|
|
__attribute__((__section__(".x86_cpu_dev.init"))) = \
|
|
|
|
&cpu_devX;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2009-03-12 20:08:49 +08:00
|
|
|
extern const struct cpu_dev *const __x86_cpu_dev_start[],
|
|
|
|
*const __x86_cpu_dev_end[];
|
x86: use ELF section to list CPU vendor specific code
Replace the hardcoded list of initialization functions for each CPU
vendor by a list in an ELF section, which is read at initialization in
arch/x86/kernel/cpu/cpu.c to fill the cpu_devs[] array. The ELF
section, named .x86cpuvendor.init, is reclaimed after boot, and
contains entries of type "struct cpu_vendor_dev" which associates a
vendor number with a pointer to a "struct cpu_dev" structure.
This first modification allows to remove all the VENDOR_init_cpu()
functions.
This patch also removes the hardcoded calls to early_init_amd() and
early_init_intel(). Instead, we add a "c_early_init" member to the
cpu_dev structure, which is then called if not NULL by the generic CPU
initialization code. Unfortunately, in early_cpu_detect(), this_cpu is
not yet set, so we have to use the cpu_devs[] array directly.
This patch is part of the Linux Tiny project, and is needed for
further patch that will allow to disable compilation of unused CPU
support code.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-02-15 19:00:23 +08:00
|
|
|
|
2010-09-21 09:01:46 +08:00
|
|
|
extern void get_cpu_cap(struct cpuinfo_x86 *c);
|
2009-11-21 21:01:45 +08:00
|
|
|
extern void cpu_detect_cache_sizes(struct cpuinfo_x86 *c);
|
2011-11-30 03:14:43 +08:00
|
|
|
#endif /* ARCH_X86_CPU_H */
|