2005-04-17 06:20:36 +08:00
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/*
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* Derived from arch/i386/kernel/irq.c
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* Copyright (C) 1992 Linus Torvalds
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* Adapted from arch/i386 by Gary Thomas
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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2005-11-09 15:07:45 +08:00
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* Updated and modified by Cort Dougan <cort@fsmlabs.com>
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* Copyright (C) 1996-2001 Cort Dougan
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2005-04-17 06:20:36 +08:00
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* Adapted for Power Macintosh by Paul Mackerras
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* Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
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2005-11-09 15:07:45 +08:00
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*
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2005-04-17 06:20:36 +08:00
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* This file contains the code used by various IRQ handling routines:
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* asking for different IRQ's should be done through these routines
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* instead of just grabbing them. Thus setups with different IRQ numbers
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* shouldn't result in any weird surprises, and installing new handlers
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* should be easier.
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2005-11-09 15:07:45 +08:00
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*
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* The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
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* interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
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* mask register (of which only 16 are defined), hence the weird shifting
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* and complement of the cached_irq_mask. I want to be able to stuff
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* this right into the SIU SMASK register.
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* Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
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* to reduce code space and undefined function references.
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2005-04-17 06:20:36 +08:00
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*/
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2006-07-03 19:36:01 +08:00
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#undef DEBUG
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2005-04-17 06:20:36 +08:00
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#include <linux/module.h>
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#include <linux/threads.h>
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#include <linux/kernel_stat.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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2005-11-09 15:07:45 +08:00
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#include <linux/ptrace.h>
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2005-04-17 06:20:36 +08:00
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/timex.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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2005-11-09 15:07:45 +08:00
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#include <linux/seq_file.h>
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#include <linux/cpumask.h>
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2005-04-17 06:20:36 +08:00
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#include <linux/profile.h>
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#include <linux/bitops.h>
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2006-07-03 19:36:01 +08:00
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#include <linux/list.h>
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#include <linux/radix-tree.h>
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#include <linux/mutex.h>
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#include <linux/bootmem.h>
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2006-07-28 02:17:25 +08:00
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#include <linux/pci.h>
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2007-08-28 16:47:57 +08:00
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#include <linux/debugfs.h>
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perf: Do the big rename: Performance Counters -> Performance Events
Bye-bye Performance Counters, welcome Performance Events!
In the past few months the perfcounters subsystem has grown out its
initial role of counting hardware events, and has become (and is
becoming) a much broader generic event enumeration, reporting, logging,
monitoring, analysis facility.
Naming its core object 'perf_counter' and naming the subsystem
'perfcounters' has become more and more of a misnomer. With pending
code like hw-breakpoints support the 'counter' name is less and
less appropriate.
All in one, we've decided to rename the subsystem to 'performance
events' and to propagate this rename through all fields, variables
and API names. (in an ABI compatible fashion)
The word 'event' is also a bit shorter than 'counter' - which makes
it slightly more convenient to write/handle as well.
Thanks goes to Stephane Eranian who first observed this misnomer and
suggested a rename.
User-space tooling and ABI compatibility is not affected - this patch
should be function-invariant. (Also, defconfigs were not touched to
keep the size down.)
This patch has been generated via the following script:
FILES=$(find * -type f | grep -vE 'oprofile|[^K]config')
sed -i \
-e 's/PERF_EVENT_/PERF_RECORD_/g' \
-e 's/PERF_COUNTER/PERF_EVENT/g' \
-e 's/perf_counter/perf_event/g' \
-e 's/nb_counters/nb_events/g' \
-e 's/swcounter/swevent/g' \
-e 's/tpcounter_event/tp_event/g' \
$FILES
for N in $(find . -name perf_counter.[ch]); do
M=$(echo $N | sed 's/perf_counter/perf_event/g')
mv $N $M
done
FILES=$(find . -name perf_event.*)
sed -i \
-e 's/COUNTER_MASK/REG_MASK/g' \
-e 's/COUNTER/EVENT/g' \
-e 's/\<event\>/event_id/g' \
-e 's/counter/event/g' \
-e 's/Counter/Event/g' \
$FILES
... to keep it as correct as possible. This script can also be
used by anyone who has pending perfcounters patches - it converts
a Linux kernel tree over to the new naming. We tried to time this
change to the point in time where the amount of pending patches
is the smallest: the end of the merge window.
Namespace clashes were fixed up in a preparatory patch - and some
stylistic fallout will be fixed up in a subsequent patch.
( NOTE: 'counters' are still the proper terminology when we deal
with hardware registers - and these sed scripts are a bit
over-eager in renaming them. I've undone some of that, but
in case there's something left where 'counter' would be
better than 'event' we can undo that on an individual basis
instead of touching an otherwise nicely automated patch. )
Suggested-by: Stephane Eranian <eranian@google.com>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: Paul Mackerras <paulus@samba.org>
Reviewed-by: Arjan van de Ven <arjan@linux.intel.com>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: David Howells <dhowells@redhat.com>
Cc: Kyle McMartin <kyle@mcmartin.ca>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: <linux-arch@vger.kernel.org>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-09-21 18:02:48 +08:00
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#include <linux/perf_event.h>
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2005-04-17 06:20:36 +08:00
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#include <asm/uaccess.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/pgtable.h>
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#include <asm/irq.h>
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#include <asm/cache.h>
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#include <asm/prom.h>
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#include <asm/ptrace.h>
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#include <asm/machdep.h>
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2006-07-03 19:36:01 +08:00
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#include <asm/udbg.h>
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[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
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#ifdef CONFIG_PPC64
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2005-04-17 06:20:36 +08:00
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#include <asm/paca.h>
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[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
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#include <asm/firmware.h>
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2007-05-01 05:01:07 +08:00
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#include <asm/lv1call.h>
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2005-11-09 15:07:45 +08:00
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#endif
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2005-04-17 06:20:36 +08:00
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2005-11-10 15:38:46 +08:00
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int __irq_offset_value;
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2005-11-09 15:07:45 +08:00
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static int ppc_spurious_interrupts;
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#ifdef CONFIG_PPC32
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2006-07-03 17:32:51 +08:00
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EXPORT_SYMBOL(__irq_offset_value);
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atomic_t ppc_n_lost_interrupts;
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2005-11-09 15:07:45 +08:00
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#ifdef CONFIG_TAU_INT
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extern int tau_initialized;
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extern int tau_interrupts(int);
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#endif
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2006-07-03 17:32:51 +08:00
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#endif /* CONFIG_PPC32 */
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2005-11-09 15:07:45 +08:00
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#ifdef CONFIG_PPC64
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2005-04-17 06:20:36 +08:00
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EXPORT_SYMBOL(irq_desc);
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int distribute_irqs = 1;
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[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
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2008-05-15 11:49:44 +08:00
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static inline notrace unsigned long get_hard_enabled(void)
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2006-11-11 05:32:40 +08:00
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{
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unsigned long enabled;
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__asm__ __volatile__("lbz %0,%1(13)"
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: "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled)));
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return enabled;
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}
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2008-05-15 11:49:44 +08:00
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static inline notrace void set_soft_enabled(unsigned long enable)
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2006-11-11 05:32:40 +08:00
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{
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__asm__ __volatile__("stb %0,%1(13)"
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: : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled)));
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}
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2008-05-15 11:49:44 +08:00
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notrace void raw_local_irq_restore(unsigned long en)
|
[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
|
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{
|
2006-11-11 05:32:40 +08:00
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/*
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* get_paca()->soft_enabled = en;
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* Is it ever valid to use local_irq_restore(0) when soft_enabled is 1?
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* That was allowed before, and in such a case we do need to take care
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* that gcc will set soft_enabled directly via r13, not choose to use
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* an intermediate register, lest we're preempted to a different cpu.
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*/
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set_soft_enabled(en);
|
[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
|
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|
if (!en)
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return;
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|
|
2009-06-03 05:17:45 +08:00
|
|
|
#ifdef CONFIG_PPC_STD_MMU_64
|
[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
|
|
|
if (firmware_has_feature(FW_FEATURE_ISERIES)) {
|
2006-11-11 05:32:40 +08:00
|
|
|
/*
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|
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* Do we need to disable preemption here? Not really: in the
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* unlikely event that we're preempted to a different cpu in
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* between getting r13, loading its lppaca_ptr, and loading
|
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|
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* its any_int, we might call iseries_handle_interrupts without
|
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* an interrupt pending on the new cpu, but that's no disaster,
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* is it? And the business of preempting us off the old cpu
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* would itself involve a local_irq_restore which handles the
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* interrupt to that cpu.
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*
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* But use "local_paca->lppaca_ptr" instead of "get_lppaca()"
|
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* to avoid any preemption checking added into get_paca().
|
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*/
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|
if (local_paca->lppaca_ptr->int_dword.any_int)
|
[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
|
|
|
iseries_handle_interrupts();
|
|
|
|
|
}
|
2009-06-03 05:17:45 +08:00
|
|
|
#endif /* CONFIG_PPC_STD_MMU_64 */
|
[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
|
|
|
|
perf: Do the big rename: Performance Counters -> Performance Events
Bye-bye Performance Counters, welcome Performance Events!
In the past few months the perfcounters subsystem has grown out its
initial role of counting hardware events, and has become (and is
becoming) a much broader generic event enumeration, reporting, logging,
monitoring, analysis facility.
Naming its core object 'perf_counter' and naming the subsystem
'perfcounters' has become more and more of a misnomer. With pending
code like hw-breakpoints support the 'counter' name is less and
less appropriate.
All in one, we've decided to rename the subsystem to 'performance
events' and to propagate this rename through all fields, variables
and API names. (in an ABI compatible fashion)
The word 'event' is also a bit shorter than 'counter' - which makes
it slightly more convenient to write/handle as well.
Thanks goes to Stephane Eranian who first observed this misnomer and
suggested a rename.
User-space tooling and ABI compatibility is not affected - this patch
should be function-invariant. (Also, defconfigs were not touched to
keep the size down.)
This patch has been generated via the following script:
FILES=$(find * -type f | grep -vE 'oprofile|[^K]config')
sed -i \
-e 's/PERF_EVENT_/PERF_RECORD_/g' \
-e 's/PERF_COUNTER/PERF_EVENT/g' \
-e 's/perf_counter/perf_event/g' \
-e 's/nb_counters/nb_events/g' \
-e 's/swcounter/swevent/g' \
-e 's/tpcounter_event/tp_event/g' \
$FILES
for N in $(find . -name perf_counter.[ch]); do
M=$(echo $N | sed 's/perf_counter/perf_event/g')
mv $N $M
done
FILES=$(find . -name perf_event.*)
sed -i \
-e 's/COUNTER_MASK/REG_MASK/g' \
-e 's/COUNTER/EVENT/g' \
-e 's/\<event\>/event_id/g' \
-e 's/counter/event/g' \
-e 's/Counter/Event/g' \
$FILES
... to keep it as correct as possible. This script can also be
used by anyone who has pending perfcounters patches - it converts
a Linux kernel tree over to the new naming. We tried to time this
change to the point in time where the amount of pending patches
is the smallest: the end of the merge window.
Namespace clashes were fixed up in a preparatory patch - and some
stylistic fallout will be fixed up in a subsequent patch.
( NOTE: 'counters' are still the proper terminology when we deal
with hardware registers - and these sed scripts are a bit
over-eager in renaming them. I've undone some of that, but
in case there's something left where 'counter' would be
better than 'event' we can undo that on an individual basis
instead of touching an otherwise nicely automated patch. )
Suggested-by: Stephane Eranian <eranian@google.com>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: Paul Mackerras <paulus@samba.org>
Reviewed-by: Arjan van de Ven <arjan@linux.intel.com>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: David Howells <dhowells@redhat.com>
Cc: Kyle McMartin <kyle@mcmartin.ca>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: <linux-arch@vger.kernel.org>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-09-21 18:02:48 +08:00
|
|
|
if (test_perf_event_pending()) {
|
|
|
|
|
clear_perf_event_pending();
|
|
|
|
|
perf_event_do_pending();
|
2009-03-16 18:00:00 +08:00
|
|
|
}
|
2009-01-09 13:52:19 +08:00
|
|
|
|
2006-11-11 05:32:40 +08:00
|
|
|
/*
|
|
|
|
|
* if (get_paca()->hard_enabled) return;
|
|
|
|
|
* But again we need to take care that gcc gets hard_enabled directly
|
|
|
|
|
* via r13, not choose to use an intermediate register, lest we're
|
|
|
|
|
* preempted to a different cpu in between the two instructions.
|
|
|
|
|
*/
|
|
|
|
|
if (get_hard_enabled())
|
[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
|
|
|
return;
|
2006-11-11 05:32:40 +08:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Need to hard-enable interrupts here. Since currently disabled,
|
|
|
|
|
* no need to take further asm precautions against preemption; but
|
|
|
|
|
* use local_paca instead of get_paca() to avoid preemption checking.
|
|
|
|
|
*/
|
|
|
|
|
local_paca->hard_enabled = en;
|
[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
|
|
|
if ((int)mfspr(SPRN_DEC) < 0)
|
|
|
|
|
mtspr(SPRN_DEC, 1);
|
2007-05-01 05:01:07 +08:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Force the delivery of pending soft-disabled interrupts on PS3.
|
|
|
|
|
* Any HV call will have this side effect.
|
|
|
|
|
*/
|
|
|
|
|
if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
|
|
|
|
|
u64 tmp;
|
|
|
|
|
lv1_get_version_info(&tmp);
|
|
|
|
|
}
|
|
|
|
|
|
2007-05-11 13:22:45 +08:00
|
|
|
__hard_irq_enable();
|
[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-04 14:47:49 +08:00
|
|
|
}
|
2008-04-17 12:35:01 +08:00
|
|
|
EXPORT_SYMBOL(raw_local_irq_restore);
|
2005-11-09 15:07:45 +08:00
|
|
|
#endif /* CONFIG_PPC64 */
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
int show_interrupts(struct seq_file *p, void *v)
|
|
|
|
|
{
|
2005-11-09 15:07:45 +08:00
|
|
|
int i = *(loff_t *)v, j;
|
|
|
|
|
struct irqaction *action;
|
2009-03-10 22:45:54 +08:00
|
|
|
struct irq_desc *desc;
|
2005-04-17 06:20:36 +08:00
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
|
|
if (i == 0) {
|
2005-11-09 15:07:45 +08:00
|
|
|
seq_puts(p, " ");
|
|
|
|
|
for_each_online_cpu(j)
|
|
|
|
|
seq_printf(p, "CPU%d ", j);
|
2005-04-17 06:20:36 +08:00
|
|
|
seq_putc(p, '\n');
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (i < NR_IRQS) {
|
|
|
|
|
desc = get_irq_desc(i);
|
|
|
|
|
spin_lock_irqsave(&desc->lock, flags);
|
|
|
|
|
action = desc->action;
|
|
|
|
|
if (!action || !action->handler)
|
|
|
|
|
goto skip;
|
|
|
|
|
seq_printf(p, "%3d: ", i);
|
|
|
|
|
#ifdef CONFIG_SMP
|
2005-11-09 15:07:45 +08:00
|
|
|
for_each_online_cpu(j)
|
2009-01-11 16:29:15 +08:00
|
|
|
seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
|
2005-04-17 06:20:36 +08:00
|
|
|
#else
|
|
|
|
|
seq_printf(p, "%10u ", kstat_irqs(i));
|
|
|
|
|
#endif /* CONFIG_SMP */
|
[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 17:24:36 +08:00
|
|
|
if (desc->chip)
|
|
|
|
|
seq_printf(p, " %s ", desc->chip->typename);
|
2005-04-17 06:20:36 +08:00
|
|
|
else
|
2005-11-09 15:07:45 +08:00
|
|
|
seq_puts(p, " None ");
|
2005-04-17 06:20:36 +08:00
|
|
|
seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge ");
|
2005-11-09 15:07:45 +08:00
|
|
|
seq_printf(p, " %s", action->name);
|
|
|
|
|
for (action = action->next; action; action = action->next)
|
2005-04-17 06:20:36 +08:00
|
|
|
seq_printf(p, ", %s", action->name);
|
|
|
|
|
seq_putc(p, '\n');
|
|
|
|
|
skip:
|
|
|
|
|
spin_unlock_irqrestore(&desc->lock, flags);
|
2005-11-09 15:07:45 +08:00
|
|
|
} else if (i == NR_IRQS) {
|
2008-08-02 00:44:11 +08:00
|
|
|
#if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT)
|
2005-11-09 15:07:45 +08:00
|
|
|
if (tau_initialized){
|
|
|
|
|
seq_puts(p, "TAU: ");
|
2006-03-23 19:01:05 +08:00
|
|
|
for_each_online_cpu(j)
|
|
|
|
|
seq_printf(p, "%10u ", tau_interrupts(j));
|
2005-11-09 15:07:45 +08:00
|
|
|
seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
|
|
|
|
|
}
|
2008-08-02 00:44:11 +08:00
|
|
|
#endif /* CONFIG_PPC32 && CONFIG_TAU_INT*/
|
2005-04-17 06:20:36 +08:00
|
|
|
seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts);
|
2005-11-09 15:07:45 +08:00
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
|
|
|
void fixup_irqs(cpumask_t map)
|
|
|
|
|
{
|
|
|
|
|
unsigned int irq;
|
|
|
|
|
static int warned;
|
|
|
|
|
|
|
|
|
|
for_each_irq(irq) {
|
|
|
|
|
cpumask_t mask;
|
|
|
|
|
|
|
|
|
|
if (irq_desc[irq].status & IRQ_PER_CPU)
|
|
|
|
|
continue;
|
|
|
|
|
|
2009-01-13 07:27:13 +08:00
|
|
|
cpumask_and(&mask, irq_desc[irq].affinity, &map);
|
2005-04-17 06:20:36 +08:00
|
|
|
if (any_online_cpu(mask) == NR_CPUS) {
|
|
|
|
|
printk("Breaking affinity for irq %i\n", irq);
|
|
|
|
|
mask = map;
|
|
|
|
|
}
|
[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 17:24:36 +08:00
|
|
|
if (irq_desc[irq].chip->set_affinity)
|
2008-12-13 18:50:26 +08:00
|
|
|
irq_desc[irq].chip->set_affinity(irq, &mask);
|
2005-04-17 06:20:36 +08:00
|
|
|
else if (irq_desc[irq].action && !(warned++))
|
|
|
|
|
printk("Cannot set affinity for irq %i\n", irq);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
local_irq_enable();
|
|
|
|
|
mdelay(1);
|
|
|
|
|
local_irq_disable();
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
2009-04-28 09:57:43 +08:00
|
|
|
#ifdef CONFIG_IRQSTACKS
|
|
|
|
|
static inline void handle_one_irq(unsigned int irq)
|
|
|
|
|
{
|
|
|
|
|
struct thread_info *curtp, *irqtp;
|
|
|
|
|
unsigned long saved_sp_limit;
|
|
|
|
|
struct irq_desc *desc;
|
|
|
|
|
|
|
|
|
|
/* Switch to the irq stack to handle this */
|
|
|
|
|
curtp = current_thread_info();
|
|
|
|
|
irqtp = hardirq_ctx[smp_processor_id()];
|
|
|
|
|
|
|
|
|
|
if (curtp == irqtp) {
|
|
|
|
|
/* We're already on the irq stack, just handle it */
|
|
|
|
|
generic_handle_irq(irq);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
desc = irq_desc + irq;
|
|
|
|
|
saved_sp_limit = current->thread.ksp_limit;
|
|
|
|
|
|
|
|
|
|
irqtp->task = curtp->task;
|
|
|
|
|
irqtp->flags = 0;
|
|
|
|
|
|
|
|
|
|
/* Copy the softirq bits in preempt_count so that the
|
|
|
|
|
* softirq checks work in the hardirq context. */
|
|
|
|
|
irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) |
|
|
|
|
|
(curtp->preempt_count & SOFTIRQ_MASK);
|
|
|
|
|
|
|
|
|
|
current->thread.ksp_limit = (unsigned long)irqtp +
|
|
|
|
|
_ALIGN_UP(sizeof(struct thread_info), 16);
|
|
|
|
|
|
2009-04-22 23:31:43 +08:00
|
|
|
call_handle_irq(irq, desc, irqtp, desc->handle_irq);
|
2009-04-28 09:57:43 +08:00
|
|
|
current->thread.ksp_limit = saved_sp_limit;
|
|
|
|
|
irqtp->task = NULL;
|
|
|
|
|
|
|
|
|
|
/* Set any flag that may have been set on the
|
|
|
|
|
* alternate stack
|
|
|
|
|
*/
|
|
|
|
|
if (irqtp->flags)
|
|
|
|
|
set_bits(irqtp->flags, &curtp->flags);
|
|
|
|
|
}
|
|
|
|
|
#else
|
|
|
|
|
static inline void handle_one_irq(unsigned int irq)
|
|
|
|
|
{
|
|
|
|
|
generic_handle_irq(irq);
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
2009-04-22 23:31:37 +08:00
|
|
|
static inline void check_stack_overflow(void)
|
|
|
|
|
{
|
|
|
|
|
#ifdef CONFIG_DEBUG_STACKOVERFLOW
|
|
|
|
|
long sp;
|
|
|
|
|
|
|
|
|
|
sp = __get_SP() & (THREAD_SIZE-1);
|
|
|
|
|
|
|
|
|
|
/* check for stack overflow: is there less than 2KB free? */
|
|
|
|
|
if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
|
|
|
|
|
printk("do_IRQ: stack overflow: %ld\n",
|
|
|
|
|
sp - sizeof(struct thread_info));
|
|
|
|
|
dump_stack();
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
void do_IRQ(struct pt_regs *regs)
|
|
|
|
|
{
|
IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 21:55:46 +08:00
|
|
|
struct pt_regs *old_regs = set_irq_regs(regs);
|
2006-07-03 19:36:01 +08:00
|
|
|
unsigned int irq;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-08-21 00:36:19 +08:00
|
|
|
irq_enter();
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2009-04-22 23:31:37 +08:00
|
|
|
check_stack_overflow();
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-10-07 20:08:26 +08:00
|
|
|
irq = ppc_md.get_irq();
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2009-04-28 09:57:43 +08:00
|
|
|
if (irq != NO_IRQ && irq != NO_IRQ_IGNORE)
|
|
|
|
|
handle_one_irq(irq);
|
|
|
|
|
else if (irq != NO_IRQ_IGNORE)
|
2005-11-16 15:53:29 +08:00
|
|
|
/* That's not SMP safe ... but who cares ? */
|
|
|
|
|
ppc_spurious_interrupts++;
|
|
|
|
|
|
2007-08-21 00:36:19 +08:00
|
|
|
irq_exit();
|
IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
of passing regs around manually through all ~1800 interrupt handlers in the
Linux kernel.
The regs pointer is used in few places, but it potentially costs both stack
space and code to pass it around. On the FRV arch, removing the regs parameter
from all the genirq function results in a 20% speed up of the IRQ exit path
(ie: from leaving timer_interrupt() to leaving do_IRQ()).
Where appropriate, an arch may override the generic storage facility and do
something different with the variable. On FRV, for instance, the address is
maintained in GR28 at all times inside the kernel as part of general exception
handling.
Having looked over the code, it appears that the parameter may be handed down
through up to twenty or so layers of functions. Consider a USB character
device attached to a USB hub, attached to a USB controller that posts its
interrupts through a cascaded auxiliary interrupt controller. A character
device driver may want to pass regs to the sysrq handler through the input
layer which adds another few layers of parameter passing.
I've build this code with allyesconfig for x86_64 and i386. I've runtested the
main part of the code on FRV and i386, though I can't test most of the drivers.
I've also done partial conversion for powerpc and MIPS - these at least compile
with minimal configurations.
This will affect all archs. Mostly the changes should be relatively easy.
Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
struct pt_regs *old_regs = set_irq_regs(regs);
And put the old one back at the end:
set_irq_regs(old_regs);
Don't pass regs through to generic_handle_irq() or __do_IRQ().
In timer_interrupt(), this sort of change will be necessary:
- update_process_times(user_mode(regs));
- profile_tick(CPU_PROFILING, regs);
+ update_process_times(user_mode(get_irq_regs()));
+ profile_tick(CPU_PROFILING);
I'd like to move update_process_times()'s use of get_irq_regs() into itself,
except that i386, alone of the archs, uses something other than user_mode().
Some notes on the interrupt handling in the drivers:
(*) input_dev() is now gone entirely. The regs pointer is no longer stored in
the input_dev struct.
(*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does
something different depending on whether it's been supplied with a regs
pointer or not.
(*) Various IRQ handler function pointers have been moved to type
irq_handler_t.
Signed-Off-By: David Howells <dhowells@redhat.com>
(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
2006-10-05 21:55:46 +08:00
|
|
|
set_irq_regs(old_regs);
|
2005-11-09 15:07:45 +08:00
|
|
|
|
2005-11-16 15:53:29 +08:00
|
|
|
#ifdef CONFIG_PPC_ISERIES
|
2006-11-21 11:16:13 +08:00
|
|
|
if (firmware_has_feature(FW_FEATURE_ISERIES) &&
|
|
|
|
|
get_lppaca()->int_dword.fields.decr_int) {
|
2006-01-13 07:26:42 +08:00
|
|
|
get_lppaca()->int_dword.fields.decr_int = 0;
|
|
|
|
|
/* Signal a fake decrementer interrupt */
|
|
|
|
|
timer_interrupt(regs);
|
2005-11-16 15:53:29 +08:00
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
void __init init_IRQ(void)
|
|
|
|
|
{
|
2007-07-10 01:31:44 +08:00
|
|
|
if (ppc_md.init_IRQ)
|
|
|
|
|
ppc_md.init_IRQ();
|
2008-04-30 16:49:55 +08:00
|
|
|
|
|
|
|
|
exc_lvl_ctx_init();
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
irq_ctx_init();
|
|
|
|
|
}
|
|
|
|
|
|
2008-04-30 16:49:55 +08:00
|
|
|
#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
|
|
|
|
|
struct thread_info *critirq_ctx[NR_CPUS] __read_mostly;
|
|
|
|
|
struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly;
|
|
|
|
|
struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly;
|
|
|
|
|
|
|
|
|
|
void exc_lvl_ctx_init(void)
|
|
|
|
|
{
|
|
|
|
|
struct thread_info *tp;
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
for_each_possible_cpu(i) {
|
|
|
|
|
memset((void *)critirq_ctx[i], 0, THREAD_SIZE);
|
|
|
|
|
tp = critirq_ctx[i];
|
|
|
|
|
tp->cpu = i;
|
|
|
|
|
tp->preempt_count = 0;
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_BOOKE
|
|
|
|
|
memset((void *)dbgirq_ctx[i], 0, THREAD_SIZE);
|
|
|
|
|
tp = dbgirq_ctx[i];
|
|
|
|
|
tp->cpu = i;
|
|
|
|
|
tp->preempt_count = 0;
|
|
|
|
|
|
|
|
|
|
memset((void *)mcheckirq_ctx[i], 0, THREAD_SIZE);
|
|
|
|
|
tp = mcheckirq_ctx[i];
|
|
|
|
|
tp->cpu = i;
|
|
|
|
|
tp->preempt_count = HARDIRQ_OFFSET;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
#endif
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
#ifdef CONFIG_IRQSTACKS
|
2006-06-23 17:05:30 +08:00
|
|
|
struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
|
|
|
|
|
struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
void irq_ctx_init(void)
|
|
|
|
|
{
|
|
|
|
|
struct thread_info *tp;
|
|
|
|
|
int i;
|
|
|
|
|
|
2006-03-29 06:50:51 +08:00
|
|
|
for_each_possible_cpu(i) {
|
2005-04-17 06:20:36 +08:00
|
|
|
memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
|
|
|
|
|
tp = softirq_ctx[i];
|
|
|
|
|
tp->cpu = i;
|
2008-04-09 15:21:28 +08:00
|
|
|
tp->preempt_count = 0;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
|
|
|
|
|
tp = hardirq_ctx[i];
|
|
|
|
|
tp->cpu = i;
|
|
|
|
|
tp->preempt_count = HARDIRQ_OFFSET;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
powerpc: Implement accurate task and CPU time accounting
This implements accurate task and cpu time accounting for 64-bit
powerpc kernels. Instead of accounting a whole jiffy of time to a
task on a timer interrupt because that task happened to be running at
the time, we now account time in units of timebase ticks according to
the actual time spent by the task in user mode and kernel mode. We
also count the time spent processing hardware and software interrupts
accurately. This is conditional on CONFIG_VIRT_CPU_ACCOUNTING. If
that is not set, we do tick-based approximate accounting as before.
To get this accurate information, we read either the PURR (processor
utilization of resources register) on POWER5 machines, or the timebase
on other machines on
* each entry to the kernel from usermode
* each exit to usermode
* transitions between process context, hard irq context and soft irq
context in kernel mode
* context switches.
On POWER5 systems with shared-processor logical partitioning we also
read both the PURR and the timebase at each timer interrupt and
context switch in order to determine how much time has been taken by
the hypervisor to run other partitions ("steal" time). Unfortunately,
since we need values of the PURR on both threads at the same time to
accurately calculate the steal time, and since we can only calculate
steal time on a per-core basis, the apportioning of the steal time
between idle time (time which we ceded to the hypervisor in the idle
loop) and actual stolen time is somewhat approximate at the moment.
This is all based quite heavily on what s390 does, and it uses the
generic interfaces that were added by the s390 developers,
i.e. account_system_time(), account_user_time(), etc.
This patch doesn't add any new interfaces between the kernel and
userspace, and doesn't change the units in which time is reported to
userspace by things such as /proc/stat, /proc/<pid>/stat, getrusage(),
times(), etc. Internally the various task and cpu times are stored in
timebase units, but they are converted to USER_HZ units (1/100th of a
second) when reported to userspace. Some precision is therefore lost
but there should not be any accumulating error, since the internal
accumulation is at full precision.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-02-24 07:06:59 +08:00
|
|
|
static inline void do_softirq_onstack(void)
|
|
|
|
|
{
|
|
|
|
|
struct thread_info *curtp, *irqtp;
|
2008-04-28 14:21:22 +08:00
|
|
|
unsigned long saved_sp_limit = current->thread.ksp_limit;
|
powerpc: Implement accurate task and CPU time accounting
This implements accurate task and cpu time accounting for 64-bit
powerpc kernels. Instead of accounting a whole jiffy of time to a
task on a timer interrupt because that task happened to be running at
the time, we now account time in units of timebase ticks according to
the actual time spent by the task in user mode and kernel mode. We
also count the time spent processing hardware and software interrupts
accurately. This is conditional on CONFIG_VIRT_CPU_ACCOUNTING. If
that is not set, we do tick-based approximate accounting as before.
To get this accurate information, we read either the PURR (processor
utilization of resources register) on POWER5 machines, or the timebase
on other machines on
* each entry to the kernel from usermode
* each exit to usermode
* transitions between process context, hard irq context and soft irq
context in kernel mode
* context switches.
On POWER5 systems with shared-processor logical partitioning we also
read both the PURR and the timebase at each timer interrupt and
context switch in order to determine how much time has been taken by
the hypervisor to run other partitions ("steal" time). Unfortunately,
since we need values of the PURR on both threads at the same time to
accurately calculate the steal time, and since we can only calculate
steal time on a per-core basis, the apportioning of the steal time
between idle time (time which we ceded to the hypervisor in the idle
loop) and actual stolen time is somewhat approximate at the moment.
This is all based quite heavily on what s390 does, and it uses the
generic interfaces that were added by the s390 developers,
i.e. account_system_time(), account_user_time(), etc.
This patch doesn't add any new interfaces between the kernel and
userspace, and doesn't change the units in which time is reported to
userspace by things such as /proc/stat, /proc/<pid>/stat, getrusage(),
times(), etc. Internally the various task and cpu times are stored in
timebase units, but they are converted to USER_HZ units (1/100th of a
second) when reported to userspace. Some precision is therefore lost
but there should not be any accumulating error, since the internal
accumulation is at full precision.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-02-24 07:06:59 +08:00
|
|
|
|
|
|
|
|
curtp = current_thread_info();
|
|
|
|
|
irqtp = softirq_ctx[smp_processor_id()];
|
|
|
|
|
irqtp->task = curtp->task;
|
2008-04-28 14:21:22 +08:00
|
|
|
current->thread.ksp_limit = (unsigned long)irqtp +
|
|
|
|
|
_ALIGN_UP(sizeof(struct thread_info), 16);
|
powerpc: Implement accurate task and CPU time accounting
This implements accurate task and cpu time accounting for 64-bit
powerpc kernels. Instead of accounting a whole jiffy of time to a
task on a timer interrupt because that task happened to be running at
the time, we now account time in units of timebase ticks according to
the actual time spent by the task in user mode and kernel mode. We
also count the time spent processing hardware and software interrupts
accurately. This is conditional on CONFIG_VIRT_CPU_ACCOUNTING. If
that is not set, we do tick-based approximate accounting as before.
To get this accurate information, we read either the PURR (processor
utilization of resources register) on POWER5 machines, or the timebase
on other machines on
* each entry to the kernel from usermode
* each exit to usermode
* transitions between process context, hard irq context and soft irq
context in kernel mode
* context switches.
On POWER5 systems with shared-processor logical partitioning we also
read both the PURR and the timebase at each timer interrupt and
context switch in order to determine how much time has been taken by
the hypervisor to run other partitions ("steal" time). Unfortunately,
since we need values of the PURR on both threads at the same time to
accurately calculate the steal time, and since we can only calculate
steal time on a per-core basis, the apportioning of the steal time
between idle time (time which we ceded to the hypervisor in the idle
loop) and actual stolen time is somewhat approximate at the moment.
This is all based quite heavily on what s390 does, and it uses the
generic interfaces that were added by the s390 developers,
i.e. account_system_time(), account_user_time(), etc.
This patch doesn't add any new interfaces between the kernel and
userspace, and doesn't change the units in which time is reported to
userspace by things such as /proc/stat, /proc/<pid>/stat, getrusage(),
times(), etc. Internally the various task and cpu times are stored in
timebase units, but they are converted to USER_HZ units (1/100th of a
second) when reported to userspace. Some precision is therefore lost
but there should not be any accumulating error, since the internal
accumulation is at full precision.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-02-24 07:06:59 +08:00
|
|
|
call_do_softirq(irqtp);
|
2008-04-28 14:21:22 +08:00
|
|
|
current->thread.ksp_limit = saved_sp_limit;
|
powerpc: Implement accurate task and CPU time accounting
This implements accurate task and cpu time accounting for 64-bit
powerpc kernels. Instead of accounting a whole jiffy of time to a
task on a timer interrupt because that task happened to be running at
the time, we now account time in units of timebase ticks according to
the actual time spent by the task in user mode and kernel mode. We
also count the time spent processing hardware and software interrupts
accurately. This is conditional on CONFIG_VIRT_CPU_ACCOUNTING. If
that is not set, we do tick-based approximate accounting as before.
To get this accurate information, we read either the PURR (processor
utilization of resources register) on POWER5 machines, or the timebase
on other machines on
* each entry to the kernel from usermode
* each exit to usermode
* transitions between process context, hard irq context and soft irq
context in kernel mode
* context switches.
On POWER5 systems with shared-processor logical partitioning we also
read both the PURR and the timebase at each timer interrupt and
context switch in order to determine how much time has been taken by
the hypervisor to run other partitions ("steal" time). Unfortunately,
since we need values of the PURR on both threads at the same time to
accurately calculate the steal time, and since we can only calculate
steal time on a per-core basis, the apportioning of the steal time
between idle time (time which we ceded to the hypervisor in the idle
loop) and actual stolen time is somewhat approximate at the moment.
This is all based quite heavily on what s390 does, and it uses the
generic interfaces that were added by the s390 developers,
i.e. account_system_time(), account_user_time(), etc.
This patch doesn't add any new interfaces between the kernel and
userspace, and doesn't change the units in which time is reported to
userspace by things such as /proc/stat, /proc/<pid>/stat, getrusage(),
times(), etc. Internally the various task and cpu times are stored in
timebase units, but they are converted to USER_HZ units (1/100th of a
second) when reported to userspace. Some precision is therefore lost
but there should not be any accumulating error, since the internal
accumulation is at full precision.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-02-24 07:06:59 +08:00
|
|
|
irqtp->task = NULL;
|
|
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
|
powerpc: Implement accurate task and CPU time accounting
This implements accurate task and cpu time accounting for 64-bit
powerpc kernels. Instead of accounting a whole jiffy of time to a
task on a timer interrupt because that task happened to be running at
the time, we now account time in units of timebase ticks according to
the actual time spent by the task in user mode and kernel mode. We
also count the time spent processing hardware and software interrupts
accurately. This is conditional on CONFIG_VIRT_CPU_ACCOUNTING. If
that is not set, we do tick-based approximate accounting as before.
To get this accurate information, we read either the PURR (processor
utilization of resources register) on POWER5 machines, or the timebase
on other machines on
* each entry to the kernel from usermode
* each exit to usermode
* transitions between process context, hard irq context and soft irq
context in kernel mode
* context switches.
On POWER5 systems with shared-processor logical partitioning we also
read both the PURR and the timebase at each timer interrupt and
context switch in order to determine how much time has been taken by
the hypervisor to run other partitions ("steal" time). Unfortunately,
since we need values of the PURR on both threads at the same time to
accurately calculate the steal time, and since we can only calculate
steal time on a per-core basis, the apportioning of the steal time
between idle time (time which we ceded to the hypervisor in the idle
loop) and actual stolen time is somewhat approximate at the moment.
This is all based quite heavily on what s390 does, and it uses the
generic interfaces that were added by the s390 developers,
i.e. account_system_time(), account_user_time(), etc.
This patch doesn't add any new interfaces between the kernel and
userspace, and doesn't change the units in which time is reported to
userspace by things such as /proc/stat, /proc/<pid>/stat, getrusage(),
times(), etc. Internally the various task and cpu times are stored in
timebase units, but they are converted to USER_HZ units (1/100th of a
second) when reported to userspace. Some precision is therefore lost
but there should not be any accumulating error, since the internal
accumulation is at full precision.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-02-24 07:06:59 +08:00
|
|
|
#else
|
|
|
|
|
#define do_softirq_onstack() __do_softirq()
|
|
|
|
|
#endif /* CONFIG_IRQSTACKS */
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
void do_softirq(void)
|
|
|
|
|
{
|
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
|
|
if (in_interrupt())
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
local_irq_save(flags);
|
|
|
|
|
|
2006-07-04 06:28:34 +08:00
|
|
|
if (local_softirq_pending())
|
powerpc: Implement accurate task and CPU time accounting
This implements accurate task and cpu time accounting for 64-bit
powerpc kernels. Instead of accounting a whole jiffy of time to a
task on a timer interrupt because that task happened to be running at
the time, we now account time in units of timebase ticks according to
the actual time spent by the task in user mode and kernel mode. We
also count the time spent processing hardware and software interrupts
accurately. This is conditional on CONFIG_VIRT_CPU_ACCOUNTING. If
that is not set, we do tick-based approximate accounting as before.
To get this accurate information, we read either the PURR (processor
utilization of resources register) on POWER5 machines, or the timebase
on other machines on
* each entry to the kernel from usermode
* each exit to usermode
* transitions between process context, hard irq context and soft irq
context in kernel mode
* context switches.
On POWER5 systems with shared-processor logical partitioning we also
read both the PURR and the timebase at each timer interrupt and
context switch in order to determine how much time has been taken by
the hypervisor to run other partitions ("steal" time). Unfortunately,
since we need values of the PURR on both threads at the same time to
accurately calculate the steal time, and since we can only calculate
steal time on a per-core basis, the apportioning of the steal time
between idle time (time which we ceded to the hypervisor in the idle
loop) and actual stolen time is somewhat approximate at the moment.
This is all based quite heavily on what s390 does, and it uses the
generic interfaces that were added by the s390 developers,
i.e. account_system_time(), account_user_time(), etc.
This patch doesn't add any new interfaces between the kernel and
userspace, and doesn't change the units in which time is reported to
userspace by things such as /proc/stat, /proc/<pid>/stat, getrusage(),
times(), etc. Internally the various task and cpu times are stored in
timebase units, but they are converted to USER_HZ units (1/100th of a
second) when reported to userspace. Some precision is therefore lost
but there should not be any accumulating error, since the internal
accumulation is at full precision.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-02-24 07:06:59 +08:00
|
|
|
do_softirq_onstack();
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
local_irq_restore(flags);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
2006-07-03 19:36:01 +08:00
|
|
|
* IRQ controller and virtual interrupts
|
2005-04-17 06:20:36 +08:00
|
|
|
*/
|
|
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
static LIST_HEAD(irq_hosts);
|
2007-04-30 00:10:39 +08:00
|
|
|
static DEFINE_SPINLOCK(irq_big_lock);
|
2008-09-04 20:37:07 +08:00
|
|
|
static unsigned int revmap_trees_allocated;
|
2008-09-04 20:37:08 +08:00
|
|
|
static DEFINE_MUTEX(revmap_trees_mutex);
|
2006-07-03 19:36:01 +08:00
|
|
|
struct irq_map_entry irq_map[NR_IRQS];
|
|
|
|
|
static unsigned int irq_virq_count = NR_IRQS;
|
|
|
|
|
static struct irq_host *irq_default_host;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2007-06-04 12:47:04 +08:00
|
|
|
irq_hw_number_t virq_to_hw(unsigned int virq)
|
|
|
|
|
{
|
|
|
|
|
return irq_map[virq].hwirq;
|
|
|
|
|
}
|
|
|
|
|
EXPORT_SYMBOL_GPL(virq_to_hw);
|
|
|
|
|
|
2007-08-28 16:47:55 +08:00
|
|
|
static int default_irq_host_match(struct irq_host *h, struct device_node *np)
|
|
|
|
|
{
|
|
|
|
|
return h->of_node != NULL && h->of_node == np;
|
|
|
|
|
}
|
|
|
|
|
|
2007-10-02 11:37:53 +08:00
|
|
|
struct irq_host *irq_alloc_host(struct device_node *of_node,
|
2007-08-28 16:47:54 +08:00
|
|
|
unsigned int revmap_type,
|
|
|
|
|
unsigned int revmap_arg,
|
|
|
|
|
struct irq_host_ops *ops,
|
|
|
|
|
irq_hw_number_t inval_irq)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2006-07-03 19:36:01 +08:00
|
|
|
struct irq_host *host;
|
|
|
|
|
unsigned int size = sizeof(struct irq_host);
|
|
|
|
|
unsigned int i;
|
|
|
|
|
unsigned int *rmap;
|
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
|
|
/* Allocate structure and revmap table if using linear mapping */
|
|
|
|
|
if (revmap_type == IRQ_HOST_MAP_LINEAR)
|
|
|
|
|
size += revmap_arg * sizeof(unsigned int);
|
2007-10-02 11:37:53 +08:00
|
|
|
host = zalloc_maybe_bootmem(size, GFP_KERNEL);
|
2006-07-03 19:36:01 +08:00
|
|
|
if (host == NULL)
|
|
|
|
|
return NULL;
|
2006-04-04 12:49:48 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
/* Fill structure */
|
|
|
|
|
host->revmap_type = revmap_type;
|
|
|
|
|
host->inval_irq = inval_irq;
|
|
|
|
|
host->ops = ops;
|
2008-05-26 10:12:32 +08:00
|
|
|
host->of_node = of_node_get(of_node);
|
2006-04-04 12:49:48 +08:00
|
|
|
|
2007-08-28 16:47:55 +08:00
|
|
|
if (host->ops->match == NULL)
|
|
|
|
|
host->ops->match = default_irq_host_match;
|
2006-04-04 12:49:48 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
spin_lock_irqsave(&irq_big_lock, flags);
|
|
|
|
|
|
|
|
|
|
/* If it's a legacy controller, check for duplicates and
|
|
|
|
|
* mark it as allocated (we use irq 0 host pointer for that
|
|
|
|
|
*/
|
|
|
|
|
if (revmap_type == IRQ_HOST_MAP_LEGACY) {
|
|
|
|
|
if (irq_map[0].host != NULL) {
|
|
|
|
|
spin_unlock_irqrestore(&irq_big_lock, flags);
|
|
|
|
|
/* If we are early boot, we can't free the structure,
|
|
|
|
|
* too bad...
|
|
|
|
|
* this will be fixed once slab is made available early
|
|
|
|
|
* instead of the current cruft
|
|
|
|
|
*/
|
|
|
|
|
if (mem_init_done)
|
|
|
|
|
kfree(host);
|
|
|
|
|
return NULL;
|
|
|
|
|
}
|
|
|
|
|
irq_map[0].host = host;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
list_add(&host->link, &irq_hosts);
|
|
|
|
|
spin_unlock_irqrestore(&irq_big_lock, flags);
|
|
|
|
|
|
|
|
|
|
/* Additional setups per revmap type */
|
|
|
|
|
switch(revmap_type) {
|
|
|
|
|
case IRQ_HOST_MAP_LEGACY:
|
|
|
|
|
/* 0 is always the invalid number for legacy */
|
|
|
|
|
host->inval_irq = 0;
|
|
|
|
|
/* setup us as the host for all legacy interrupts */
|
|
|
|
|
for (i = 1; i < NUM_ISA_INTERRUPTS; i++) {
|
2007-08-28 16:47:56 +08:00
|
|
|
irq_map[i].hwirq = i;
|
2006-07-03 19:36:01 +08:00
|
|
|
smp_wmb();
|
|
|
|
|
irq_map[i].host = host;
|
|
|
|
|
smp_wmb();
|
|
|
|
|
|
[PATCH] powerpc: fix trigger handling in the new irq code
This patch slightly reworks the new irq code to fix a small design error. I
removed the passing of the trigger to the map() calls entirely, it was not a
good idea to have one call do two different things. It also fixes a couple of
corner cases.
Mapping a linux virtual irq to a physical irq now does only that. Setting the
trigger is a different action which has a different call.
The main changes are:
- I no longer call host->ops->map() for an already mapped irq, I just return
the virtual number that was already mapped. It was called before to give an
opportunity to change the trigger, but that was causing issues as that could
happen while the interrupt was in use by a device, and because of the
trigger change, map would potentially muck around with things in a racy way.
That was causing much burden on a given's controller implementation of
map() to get it right. This is much simpler now. map() is only called on
the initial mapping of an irq, meaning that you know that this irq is _not_
being used. You can initialize the hardware if you want (though you don't
have to).
- Controllers that can handle different type of triggers (level/edge/etc...)
now implement the standard irq_chip->set_type() call as defined by the
generic code. That means that you can use the standard set_irq_type() to
configure an irq line manually if you wish or (though I don't like that
interface), pass explicit trigger flags to request_irq() as defined by the
generic kernel interfaces. Also, using those interfaces guarantees that
your controller set_type callback is called with the descriptor lock held,
thus providing locking against activity on the same interrupt (including
mask/unmask/etc...) automatically. A result is that, for example, MPIC's
own map() implementation calls irq_set_type(NONE) to configure the hardware
to the default triggers.
- To allow the above, the irq_map array entry for the new mapped interrupt
is now set before map() callback is called for the controller.
- The irq_create_of_mapping() (also used by irq_of_parse_and_map()) function
for mapping interrupts from the device-tree now also call the separate
set_irq_type(), and only does so if there is a change in the trigger type.
- While I was at it, I changed pci_read_irq_line() (which is the helper I
would expect most archs to use in their pcibios_fixup() to get the PCI
interrupt routing from the device tree) to also handle a fallback when the
DT mapping fails consisting of reading the PCI_INTERRUPT_PIN to know wether
the device has an interrupt at all, and the the PCI_INTERRUPT_LINE to get an
interrupt number from the device. That number is then mapped using the
default controller, and the trigger is set to level low. That default
behaviour works for several platforms that don't have a proper interrupt
tree like Pegasos. If it doesn't work for your platform, then either
provide a proper interrupt tree from the firmware so that fallback isn't
needed, or don't call pci_read_irq_line()
- Add back a bit that got dropped by my main rework patch for properly
clearing pending IPIs on pSeries when using a kexec
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-07-10 19:44:42 +08:00
|
|
|
/* Clear norequest flags */
|
|
|
|
|
get_irq_desc(i)->status &= ~IRQ_NOREQUEST;
|
2006-07-03 19:36:01 +08:00
|
|
|
|
|
|
|
|
/* Legacy flags are left to default at this point,
|
|
|
|
|
* one can then use irq_create_mapping() to
|
2007-10-20 05:22:55 +08:00
|
|
|
* explicitly change them
|
2006-07-03 19:36:01 +08:00
|
|
|
*/
|
[PATCH] powerpc: fix trigger handling in the new irq code
This patch slightly reworks the new irq code to fix a small design error. I
removed the passing of the trigger to the map() calls entirely, it was not a
good idea to have one call do two different things. It also fixes a couple of
corner cases.
Mapping a linux virtual irq to a physical irq now does only that. Setting the
trigger is a different action which has a different call.
The main changes are:
- I no longer call host->ops->map() for an already mapped irq, I just return
the virtual number that was already mapped. It was called before to give an
opportunity to change the trigger, but that was causing issues as that could
happen while the interrupt was in use by a device, and because of the
trigger change, map would potentially muck around with things in a racy way.
That was causing much burden on a given's controller implementation of
map() to get it right. This is much simpler now. map() is only called on
the initial mapping of an irq, meaning that you know that this irq is _not_
being used. You can initialize the hardware if you want (though you don't
have to).
- Controllers that can handle different type of triggers (level/edge/etc...)
now implement the standard irq_chip->set_type() call as defined by the
generic code. That means that you can use the standard set_irq_type() to
configure an irq line manually if you wish or (though I don't like that
interface), pass explicit trigger flags to request_irq() as defined by the
generic kernel interfaces. Also, using those interfaces guarantees that
your controller set_type callback is called with the descriptor lock held,
thus providing locking against activity on the same interrupt (including
mask/unmask/etc...) automatically. A result is that, for example, MPIC's
own map() implementation calls irq_set_type(NONE) to configure the hardware
to the default triggers.
- To allow the above, the irq_map array entry for the new mapped interrupt
is now set before map() callback is called for the controller.
- The irq_create_of_mapping() (also used by irq_of_parse_and_map()) function
for mapping interrupts from the device-tree now also call the separate
set_irq_type(), and only does so if there is a change in the trigger type.
- While I was at it, I changed pci_read_irq_line() (which is the helper I
would expect most archs to use in their pcibios_fixup() to get the PCI
interrupt routing from the device tree) to also handle a fallback when the
DT mapping fails consisting of reading the PCI_INTERRUPT_PIN to know wether
the device has an interrupt at all, and the the PCI_INTERRUPT_LINE to get an
interrupt number from the device. That number is then mapped using the
default controller, and the trigger is set to level low. That default
behaviour works for several platforms that don't have a proper interrupt
tree like Pegasos. If it doesn't work for your platform, then either
provide a proper interrupt tree from the firmware so that fallback isn't
needed, or don't call pci_read_irq_line()
- Add back a bit that got dropped by my main rework patch for properly
clearing pending IPIs on pSeries when using a kexec
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-07-10 19:44:42 +08:00
|
|
|
ops->map(host, i, i);
|
2006-07-03 19:36:01 +08:00
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case IRQ_HOST_MAP_LINEAR:
|
|
|
|
|
rmap = (unsigned int *)(host + 1);
|
|
|
|
|
for (i = 0; i < revmap_arg; i++)
|
2007-06-01 15:23:26 +08:00
|
|
|
rmap[i] = NO_IRQ;
|
2006-07-03 19:36:01 +08:00
|
|
|
host->revmap_data.linear.size = revmap_arg;
|
|
|
|
|
smp_wmb();
|
|
|
|
|
host->revmap_data.linear.revmap = rmap;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host);
|
|
|
|
|
|
|
|
|
|
return host;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
struct irq_host *irq_find_host(struct device_node *node)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2006-07-03 19:36:01 +08:00
|
|
|
struct irq_host *h, *found = NULL;
|
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
|
|
/* We might want to match the legacy controller last since
|
|
|
|
|
* it might potentially be set to match all interrupts in
|
|
|
|
|
* the absence of a device node. This isn't a problem so far
|
|
|
|
|
* yet though...
|
|
|
|
|
*/
|
|
|
|
|
spin_lock_irqsave(&irq_big_lock, flags);
|
|
|
|
|
list_for_each_entry(h, &irq_hosts, link)
|
2007-08-28 16:47:55 +08:00
|
|
|
if (h->ops->match(h, node)) {
|
2006-07-03 19:36:01 +08:00
|
|
|
found = h;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
spin_unlock_irqrestore(&irq_big_lock, flags);
|
|
|
|
|
return found;
|
|
|
|
|
}
|
|
|
|
|
EXPORT_SYMBOL_GPL(irq_find_host);
|
|
|
|
|
|
|
|
|
|
void irq_set_default_host(struct irq_host *host)
|
|
|
|
|
{
|
|
|
|
|
pr_debug("irq: Default host set to @0x%p\n", host);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
irq_default_host = host;
|
|
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
void irq_set_virq_count(unsigned int count)
|
|
|
|
|
{
|
|
|
|
|
pr_debug("irq: Trying to set virq count to %d\n", count);
|
2005-06-23 07:43:37 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
BUG_ON(count < NUM_ISA_INTERRUPTS);
|
|
|
|
|
if (count < NR_IRQS)
|
|
|
|
|
irq_virq_count = count;
|
|
|
|
|
}
|
|
|
|
|
|
2007-06-04 20:59:59 +08:00
|
|
|
static int irq_setup_virq(struct irq_host *host, unsigned int virq,
|
|
|
|
|
irq_hw_number_t hwirq)
|
|
|
|
|
{
|
|
|
|
|
/* Clear IRQ_NOREQUEST flag */
|
|
|
|
|
get_irq_desc(virq)->status &= ~IRQ_NOREQUEST;
|
|
|
|
|
|
|
|
|
|
/* map it */
|
|
|
|
|
smp_wmb();
|
|
|
|
|
irq_map[virq].hwirq = hwirq;
|
|
|
|
|
smp_mb();
|
|
|
|
|
|
|
|
|
|
if (host->ops->map(host, virq, hwirq)) {
|
|
|
|
|
pr_debug("irq: -> mapping failed, freeing\n");
|
|
|
|
|
irq_free_virt(virq, 1);
|
|
|
|
|
return -1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
2006-08-28 09:17:37 +08:00
|
|
|
|
2007-06-04 21:00:00 +08:00
|
|
|
unsigned int irq_create_direct_mapping(struct irq_host *host)
|
|
|
|
|
{
|
|
|
|
|
unsigned int virq;
|
|
|
|
|
|
|
|
|
|
if (host == NULL)
|
|
|
|
|
host = irq_default_host;
|
|
|
|
|
|
|
|
|
|
BUG_ON(host == NULL);
|
|
|
|
|
WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP);
|
|
|
|
|
|
|
|
|
|
virq = irq_alloc_virt(host, 1, 0);
|
|
|
|
|
if (virq == NO_IRQ) {
|
|
|
|
|
pr_debug("irq: create_direct virq allocation failed\n");
|
|
|
|
|
return NO_IRQ;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
pr_debug("irq: create_direct obtained virq %d\n", virq);
|
|
|
|
|
|
|
|
|
|
if (irq_setup_virq(host, virq, virq))
|
|
|
|
|
return NO_IRQ;
|
|
|
|
|
|
|
|
|
|
return virq;
|
|
|
|
|
}
|
|
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
unsigned int irq_create_mapping(struct irq_host *host,
|
[PATCH] powerpc: fix trigger handling in the new irq code
This patch slightly reworks the new irq code to fix a small design error. I
removed the passing of the trigger to the map() calls entirely, it was not a
good idea to have one call do two different things. It also fixes a couple of
corner cases.
Mapping a linux virtual irq to a physical irq now does only that. Setting the
trigger is a different action which has a different call.
The main changes are:
- I no longer call host->ops->map() for an already mapped irq, I just return
the virtual number that was already mapped. It was called before to give an
opportunity to change the trigger, but that was causing issues as that could
happen while the interrupt was in use by a device, and because of the
trigger change, map would potentially muck around with things in a racy way.
That was causing much burden on a given's controller implementation of
map() to get it right. This is much simpler now. map() is only called on
the initial mapping of an irq, meaning that you know that this irq is _not_
being used. You can initialize the hardware if you want (though you don't
have to).
- Controllers that can handle different type of triggers (level/edge/etc...)
now implement the standard irq_chip->set_type() call as defined by the
generic code. That means that you can use the standard set_irq_type() to
configure an irq line manually if you wish or (though I don't like that
interface), pass explicit trigger flags to request_irq() as defined by the
generic kernel interfaces. Also, using those interfaces guarantees that
your controller set_type callback is called with the descriptor lock held,
thus providing locking against activity on the same interrupt (including
mask/unmask/etc...) automatically. A result is that, for example, MPIC's
own map() implementation calls irq_set_type(NONE) to configure the hardware
to the default triggers.
- To allow the above, the irq_map array entry for the new mapped interrupt
is now set before map() callback is called for the controller.
- The irq_create_of_mapping() (also used by irq_of_parse_and_map()) function
for mapping interrupts from the device-tree now also call the separate
set_irq_type(), and only does so if there is a change in the trigger type.
- While I was at it, I changed pci_read_irq_line() (which is the helper I
would expect most archs to use in their pcibios_fixup() to get the PCI
interrupt routing from the device tree) to also handle a fallback when the
DT mapping fails consisting of reading the PCI_INTERRUPT_PIN to know wether
the device has an interrupt at all, and the the PCI_INTERRUPT_LINE to get an
interrupt number from the device. That number is then mapped using the
default controller, and the trigger is set to level low. That default
behaviour works for several platforms that don't have a proper interrupt
tree like Pegasos. If it doesn't work for your platform, then either
provide a proper interrupt tree from the firmware so that fallback isn't
needed, or don't call pci_read_irq_line()
- Add back a bit that got dropped by my main rework patch for properly
clearing pending IPIs on pSeries when using a kexec
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-07-10 19:44:42 +08:00
|
|
|
irq_hw_number_t hwirq)
|
2006-07-03 19:36:01 +08:00
|
|
|
{
|
|
|
|
|
unsigned int virq, hint;
|
|
|
|
|
|
[PATCH] powerpc: fix trigger handling in the new irq code
This patch slightly reworks the new irq code to fix a small design error. I
removed the passing of the trigger to the map() calls entirely, it was not a
good idea to have one call do two different things. It also fixes a couple of
corner cases.
Mapping a linux virtual irq to a physical irq now does only that. Setting the
trigger is a different action which has a different call.
The main changes are:
- I no longer call host->ops->map() for an already mapped irq, I just return
the virtual number that was already mapped. It was called before to give an
opportunity to change the trigger, but that was causing issues as that could
happen while the interrupt was in use by a device, and because of the
trigger change, map would potentially muck around with things in a racy way.
That was causing much burden on a given's controller implementation of
map() to get it right. This is much simpler now. map() is only called on
the initial mapping of an irq, meaning that you know that this irq is _not_
being used. You can initialize the hardware if you want (though you don't
have to).
- Controllers that can handle different type of triggers (level/edge/etc...)
now implement the standard irq_chip->set_type() call as defined by the
generic code. That means that you can use the standard set_irq_type() to
configure an irq line manually if you wish or (though I don't like that
interface), pass explicit trigger flags to request_irq() as defined by the
generic kernel interfaces. Also, using those interfaces guarantees that
your controller set_type callback is called with the descriptor lock held,
thus providing locking against activity on the same interrupt (including
mask/unmask/etc...) automatically. A result is that, for example, MPIC's
own map() implementation calls irq_set_type(NONE) to configure the hardware
to the default triggers.
- To allow the above, the irq_map array entry for the new mapped interrupt
is now set before map() callback is called for the controller.
- The irq_create_of_mapping() (also used by irq_of_parse_and_map()) function
for mapping interrupts from the device-tree now also call the separate
set_irq_type(), and only does so if there is a change in the trigger type.
- While I was at it, I changed pci_read_irq_line() (which is the helper I
would expect most archs to use in their pcibios_fixup() to get the PCI
interrupt routing from the device tree) to also handle a fallback when the
DT mapping fails consisting of reading the PCI_INTERRUPT_PIN to know wether
the device has an interrupt at all, and the the PCI_INTERRUPT_LINE to get an
interrupt number from the device. That number is then mapped using the
default controller, and the trigger is set to level low. That default
behaviour works for several platforms that don't have a proper interrupt
tree like Pegasos. If it doesn't work for your platform, then either
provide a proper interrupt tree from the firmware so that fallback isn't
needed, or don't call pci_read_irq_line()
- Add back a bit that got dropped by my main rework patch for properly
clearing pending IPIs on pSeries when using a kexec
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-07-10 19:44:42 +08:00
|
|
|
pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq);
|
2006-07-03 19:36:01 +08:00
|
|
|
|
|
|
|
|
/* Look for default host if nececssary */
|
|
|
|
|
if (host == NULL)
|
|
|
|
|
host = irq_default_host;
|
|
|
|
|
if (host == NULL) {
|
|
|
|
|
printk(KERN_WARNING "irq_create_mapping called for"
|
|
|
|
|
" NULL host, hwirq=%lx\n", hwirq);
|
|
|
|
|
WARN_ON(1);
|
|
|
|
|
return NO_IRQ;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
2006-07-03 19:36:01 +08:00
|
|
|
pr_debug("irq: -> using host @%p\n", host);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
/* Check if mapping already exist, if it does, call
|
|
|
|
|
* host->ops->map() to update the flags
|
|
|
|
|
*/
|
|
|
|
|
virq = irq_find_mapping(host, hwirq);
|
2007-06-01 15:23:26 +08:00
|
|
|
if (virq != NO_IRQ) {
|
2007-01-12 08:58:39 +08:00
|
|
|
if (host->ops->remap)
|
|
|
|
|
host->ops->remap(host, virq, hwirq);
|
2006-07-03 19:36:01 +08:00
|
|
|
pr_debug("irq: -> existing mapping on virq %d\n", virq);
|
|
|
|
|
return virq;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
/* Get a virtual interrupt number */
|
|
|
|
|
if (host->revmap_type == IRQ_HOST_MAP_LEGACY) {
|
|
|
|
|
/* Handle legacy */
|
|
|
|
|
virq = (unsigned int)hwirq;
|
|
|
|
|
if (virq == 0 || virq >= NUM_ISA_INTERRUPTS)
|
|
|
|
|
return NO_IRQ;
|
|
|
|
|
return virq;
|
|
|
|
|
} else {
|
|
|
|
|
/* Allocate a virtual interrupt number */
|
|
|
|
|
hint = hwirq % irq_virq_count;
|
|
|
|
|
virq = irq_alloc_virt(host, 1, hint);
|
|
|
|
|
if (virq == NO_IRQ) {
|
|
|
|
|
pr_debug("irq: -> virq allocation failed\n");
|
|
|
|
|
return NO_IRQ;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2007-06-04 20:59:59 +08:00
|
|
|
if (irq_setup_virq(host, virq, hwirq))
|
2006-07-03 19:36:01 +08:00
|
|
|
return NO_IRQ;
|
2007-06-04 20:59:59 +08:00
|
|
|
|
2009-04-06 00:05:02 +08:00
|
|
|
printk(KERN_DEBUG "irq: irq %lu on host %s mapped to virtual irq %u\n",
|
|
|
|
|
hwirq, host->of_node ? host->of_node->full_name : "null", virq);
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
return virq;
|
2006-07-03 19:36:01 +08:00
|
|
|
}
|
|
|
|
|
EXPORT_SYMBOL_GPL(irq_create_mapping);
|
|
|
|
|
|
2006-10-09 23:22:09 +08:00
|
|
|
unsigned int irq_create_of_mapping(struct device_node *controller,
|
|
|
|
|
u32 *intspec, unsigned int intsize)
|
2006-07-03 19:36:01 +08:00
|
|
|
{
|
|
|
|
|
struct irq_host *host;
|
|
|
|
|
irq_hw_number_t hwirq;
|
[PATCH] powerpc: fix trigger handling in the new irq code
This patch slightly reworks the new irq code to fix a small design error. I
removed the passing of the trigger to the map() calls entirely, it was not a
good idea to have one call do two different things. It also fixes a couple of
corner cases.
Mapping a linux virtual irq to a physical irq now does only that. Setting the
trigger is a different action which has a different call.
The main changes are:
- I no longer call host->ops->map() for an already mapped irq, I just return
the virtual number that was already mapped. It was called before to give an
opportunity to change the trigger, but that was causing issues as that could
happen while the interrupt was in use by a device, and because of the
trigger change, map would potentially muck around with things in a racy way.
That was causing much burden on a given's controller implementation of
map() to get it right. This is much simpler now. map() is only called on
the initial mapping of an irq, meaning that you know that this irq is _not_
being used. You can initialize the hardware if you want (though you don't
have to).
- Controllers that can handle different type of triggers (level/edge/etc...)
now implement the standard irq_chip->set_type() call as defined by the
generic code. That means that you can use the standard set_irq_type() to
configure an irq line manually if you wish or (though I don't like that
interface), pass explicit trigger flags to request_irq() as defined by the
generic kernel interfaces. Also, using those interfaces guarantees that
your controller set_type callback is called with the descriptor lock held,
thus providing locking against activity on the same interrupt (including
mask/unmask/etc...) automatically. A result is that, for example, MPIC's
own map() implementation calls irq_set_type(NONE) to configure the hardware
to the default triggers.
- To allow the above, the irq_map array entry for the new mapped interrupt
is now set before map() callback is called for the controller.
- The irq_create_of_mapping() (also used by irq_of_parse_and_map()) function
for mapping interrupts from the device-tree now also call the separate
set_irq_type(), and only does so if there is a change in the trigger type.
- While I was at it, I changed pci_read_irq_line() (which is the helper I
would expect most archs to use in their pcibios_fixup() to get the PCI
interrupt routing from the device tree) to also handle a fallback when the
DT mapping fails consisting of reading the PCI_INTERRUPT_PIN to know wether
the device has an interrupt at all, and the the PCI_INTERRUPT_LINE to get an
interrupt number from the device. That number is then mapped using the
default controller, and the trigger is set to level low. That default
behaviour works for several platforms that don't have a proper interrupt
tree like Pegasos. If it doesn't work for your platform, then either
provide a proper interrupt tree from the firmware so that fallback isn't
needed, or don't call pci_read_irq_line()
- Add back a bit that got dropped by my main rework patch for properly
clearing pending IPIs on pSeries when using a kexec
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-07-10 19:44:42 +08:00
|
|
|
unsigned int type = IRQ_TYPE_NONE;
|
|
|
|
|
unsigned int virq;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
if (controller == NULL)
|
|
|
|
|
host = irq_default_host;
|
|
|
|
|
else
|
|
|
|
|
host = irq_find_host(controller);
|
[PATCH] powerpc: fix trigger handling in the new irq code
This patch slightly reworks the new irq code to fix a small design error. I
removed the passing of the trigger to the map() calls entirely, it was not a
good idea to have one call do two different things. It also fixes a couple of
corner cases.
Mapping a linux virtual irq to a physical irq now does only that. Setting the
trigger is a different action which has a different call.
The main changes are:
- I no longer call host->ops->map() for an already mapped irq, I just return
the virtual number that was already mapped. It was called before to give an
opportunity to change the trigger, but that was causing issues as that could
happen while the interrupt was in use by a device, and because of the
trigger change, map would potentially muck around with things in a racy way.
That was causing much burden on a given's controller implementation of
map() to get it right. This is much simpler now. map() is only called on
the initial mapping of an irq, meaning that you know that this irq is _not_
being used. You can initialize the hardware if you want (though you don't
have to).
- Controllers that can handle different type of triggers (level/edge/etc...)
now implement the standard irq_chip->set_type() call as defined by the
generic code. That means that you can use the standard set_irq_type() to
configure an irq line manually if you wish or (though I don't like that
interface), pass explicit trigger flags to request_irq() as defined by the
generic kernel interfaces. Also, using those interfaces guarantees that
your controller set_type callback is called with the descriptor lock held,
thus providing locking against activity on the same interrupt (including
mask/unmask/etc...) automatically. A result is that, for example, MPIC's
own map() implementation calls irq_set_type(NONE) to configure the hardware
to the default triggers.
- To allow the above, the irq_map array entry for the new mapped interrupt
is now set before map() callback is called for the controller.
- The irq_create_of_mapping() (also used by irq_of_parse_and_map()) function
for mapping interrupts from the device-tree now also call the separate
set_irq_type(), and only does so if there is a change in the trigger type.
- While I was at it, I changed pci_read_irq_line() (which is the helper I
would expect most archs to use in their pcibios_fixup() to get the PCI
interrupt routing from the device tree) to also handle a fallback when the
DT mapping fails consisting of reading the PCI_INTERRUPT_PIN to know wether
the device has an interrupt at all, and the the PCI_INTERRUPT_LINE to get an
interrupt number from the device. That number is then mapped using the
default controller, and the trigger is set to level low. That default
behaviour works for several platforms that don't have a proper interrupt
tree like Pegasos. If it doesn't work for your platform, then either
provide a proper interrupt tree from the firmware so that fallback isn't
needed, or don't call pci_read_irq_line()
- Add back a bit that got dropped by my main rework patch for properly
clearing pending IPIs on pSeries when using a kexec
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-07-10 19:44:42 +08:00
|
|
|
if (host == NULL) {
|
|
|
|
|
printk(KERN_WARNING "irq: no irq host found for %s !\n",
|
|
|
|
|
controller->full_name);
|
2006-07-03 19:36:01 +08:00
|
|
|
return NO_IRQ;
|
[PATCH] powerpc: fix trigger handling in the new irq code
This patch slightly reworks the new irq code to fix a small design error. I
removed the passing of the trigger to the map() calls entirely, it was not a
good idea to have one call do two different things. It also fixes a couple of
corner cases.
Mapping a linux virtual irq to a physical irq now does only that. Setting the
trigger is a different action which has a different call.
The main changes are:
- I no longer call host->ops->map() for an already mapped irq, I just return
the virtual number that was already mapped. It was called before to give an
opportunity to change the trigger, but that was causing issues as that could
happen while the interrupt was in use by a device, and because of the
trigger change, map would potentially muck around with things in a racy way.
That was causing much burden on a given's controller implementation of
map() to get it right. This is much simpler now. map() is only called on
the initial mapping of an irq, meaning that you know that this irq is _not_
being used. You can initialize the hardware if you want (though you don't
have to).
- Controllers that can handle different type of triggers (level/edge/etc...)
now implement the standard irq_chip->set_type() call as defined by the
generic code. That means that you can use the standard set_irq_type() to
configure an irq line manually if you wish or (though I don't like that
interface), pass explicit trigger flags to request_irq() as defined by the
generic kernel interfaces. Also, using those interfaces guarantees that
your controller set_type callback is called with the descriptor lock held,
thus providing locking against activity on the same interrupt (including
mask/unmask/etc...) automatically. A result is that, for example, MPIC's
own map() implementation calls irq_set_type(NONE) to configure the hardware
to the default triggers.
- To allow the above, the irq_map array entry for the new mapped interrupt
is now set before map() callback is called for the controller.
- The irq_create_of_mapping() (also used by irq_of_parse_and_map()) function
for mapping interrupts from the device-tree now also call the separate
set_irq_type(), and only does so if there is a change in the trigger type.
- While I was at it, I changed pci_read_irq_line() (which is the helper I
would expect most archs to use in their pcibios_fixup() to get the PCI
interrupt routing from the device tree) to also handle a fallback when the
DT mapping fails consisting of reading the PCI_INTERRUPT_PIN to know wether
the device has an interrupt at all, and the the PCI_INTERRUPT_LINE to get an
interrupt number from the device. That number is then mapped using the
default controller, and the trigger is set to level low. That default
behaviour works for several platforms that don't have a proper interrupt
tree like Pegasos. If it doesn't work for your platform, then either
provide a proper interrupt tree from the firmware so that fallback isn't
needed, or don't call pci_read_irq_line()
- Add back a bit that got dropped by my main rework patch for properly
clearing pending IPIs on pSeries when using a kexec
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-07-10 19:44:42 +08:00
|
|
|
}
|
2006-07-03 19:36:01 +08:00
|
|
|
|
|
|
|
|
/* If host has no translation, then we assume interrupt line */
|
|
|
|
|
if (host->ops->xlate == NULL)
|
|
|
|
|
hwirq = intspec[0];
|
|
|
|
|
else {
|
|
|
|
|
if (host->ops->xlate(host, controller, intspec, intsize,
|
[PATCH] powerpc: fix trigger handling in the new irq code
This patch slightly reworks the new irq code to fix a small design error. I
removed the passing of the trigger to the map() calls entirely, it was not a
good idea to have one call do two different things. It also fixes a couple of
corner cases.
Mapping a linux virtual irq to a physical irq now does only that. Setting the
trigger is a different action which has a different call.
The main changes are:
- I no longer call host->ops->map() for an already mapped irq, I just return
the virtual number that was already mapped. It was called before to give an
opportunity to change the trigger, but that was causing issues as that could
happen while the interrupt was in use by a device, and because of the
trigger change, map would potentially muck around with things in a racy way.
That was causing much burden on a given's controller implementation of
map() to get it right. This is much simpler now. map() is only called on
the initial mapping of an irq, meaning that you know that this irq is _not_
being used. You can initialize the hardware if you want (though you don't
have to).
- Controllers that can handle different type of triggers (level/edge/etc...)
now implement the standard irq_chip->set_type() call as defined by the
generic code. That means that you can use the standard set_irq_type() to
configure an irq line manually if you wish or (though I don't like that
interface), pass explicit trigger flags to request_irq() as defined by the
generic kernel interfaces. Also, using those interfaces guarantees that
your controller set_type callback is called with the descriptor lock held,
thus providing locking against activity on the same interrupt (including
mask/unmask/etc...) automatically. A result is that, for example, MPIC's
own map() implementation calls irq_set_type(NONE) to configure the hardware
to the default triggers.
- To allow the above, the irq_map array entry for the new mapped interrupt
is now set before map() callback is called for the controller.
- The irq_create_of_mapping() (also used by irq_of_parse_and_map()) function
for mapping interrupts from the device-tree now also call the separate
set_irq_type(), and only does so if there is a change in the trigger type.
- While I was at it, I changed pci_read_irq_line() (which is the helper I
would expect most archs to use in their pcibios_fixup() to get the PCI
interrupt routing from the device tree) to also handle a fallback when the
DT mapping fails consisting of reading the PCI_INTERRUPT_PIN to know wether
the device has an interrupt at all, and the the PCI_INTERRUPT_LINE to get an
interrupt number from the device. That number is then mapped using the
default controller, and the trigger is set to level low. That default
behaviour works for several platforms that don't have a proper interrupt
tree like Pegasos. If it doesn't work for your platform, then either
provide a proper interrupt tree from the firmware so that fallback isn't
needed, or don't call pci_read_irq_line()
- Add back a bit that got dropped by my main rework patch for properly
clearing pending IPIs on pSeries when using a kexec
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-07-10 19:44:42 +08:00
|
|
|
&hwirq, &type))
|
2006-07-03 19:36:01 +08:00
|
|
|
return NO_IRQ;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
2006-07-03 19:36:01 +08:00
|
|
|
|
[PATCH] powerpc: fix trigger handling in the new irq code
This patch slightly reworks the new irq code to fix a small design error. I
removed the passing of the trigger to the map() calls entirely, it was not a
good idea to have one call do two different things. It also fixes a couple of
corner cases.
Mapping a linux virtual irq to a physical irq now does only that. Setting the
trigger is a different action which has a different call.
The main changes are:
- I no longer call host->ops->map() for an already mapped irq, I just return
the virtual number that was already mapped. It was called before to give an
opportunity to change the trigger, but that was causing issues as that could
happen while the interrupt was in use by a device, and because of the
trigger change, map would potentially muck around with things in a racy way.
That was causing much burden on a given's controller implementation of
map() to get it right. This is much simpler now. map() is only called on
the initial mapping of an irq, meaning that you know that this irq is _not_
being used. You can initialize the hardware if you want (though you don't
have to).
- Controllers that can handle different type of triggers (level/edge/etc...)
now implement the standard irq_chip->set_type() call as defined by the
generic code. That means that you can use the standard set_irq_type() to
configure an irq line manually if you wish or (though I don't like that
interface), pass explicit trigger flags to request_irq() as defined by the
generic kernel interfaces. Also, using those interfaces guarantees that
your controller set_type callback is called with the descriptor lock held,
thus providing locking against activity on the same interrupt (including
mask/unmask/etc...) automatically. A result is that, for example, MPIC's
own map() implementation calls irq_set_type(NONE) to configure the hardware
to the default triggers.
- To allow the above, the irq_map array entry for the new mapped interrupt
is now set before map() callback is called for the controller.
- The irq_create_of_mapping() (also used by irq_of_parse_and_map()) function
for mapping interrupts from the device-tree now also call the separate
set_irq_type(), and only does so if there is a change in the trigger type.
- While I was at it, I changed pci_read_irq_line() (which is the helper I
would expect most archs to use in their pcibios_fixup() to get the PCI
interrupt routing from the device tree) to also handle a fallback when the
DT mapping fails consisting of reading the PCI_INTERRUPT_PIN to know wether
the device has an interrupt at all, and the the PCI_INTERRUPT_LINE to get an
interrupt number from the device. That number is then mapped using the
default controller, and the trigger is set to level low. That default
behaviour works for several platforms that don't have a proper interrupt
tree like Pegasos. If it doesn't work for your platform, then either
provide a proper interrupt tree from the firmware so that fallback isn't
needed, or don't call pci_read_irq_line()
- Add back a bit that got dropped by my main rework patch for properly
clearing pending IPIs on pSeries when using a kexec
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-07-10 19:44:42 +08:00
|
|
|
/* Create mapping */
|
|
|
|
|
virq = irq_create_mapping(host, hwirq);
|
|
|
|
|
if (virq == NO_IRQ)
|
|
|
|
|
return virq;
|
|
|
|
|
|
|
|
|
|
/* Set type if specified and different than the current one */
|
|
|
|
|
if (type != IRQ_TYPE_NONE &&
|
|
|
|
|
type != (get_irq_desc(virq)->status & IRQF_TRIGGER_MASK))
|
|
|
|
|
set_irq_type(virq, type);
|
|
|
|
|
return virq;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
2006-07-03 19:36:01 +08:00
|
|
|
EXPORT_SYMBOL_GPL(irq_create_of_mapping);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
unsigned int irq_of_parse_and_map(struct device_node *dev, int index)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2006-07-03 19:36:01 +08:00
|
|
|
struct of_irq oirq;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
if (of_irq_map_one(dev, index, &oirq))
|
|
|
|
|
return NO_IRQ;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
return irq_create_of_mapping(oirq.controller, oirq.specifier,
|
|
|
|
|
oirq.size);
|
|
|
|
|
}
|
|
|
|
|
EXPORT_SYMBOL_GPL(irq_of_parse_and_map);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
void irq_dispose_mapping(unsigned int virq)
|
|
|
|
|
{
|
2006-10-24 11:37:34 +08:00
|
|
|
struct irq_host *host;
|
2006-07-03 19:36:01 +08:00
|
|
|
irq_hw_number_t hwirq;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-10-24 11:37:34 +08:00
|
|
|
if (virq == NO_IRQ)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
host = irq_map[virq].host;
|
2006-07-03 19:36:01 +08:00
|
|
|
WARN_ON (host == NULL);
|
|
|
|
|
if (host == NULL)
|
|
|
|
|
return;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
/* Never unmap legacy interrupts */
|
|
|
|
|
if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
|
|
|
|
|
return;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
/* remove chip and handler */
|
|
|
|
|
set_irq_chip_and_handler(virq, NULL, NULL);
|
|
|
|
|
|
|
|
|
|
/* Make sure it's completed */
|
|
|
|
|
synchronize_irq(virq);
|
|
|
|
|
|
|
|
|
|
/* Tell the PIC about it */
|
|
|
|
|
if (host->ops->unmap)
|
|
|
|
|
host->ops->unmap(host, virq);
|
|
|
|
|
smp_mb();
|
|
|
|
|
|
|
|
|
|
/* Clear reverse map */
|
|
|
|
|
hwirq = irq_map[virq].hwirq;
|
|
|
|
|
switch(host->revmap_type) {
|
|
|
|
|
case IRQ_HOST_MAP_LINEAR:
|
|
|
|
|
if (hwirq < host->revmap_data.linear.size)
|
2007-06-01 15:23:26 +08:00
|
|
|
host->revmap_data.linear.revmap[hwirq] = NO_IRQ;
|
2006-07-03 19:36:01 +08:00
|
|
|
break;
|
|
|
|
|
case IRQ_HOST_MAP_TREE:
|
2008-09-04 20:37:07 +08:00
|
|
|
/*
|
|
|
|
|
* Check if radix tree allocated yet, if not then nothing to
|
|
|
|
|
* remove.
|
|
|
|
|
*/
|
|
|
|
|
smp_rmb();
|
|
|
|
|
if (revmap_trees_allocated < 1)
|
2006-07-03 19:36:01 +08:00
|
|
|
break;
|
2008-09-04 20:37:08 +08:00
|
|
|
mutex_lock(&revmap_trees_mutex);
|
2006-07-03 19:36:01 +08:00
|
|
|
radix_tree_delete(&host->revmap_data.tree, hwirq);
|
2008-09-04 20:37:08 +08:00
|
|
|
mutex_unlock(&revmap_trees_mutex);
|
2006-07-03 19:36:01 +08:00
|
|
|
break;
|
|
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
/* Destroy map */
|
|
|
|
|
smp_mb();
|
|
|
|
|
irq_map[virq].hwirq = host->inval_irq;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
/* Set some flags */
|
|
|
|
|
get_irq_desc(virq)->status |= IRQ_NOREQUEST;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
/* Free it */
|
|
|
|
|
irq_free_virt(virq, 1);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
2006-07-03 19:36:01 +08:00
|
|
|
EXPORT_SYMBOL_GPL(irq_dispose_mapping);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
unsigned int irq_find_mapping(struct irq_host *host,
|
|
|
|
|
irq_hw_number_t hwirq)
|
|
|
|
|
{
|
|
|
|
|
unsigned int i;
|
|
|
|
|
unsigned int hint = hwirq % irq_virq_count;
|
|
|
|
|
|
|
|
|
|
/* Look for default host if nececssary */
|
|
|
|
|
if (host == NULL)
|
|
|
|
|
host = irq_default_host;
|
|
|
|
|
if (host == NULL)
|
|
|
|
|
return NO_IRQ;
|
|
|
|
|
|
|
|
|
|
/* legacy -> bail early */
|
|
|
|
|
if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
|
|
|
|
|
return hwirq;
|
|
|
|
|
|
|
|
|
|
/* Slow path does a linear search of the map */
|
|
|
|
|
if (hint < NUM_ISA_INTERRUPTS)
|
|
|
|
|
hint = NUM_ISA_INTERRUPTS;
|
|
|
|
|
i = hint;
|
|
|
|
|
do {
|
|
|
|
|
if (irq_map[i].host == host &&
|
|
|
|
|
irq_map[i].hwirq == hwirq)
|
|
|
|
|
return i;
|
|
|
|
|
i++;
|
|
|
|
|
if (i >= irq_virq_count)
|
|
|
|
|
i = NUM_ISA_INTERRUPTS;
|
|
|
|
|
} while(i != hint);
|
|
|
|
|
return NO_IRQ;
|
|
|
|
|
}
|
|
|
|
|
EXPORT_SYMBOL_GPL(irq_find_mapping);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
|
2008-09-04 20:37:07 +08:00
|
|
|
unsigned int irq_radix_revmap_lookup(struct irq_host *host,
|
|
|
|
|
irq_hw_number_t hwirq)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2006-07-03 19:36:01 +08:00
|
|
|
struct irq_map_entry *ptr;
|
|
|
|
|
unsigned int virq;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2008-09-04 20:37:07 +08:00
|
|
|
/*
|
|
|
|
|
* Check if the radix tree exists and has bee initialized.
|
|
|
|
|
* If not, we fallback to slow mode
|
2006-07-03 19:36:01 +08:00
|
|
|
*/
|
2008-09-04 20:37:07 +08:00
|
|
|
if (revmap_trees_allocated < 2)
|
2006-07-03 19:36:01 +08:00
|
|
|
return irq_find_mapping(host, hwirq);
|
|
|
|
|
|
|
|
|
|
/* Now try to resolve */
|
2008-09-04 20:37:08 +08:00
|
|
|
/*
|
|
|
|
|
* No rcu_read_lock(ing) needed, the ptr returned can't go under us
|
|
|
|
|
* as it's referencing an entry in the static irq_map table.
|
|
|
|
|
*/
|
2008-09-04 20:37:07 +08:00
|
|
|
ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq);
|
2006-08-28 09:17:37 +08:00
|
|
|
|
2008-09-04 20:37:07 +08:00
|
|
|
/*
|
|
|
|
|
* If found in radix tree, then fine.
|
|
|
|
|
* Else fallback to linear lookup - this should not happen in practice
|
|
|
|
|
* as it means that we failed to insert the node in the radix tree.
|
|
|
|
|
*/
|
|
|
|
|
if (ptr)
|
2006-07-03 19:36:01 +08:00
|
|
|
virq = ptr - irq_map;
|
2008-09-04 20:37:07 +08:00
|
|
|
else
|
|
|
|
|
virq = irq_find_mapping(host, hwirq);
|
|
|
|
|
|
|
|
|
|
return virq;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq,
|
|
|
|
|
irq_hw_number_t hwirq)
|
|
|
|
|
{
|
|
|
|
|
|
|
|
|
|
WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE);
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Check if the radix tree exists yet.
|
|
|
|
|
* If not, then the irq will be inserted into the tree when it gets
|
|
|
|
|
* initialized.
|
|
|
|
|
*/
|
|
|
|
|
smp_rmb();
|
|
|
|
|
if (revmap_trees_allocated < 1)
|
|
|
|
|
return;
|
2006-07-03 19:36:01 +08:00
|
|
|
|
2006-08-28 09:17:37 +08:00
|
|
|
if (virq != NO_IRQ) {
|
2008-09-04 20:37:08 +08:00
|
|
|
mutex_lock(&revmap_trees_mutex);
|
2008-09-04 20:37:07 +08:00
|
|
|
radix_tree_insert(&host->revmap_data.tree, hwirq,
|
|
|
|
|
&irq_map[virq]);
|
2008-09-04 20:37:08 +08:00
|
|
|
mutex_unlock(&revmap_trees_mutex);
|
2006-08-28 09:17:37 +08:00
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
unsigned int irq_linear_revmap(struct irq_host *host,
|
|
|
|
|
irq_hw_number_t hwirq)
|
powerpc: Implement accurate task and CPU time accounting
This implements accurate task and cpu time accounting for 64-bit
powerpc kernels. Instead of accounting a whole jiffy of time to a
task on a timer interrupt because that task happened to be running at
the time, we now account time in units of timebase ticks according to
the actual time spent by the task in user mode and kernel mode. We
also count the time spent processing hardware and software interrupts
accurately. This is conditional on CONFIG_VIRT_CPU_ACCOUNTING. If
that is not set, we do tick-based approximate accounting as before.
To get this accurate information, we read either the PURR (processor
utilization of resources register) on POWER5 machines, or the timebase
on other machines on
* each entry to the kernel from usermode
* each exit to usermode
* transitions between process context, hard irq context and soft irq
context in kernel mode
* context switches.
On POWER5 systems with shared-processor logical partitioning we also
read both the PURR and the timebase at each timer interrupt and
context switch in order to determine how much time has been taken by
the hypervisor to run other partitions ("steal" time). Unfortunately,
since we need values of the PURR on both threads at the same time to
accurately calculate the steal time, and since we can only calculate
steal time on a per-core basis, the apportioning of the steal time
between idle time (time which we ceded to the hypervisor in the idle
loop) and actual stolen time is somewhat approximate at the moment.
This is all based quite heavily on what s390 does, and it uses the
generic interfaces that were added by the s390 developers,
i.e. account_system_time(), account_user_time(), etc.
This patch doesn't add any new interfaces between the kernel and
userspace, and doesn't change the units in which time is reported to
userspace by things such as /proc/stat, /proc/<pid>/stat, getrusage(),
times(), etc. Internally the various task and cpu times are stored in
timebase units, but they are converted to USER_HZ units (1/100th of a
second) when reported to userspace. Some precision is therefore lost
but there should not be any accumulating error, since the internal
accumulation is at full precision.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-02-24 07:06:59 +08:00
|
|
|
{
|
2006-07-03 19:36:01 +08:00
|
|
|
unsigned int *revmap;
|
powerpc: Implement accurate task and CPU time accounting
This implements accurate task and cpu time accounting for 64-bit
powerpc kernels. Instead of accounting a whole jiffy of time to a
task on a timer interrupt because that task happened to be running at
the time, we now account time in units of timebase ticks according to
the actual time spent by the task in user mode and kernel mode. We
also count the time spent processing hardware and software interrupts
accurately. This is conditional on CONFIG_VIRT_CPU_ACCOUNTING. If
that is not set, we do tick-based approximate accounting as before.
To get this accurate information, we read either the PURR (processor
utilization of resources register) on POWER5 machines, or the timebase
on other machines on
* each entry to the kernel from usermode
* each exit to usermode
* transitions between process context, hard irq context and soft irq
context in kernel mode
* context switches.
On POWER5 systems with shared-processor logical partitioning we also
read both the PURR and the timebase at each timer interrupt and
context switch in order to determine how much time has been taken by
the hypervisor to run other partitions ("steal" time). Unfortunately,
since we need values of the PURR on both threads at the same time to
accurately calculate the steal time, and since we can only calculate
steal time on a per-core basis, the apportioning of the steal time
between idle time (time which we ceded to the hypervisor in the idle
loop) and actual stolen time is somewhat approximate at the moment.
This is all based quite heavily on what s390 does, and it uses the
generic interfaces that were added by the s390 developers,
i.e. account_system_time(), account_user_time(), etc.
This patch doesn't add any new interfaces between the kernel and
userspace, and doesn't change the units in which time is reported to
userspace by things such as /proc/stat, /proc/<pid>/stat, getrusage(),
times(), etc. Internally the various task and cpu times are stored in
timebase units, but they are converted to USER_HZ units (1/100th of a
second) when reported to userspace. Some precision is therefore lost
but there should not be any accumulating error, since the internal
accumulation is at full precision.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-02-24 07:06:59 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR);
|
|
|
|
|
|
|
|
|
|
/* Check revmap bounds */
|
|
|
|
|
if (unlikely(hwirq >= host->revmap_data.linear.size))
|
|
|
|
|
return irq_find_mapping(host, hwirq);
|
|
|
|
|
|
|
|
|
|
/* Check if revmap was allocated */
|
|
|
|
|
revmap = host->revmap_data.linear.revmap;
|
|
|
|
|
if (unlikely(revmap == NULL))
|
|
|
|
|
return irq_find_mapping(host, hwirq);
|
|
|
|
|
|
|
|
|
|
/* Fill up revmap with slow path if no mapping found */
|
|
|
|
|
if (unlikely(revmap[hwirq] == NO_IRQ))
|
|
|
|
|
revmap[hwirq] = irq_find_mapping(host, hwirq);
|
|
|
|
|
|
|
|
|
|
return revmap[hwirq];
|
powerpc: Implement accurate task and CPU time accounting
This implements accurate task and cpu time accounting for 64-bit
powerpc kernels. Instead of accounting a whole jiffy of time to a
task on a timer interrupt because that task happened to be running at
the time, we now account time in units of timebase ticks according to
the actual time spent by the task in user mode and kernel mode. We
also count the time spent processing hardware and software interrupts
accurately. This is conditional on CONFIG_VIRT_CPU_ACCOUNTING. If
that is not set, we do tick-based approximate accounting as before.
To get this accurate information, we read either the PURR (processor
utilization of resources register) on POWER5 machines, or the timebase
on other machines on
* each entry to the kernel from usermode
* each exit to usermode
* transitions between process context, hard irq context and soft irq
context in kernel mode
* context switches.
On POWER5 systems with shared-processor logical partitioning we also
read both the PURR and the timebase at each timer interrupt and
context switch in order to determine how much time has been taken by
the hypervisor to run other partitions ("steal" time). Unfortunately,
since we need values of the PURR on both threads at the same time to
accurately calculate the steal time, and since we can only calculate
steal time on a per-core basis, the apportioning of the steal time
between idle time (time which we ceded to the hypervisor in the idle
loop) and actual stolen time is somewhat approximate at the moment.
This is all based quite heavily on what s390 does, and it uses the
generic interfaces that were added by the s390 developers,
i.e. account_system_time(), account_user_time(), etc.
This patch doesn't add any new interfaces between the kernel and
userspace, and doesn't change the units in which time is reported to
userspace by things such as /proc/stat, /proc/<pid>/stat, getrusage(),
times(), etc. Internally the various task and cpu times are stored in
timebase units, but they are converted to USER_HZ units (1/100th of a
second) when reported to userspace. Some precision is therefore lost
but there should not be any accumulating error, since the internal
accumulation is at full precision.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-02-24 07:06:59 +08:00
|
|
|
}
|
|
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
unsigned int irq_alloc_virt(struct irq_host *host,
|
|
|
|
|
unsigned int count,
|
|
|
|
|
unsigned int hint)
|
|
|
|
|
{
|
|
|
|
|
unsigned long flags;
|
|
|
|
|
unsigned int i, j, found = NO_IRQ;
|
powerpc: Implement accurate task and CPU time accounting
This implements accurate task and cpu time accounting for 64-bit
powerpc kernels. Instead of accounting a whole jiffy of time to a
task on a timer interrupt because that task happened to be running at
the time, we now account time in units of timebase ticks according to
the actual time spent by the task in user mode and kernel mode. We
also count the time spent processing hardware and software interrupts
accurately. This is conditional on CONFIG_VIRT_CPU_ACCOUNTING. If
that is not set, we do tick-based approximate accounting as before.
To get this accurate information, we read either the PURR (processor
utilization of resources register) on POWER5 machines, or the timebase
on other machines on
* each entry to the kernel from usermode
* each exit to usermode
* transitions between process context, hard irq context and soft irq
context in kernel mode
* context switches.
On POWER5 systems with shared-processor logical partitioning we also
read both the PURR and the timebase at each timer interrupt and
context switch in order to determine how much time has been taken by
the hypervisor to run other partitions ("steal" time). Unfortunately,
since we need values of the PURR on both threads at the same time to
accurately calculate the steal time, and since we can only calculate
steal time on a per-core basis, the apportioning of the steal time
between idle time (time which we ceded to the hypervisor in the idle
loop) and actual stolen time is somewhat approximate at the moment.
This is all based quite heavily on what s390 does, and it uses the
generic interfaces that were added by the s390 developers,
i.e. account_system_time(), account_user_time(), etc.
This patch doesn't add any new interfaces between the kernel and
userspace, and doesn't change the units in which time is reported to
userspace by things such as /proc/stat, /proc/<pid>/stat, getrusage(),
times(), etc. Internally the various task and cpu times are stored in
timebase units, but they are converted to USER_HZ units (1/100th of a
second) when reported to userspace. Some precision is therefore lost
but there should not be any accumulating error, since the internal
accumulation is at full precision.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-02-24 07:06:59 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS))
|
|
|
|
|
return NO_IRQ;
|
|
|
|
|
|
|
|
|
|
spin_lock_irqsave(&irq_big_lock, flags);
|
|
|
|
|
|
|
|
|
|
/* Use hint for 1 interrupt if any */
|
|
|
|
|
if (count == 1 && hint >= NUM_ISA_INTERRUPTS &&
|
|
|
|
|
hint < irq_virq_count && irq_map[hint].host == NULL) {
|
|
|
|
|
found = hint;
|
|
|
|
|
goto hint_found;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Look for count consecutive numbers in the allocatable
|
|
|
|
|
* (non-legacy) space
|
|
|
|
|
*/
|
2006-08-02 08:48:50 +08:00
|
|
|
for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) {
|
|
|
|
|
if (irq_map[i].host != NULL)
|
|
|
|
|
j = 0;
|
|
|
|
|
else
|
|
|
|
|
j++;
|
|
|
|
|
|
|
|
|
|
if (j == count) {
|
|
|
|
|
found = i - count + 1;
|
|
|
|
|
break;
|
|
|
|
|
}
|
2006-07-03 19:36:01 +08:00
|
|
|
}
|
|
|
|
|
if (found == NO_IRQ) {
|
|
|
|
|
spin_unlock_irqrestore(&irq_big_lock, flags);
|
|
|
|
|
return NO_IRQ;
|
|
|
|
|
}
|
|
|
|
|
hint_found:
|
|
|
|
|
for (i = found; i < (found + count); i++) {
|
|
|
|
|
irq_map[i].hwirq = host->inval_irq;
|
|
|
|
|
smp_wmb();
|
|
|
|
|
irq_map[i].host = host;
|
|
|
|
|
}
|
|
|
|
|
spin_unlock_irqrestore(&irq_big_lock, flags);
|
|
|
|
|
return found;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void irq_free_virt(unsigned int virq, unsigned int count)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
|
|
|
|
unsigned long flags;
|
2006-07-03 19:36:01 +08:00
|
|
|
unsigned int i;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
WARN_ON (virq < NUM_ISA_INTERRUPTS);
|
|
|
|
|
WARN_ON (count == 0 || (virq + count) > irq_virq_count);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
spin_lock_irqsave(&irq_big_lock, flags);
|
|
|
|
|
for (i = virq; i < (virq + count); i++) {
|
|
|
|
|
struct irq_host *host;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
if (i < NUM_ISA_INTERRUPTS ||
|
|
|
|
|
(virq + count) > irq_virq_count)
|
|
|
|
|
continue;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
host = irq_map[i].host;
|
|
|
|
|
irq_map[i].hwirq = host->inval_irq;
|
|
|
|
|
smp_wmb();
|
|
|
|
|
irq_map[i].host = NULL;
|
|
|
|
|
}
|
|
|
|
|
spin_unlock_irqrestore(&irq_big_lock, flags);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
2006-07-03 19:36:01 +08:00
|
|
|
|
|
|
|
|
void irq_early_init(void)
|
|
|
|
|
{
|
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < NR_IRQS; i++)
|
|
|
|
|
get_irq_desc(i)->status |= IRQ_NOREQUEST;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* We need to create the radix trees late */
|
|
|
|
|
static int irq_late_init(void)
|
|
|
|
|
{
|
|
|
|
|
struct irq_host *h;
|
2008-09-04 20:37:07 +08:00
|
|
|
unsigned int i;
|
2006-07-03 19:36:01 +08:00
|
|
|
|
2008-09-04 20:37:07 +08:00
|
|
|
/*
|
|
|
|
|
* No mutual exclusion with respect to accessors of the tree is needed
|
|
|
|
|
* here as the synchronization is done via the state variable
|
|
|
|
|
* revmap_trees_allocated.
|
|
|
|
|
*/
|
2006-07-03 19:36:01 +08:00
|
|
|
list_for_each_entry(h, &irq_hosts, link) {
|
|
|
|
|
if (h->revmap_type == IRQ_HOST_MAP_TREE)
|
2008-09-04 20:37:07 +08:00
|
|
|
INIT_RADIX_TREE(&h->revmap_data.tree, GFP_KERNEL);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Make sure the radix trees inits are visible before setting
|
|
|
|
|
* the flag
|
|
|
|
|
*/
|
|
|
|
|
smp_wmb();
|
|
|
|
|
revmap_trees_allocated = 1;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Insert the reverse mapping for those interrupts already present
|
|
|
|
|
* in irq_map[].
|
|
|
|
|
*/
|
2008-09-04 20:37:08 +08:00
|
|
|
mutex_lock(&revmap_trees_mutex);
|
2008-09-04 20:37:07 +08:00
|
|
|
for (i = 0; i < irq_virq_count; i++) {
|
|
|
|
|
if (irq_map[i].host &&
|
|
|
|
|
(irq_map[i].host->revmap_type == IRQ_HOST_MAP_TREE))
|
|
|
|
|
radix_tree_insert(&irq_map[i].host->revmap_data.tree,
|
|
|
|
|
irq_map[i].hwirq, &irq_map[i]);
|
2006-07-03 19:36:01 +08:00
|
|
|
}
|
2008-09-04 20:37:08 +08:00
|
|
|
mutex_unlock(&revmap_trees_mutex);
|
2006-07-03 19:36:01 +08:00
|
|
|
|
2008-09-04 20:37:07 +08:00
|
|
|
/*
|
|
|
|
|
* Make sure the radix trees insertions are visible before setting
|
|
|
|
|
* the flag
|
|
|
|
|
*/
|
|
|
|
|
smp_wmb();
|
|
|
|
|
revmap_trees_allocated = 2;
|
|
|
|
|
|
2006-07-03 19:36:01 +08:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
arch_initcall(irq_late_init);
|
|
|
|
|
|
2007-08-28 16:47:57 +08:00
|
|
|
#ifdef CONFIG_VIRQ_DEBUG
|
|
|
|
|
static int virq_debug_show(struct seq_file *m, void *private)
|
|
|
|
|
{
|
|
|
|
|
unsigned long flags;
|
2009-03-10 22:45:54 +08:00
|
|
|
struct irq_desc *desc;
|
2007-08-28 16:47:57 +08:00
|
|
|
const char *p;
|
|
|
|
|
char none[] = "none";
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
seq_printf(m, "%-5s %-7s %-15s %s\n", "virq", "hwirq",
|
|
|
|
|
"chip name", "host name");
|
|
|
|
|
|
|
|
|
|
for (i = 1; i < NR_IRQS; i++) {
|
|
|
|
|
desc = get_irq_desc(i);
|
|
|
|
|
spin_lock_irqsave(&desc->lock, flags);
|
|
|
|
|
|
|
|
|
|
if (desc->action && desc->action->handler) {
|
|
|
|
|
seq_printf(m, "%5d ", i);
|
|
|
|
|
seq_printf(m, "0x%05lx ", virq_to_hw(i));
|
|
|
|
|
|
|
|
|
|
if (desc->chip && desc->chip->typename)
|
|
|
|
|
p = desc->chip->typename;
|
|
|
|
|
else
|
|
|
|
|
p = none;
|
|
|
|
|
seq_printf(m, "%-15s ", p);
|
|
|
|
|
|
|
|
|
|
if (irq_map[i].host && irq_map[i].host->of_node)
|
|
|
|
|
p = irq_map[i].host->of_node->full_name;
|
|
|
|
|
else
|
|
|
|
|
p = none;
|
|
|
|
|
seq_printf(m, "%s\n", p);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&desc->lock, flags);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int virq_debug_open(struct inode *inode, struct file *file)
|
|
|
|
|
{
|
|
|
|
|
return single_open(file, virq_debug_show, inode->i_private);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static const struct file_operations virq_debug_fops = {
|
|
|
|
|
.open = virq_debug_open,
|
|
|
|
|
.read = seq_read,
|
|
|
|
|
.llseek = seq_lseek,
|
|
|
|
|
.release = single_release,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static int __init irq_debugfs_init(void)
|
|
|
|
|
{
|
|
|
|
|
if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root,
|
2008-05-23 03:49:22 +08:00
|
|
|
NULL, &virq_debug_fops) == NULL)
|
2007-08-28 16:47:57 +08:00
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
__initcall(irq_debugfs_init);
|
|
|
|
|
#endif /* CONFIG_VIRQ_DEBUG */
|
|
|
|
|
|
powerpc: Implement accurate task and CPU time accounting
This implements accurate task and cpu time accounting for 64-bit
powerpc kernels. Instead of accounting a whole jiffy of time to a
task on a timer interrupt because that task happened to be running at
the time, we now account time in units of timebase ticks according to
the actual time spent by the task in user mode and kernel mode. We
also count the time spent processing hardware and software interrupts
accurately. This is conditional on CONFIG_VIRT_CPU_ACCOUNTING. If
that is not set, we do tick-based approximate accounting as before.
To get this accurate information, we read either the PURR (processor
utilization of resources register) on POWER5 machines, or the timebase
on other machines on
* each entry to the kernel from usermode
* each exit to usermode
* transitions between process context, hard irq context and soft irq
context in kernel mode
* context switches.
On POWER5 systems with shared-processor logical partitioning we also
read both the PURR and the timebase at each timer interrupt and
context switch in order to determine how much time has been taken by
the hypervisor to run other partitions ("steal" time). Unfortunately,
since we need values of the PURR on both threads at the same time to
accurately calculate the steal time, and since we can only calculate
steal time on a per-core basis, the apportioning of the steal time
between idle time (time which we ceded to the hypervisor in the idle
loop) and actual stolen time is somewhat approximate at the moment.
This is all based quite heavily on what s390 does, and it uses the
generic interfaces that were added by the s390 developers,
i.e. account_system_time(), account_user_time(), etc.
This patch doesn't add any new interfaces between the kernel and
userspace, and doesn't change the units in which time is reported to
userspace by things such as /proc/stat, /proc/<pid>/stat, getrusage(),
times(), etc. Internally the various task and cpu times are stored in
timebase units, but they are converted to USER_HZ units (1/100th of a
second) when reported to userspace. Some precision is therefore lost
but there should not be any accumulating error, since the internal
accumulation is at full precision.
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-02-24 07:06:59 +08:00
|
|
|
#ifdef CONFIG_PPC64
|
2005-04-17 06:20:36 +08:00
|
|
|
static int __init setup_noirqdistrib(char *str)
|
|
|
|
|
{
|
|
|
|
|
distribute_irqs = 0;
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
__setup("noirqdistrib", setup_noirqdistrib);
|
2005-11-09 15:07:45 +08:00
|
|
|
#endif /* CONFIG_PPC64 */
|