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OpenCloudOS-Kernel/drivers/pinctrl/sunxi/Kconfig

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pinctrl: sunxi: Move the Allwinner pinctrl driver to its own directory This will allow to create numerous files without crippling the main pinctrl directory. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-04-19 00:53:02 +08:00
if ARCH_SUNXI
pinctrl: sunxi: guard sub-directory with CONFIG_PINCTRL_SUNXI CONFIG_PINCTRL_SUNXI is more suitable than CONFIG_ARCH_SUNXI to guard the drivers/pinctrl/sunxi/ directory. (I renamed CONFIG_PINCTRL_SUNXI_COMMON to CONFIG_PINCTRL_SUNXI.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-23 23:32:09 +08:00
config PINCTRL_SUNXI
pinctrl: sunxi: Fix recursive dependency Fix the following configuration error: drivers/pinctrl/sunxi/Kconfig:3:error: recursive dependency detected! drivers/pinctrl/sunxi/Kconfig:3: symbol PINCTRL_SUNXI is selected by PINCTRL_SUN4I_A10 drivers/pinctrl/sunxi/Kconfig:9: symbol PINCTRL_SUN4I_A10 default value contains PINCTRL_SUNXI Add a new intermedia PINCTRL_SUNXI_COMMON, that superseeds the PINCTRL_SUNXI one. We still need to keep PINCTRL_SUNXI at the moment in order to preserve bisectability. Indeed, during that merge window, we also introduced the MACH_SUN* symbols. Since it's going through different trees, we can't rely on the fact that the options will be there, while ARCH_SUNXI still select PINCTRL_SUNXI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-05-22 22:47:12 +08:00
bool
pinctrl: sunxi: Move the Allwinner pinctrl driver to its own directory This will allow to create numerous files without crippling the main pinctrl directory. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-04-19 00:53:02 +08:00
select PINMUX
select GENERIC_PINCONF
pinctrl: sunxi: select GPIOLIB Allwinner pin controllers are also GPIO controllers. Currently, if GPIOLIB is forgot to be chosen, the build of pinctrl-sunxi.c will fail for lacking a lot of gpiochip_* functions. Select GPIOLIB to ensure this driver can be built. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-01 03:08:15 +08:00
select GPIOLIB
pinctrl: sunxi: Move the Allwinner pinctrl driver to its own directory This will allow to create numerous files without crippling the main pinctrl directory. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-04-19 00:53:02 +08:00
pinctrl: sunxi: Introduce per-driver Kconfig options Add one Kconfig option for each driver. This will allow to better control which driver is enabled, instead of having either all or nothing. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-04-26 23:06:57 +08:00
config PINCTRL_SUN4I_A10
pinctrl: sunxi: add support of R40 to A10 pinctrl driver R40 is said to be an upgrade of A20, and its pin configuration is also similar to A20 (and thus similar to A10). Add support for R40 to the A10 pinctrl driver. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-07-22 10:50:54 +08:00
def_bool MACH_SUN4I || MACH_SUN7I || MACH_SUN8I
pinctrl: sunxi: guard sub-directory with CONFIG_PINCTRL_SUNXI CONFIG_PINCTRL_SUNXI is more suitable than CONFIG_ARCH_SUNXI to guard the drivers/pinctrl/sunxi/ directory. (I renamed CONFIG_PINCTRL_SUNXI_COMMON to CONFIG_PINCTRL_SUNXI.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-23 23:32:09 +08:00
select PINCTRL_SUNXI
pinctrl: sunxi: Introduce per-driver Kconfig options Add one Kconfig option for each driver. This will allow to better control which driver is enabled, instead of having either all or nothing. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-04-26 23:06:57 +08:00
pinctrl: sunxi: Add common sun5i pinctrl driver The sun5i SoCs (A10s, A13, GR8) are all based on the same die fit in different packages. Hence, the pins and functions available are just the based on the same set, each SoC having a different subset. Introduce a common pinctrl driver that supports multiple variants to allow to put as much as we can in common. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-09 05:31:16 +08:00
config PINCTRL_SUN5I
pinctrl: sunxi: Remove PINCTRL_SUNXI The PINCTRL_SUNXI configuration was kept only to deal with the introduction of per-machine symbols and the various pintrl drivers through different tree. Now that it's not useful anymore, we can just remove it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-06-29 21:58:19 +08:00
def_bool MACH_SUN5I
pinctrl: sunxi: guard sub-directory with CONFIG_PINCTRL_SUNXI CONFIG_PINCTRL_SUNXI is more suitable than CONFIG_ARCH_SUNXI to guard the drivers/pinctrl/sunxi/ directory. (I renamed CONFIG_PINCTRL_SUNXI_COMMON to CONFIG_PINCTRL_SUNXI.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-23 23:32:09 +08:00
select PINCTRL_SUNXI
pinctrl: sunxi: Introduce per-driver Kconfig options Add one Kconfig option for each driver. This will allow to better control which driver is enabled, instead of having either all or nothing. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-04-26 23:06:57 +08:00
config PINCTRL_SUN6I_A31
pinctrl: sunxi: Remove PINCTRL_SUNXI The PINCTRL_SUNXI configuration was kept only to deal with the introduction of per-machine symbols and the various pintrl drivers through different tree. Now that it's not useful anymore, we can just remove it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-06-29 21:58:19 +08:00
def_bool MACH_SUN6I
pinctrl: sunxi: guard sub-directory with CONFIG_PINCTRL_SUNXI CONFIG_PINCTRL_SUNXI is more suitable than CONFIG_ARCH_SUNXI to guard the drivers/pinctrl/sunxi/ directory. (I renamed CONFIG_PINCTRL_SUNXI_COMMON to CONFIG_PINCTRL_SUNXI.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-23 23:32:09 +08:00
select PINCTRL_SUNXI
pinctrl: sunxi: Introduce per-driver Kconfig options Add one Kconfig option for each driver. This will allow to better control which driver is enabled, instead of having either all or nothing. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-04-26 23:06:57 +08:00
config PINCTRL_SUN6I_A31_R
pinctrl: sunxi: Remove PINCTRL_SUNXI The PINCTRL_SUNXI configuration was kept only to deal with the introduction of per-machine symbols and the various pintrl drivers through different tree. Now that it's not useful anymore, we can just remove it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-06-29 21:58:19 +08:00
def_bool MACH_SUN6I
pinctrl: sunxi: depend on RESET_CONTROLLER The A31 R_PIO driver depends on the reset framework in a mandatory way. Express this by adding a depends on the reset framework in Kconfig Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-05-24 02:50:43 +08:00
depends on RESET_CONTROLLER
pinctrl: sunxi: guard sub-directory with CONFIG_PINCTRL_SUNXI CONFIG_PINCTRL_SUNXI is more suitable than CONFIG_ARCH_SUNXI to guard the drivers/pinctrl/sunxi/ directory. (I renamed CONFIG_PINCTRL_SUNXI_COMMON to CONFIG_PINCTRL_SUNXI.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-23 23:32:09 +08:00
select PINCTRL_SUNXI
pinctrl: sunxi: Introduce per-driver Kconfig options Add one Kconfig option for each driver. This will allow to better control which driver is enabled, instead of having either all or nothing. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-04-26 23:06:57 +08:00
pinctrl: sunxi: Add A23 PIO controller support The A23 uses the same pin controller as previous SoC's from Allwinner. Add support for the pins controlled by the main PIO controller. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-06-17 22:52:51 +08:00
config PINCTRL_SUN8I_A23
def_bool MACH_SUN8I
pinctrl: sunxi: guard sub-directory with CONFIG_PINCTRL_SUNXI CONFIG_PINCTRL_SUNXI is more suitable than CONFIG_ARCH_SUNXI to guard the drivers/pinctrl/sunxi/ directory. (I renamed CONFIG_PINCTRL_SUNXI_COMMON to CONFIG_PINCTRL_SUNXI.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-23 23:32:09 +08:00
select PINCTRL_SUNXI
pinctrl: sunxi: Add A23 PIO controller support The A23 uses the same pin controller as previous SoC's from Allwinner. Add support for the pins controlled by the main PIO controller. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-06-17 22:52:51 +08:00
pinctrl: sunxi: Add allwinner A33 PIO controller support A33 PIO has 7 ports which starts from PB and has two interrupt ports. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-02 17:08:40 +08:00
config PINCTRL_SUN8I_A33
def_bool MACH_SUN8I
pinctrl: sunxi: guard sub-directory with CONFIG_PINCTRL_SUNXI CONFIG_PINCTRL_SUNXI is more suitable than CONFIG_ARCH_SUNXI to guard the drivers/pinctrl/sunxi/ directory. (I renamed CONFIG_PINCTRL_SUNXI_COMMON to CONFIG_PINCTRL_SUNXI.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-23 23:32:09 +08:00
select PINCTRL_SUNXI
pinctrl: sunxi: Add allwinner A33 PIO controller support A33 PIO has 7 ports which starts from PB and has two interrupt ports. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-02 17:08:40 +08:00
pinctrl: sunxi: add allwinner A83T PIO controller support Allwinner A83T soc port controller has 8 ports. It has 3 IRQ banks namely PB, PG, PH. Pinmuxing are different for some pins as compared to sun8i A23 and A33. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-09-22 23:38:55 +08:00
config PINCTRL_SUN8I_A83T
def_bool MACH_SUN8I
pinctrl: sunxi: guard sub-directory with CONFIG_PINCTRL_SUNXI CONFIG_PINCTRL_SUNXI is more suitable than CONFIG_ARCH_SUNXI to guard the drivers/pinctrl/sunxi/ directory. (I renamed CONFIG_PINCTRL_SUNXI_COMMON to CONFIG_PINCTRL_SUNXI.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-23 23:32:09 +08:00
select PINCTRL_SUNXI
pinctrl: sunxi: add allwinner A83T PIO controller support Allwinner A83T soc port controller has 8 ports. It has 3 IRQ banks namely PB, PG, PH. Pinmuxing are different for some pins as compared to sun8i A23 and A33. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-09-22 23:38:55 +08:00
pinctrl: sunxi: Add support for A83T R_PIO The R_PIO on the A83T is almost the same as the one found on the A64, except that the CIR_RX function was moved from pin PL11 to pin PL12. Add a driver for it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-03 22:44:26 +08:00
config PINCTRL_SUN8I_A83T_R
def_bool MACH_SUN8I
select PINCTRL_SUNXI
pinctrl: sunxi: Add A23 R_PIO controller support The A23 has a R_PIO pin controller, similar to the one found on the A31 SoC. Add support for the pins controlled by the R_PIO controller. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-06-17 22:52:52 +08:00
config PINCTRL_SUN8I_A23_R
def_bool MACH_SUN8I
depends on RESET_CONTROLLER
pinctrl: sunxi: guard sub-directory with CONFIG_PINCTRL_SUNXI CONFIG_PINCTRL_SUNXI is more suitable than CONFIG_ARCH_SUNXI to guard the drivers/pinctrl/sunxi/ directory. (I renamed CONFIG_PINCTRL_SUNXI_COMMON to CONFIG_PINCTRL_SUNXI.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-23 23:32:09 +08:00
select PINCTRL_SUNXI
pinctrl: sunxi: Add A23 R_PIO controller support The A23 has a R_PIO pin controller, similar to the one found on the A31 SoC. Add support for the pins controlled by the R_PIO controller. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-06-17 22:52:52 +08:00
pinctrl: sunxi: Add H3 PIO controller support The H3 uses the same pin controller as previous SoC's from Allwinner. Add support for the pins controlled by the main PIO controller. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-05 05:24:41 +08:00
config PINCTRL_SUN8I_H3
def_bool MACH_SUN8I
pinctrl: sunxi: guard sub-directory with CONFIG_PINCTRL_SUNXI CONFIG_PINCTRL_SUNXI is more suitable than CONFIG_ARCH_SUNXI to guard the drivers/pinctrl/sunxi/ directory. (I renamed CONFIG_PINCTRL_SUNXI_COMMON to CONFIG_PINCTRL_SUNXI.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-23 23:32:09 +08:00
select PINCTRL_SUNXI
pinctrl: sunxi: Add H3 PIO controller support The H3 uses the same pin controller as previous SoC's from Allwinner. Add support for the pins controlled by the main PIO controller. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-05 05:24:41 +08:00
pinctrl: sunxi: Add H3 R_PIO controller support H3 has additional PIO controller similar to what we can find on A23. It's a 12 pin port, described in H3 Datasheet rev 1.1, pages 345-350. Signed-off-by: Krzysztof Adamski <k@japko.eu> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-03 05:21:51 +08:00
config PINCTRL_SUN8I_H3_R
pinctrl: sunxi: refactor pinctrl choice selecting for ARM64 ARM64 Allwinner SoCs used to have every pinctrl driver selected in ARCH_SUNXI. Change this to make their default value to (ARM64 && ARCH_SUNXI). Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-02 02:01:07 +08:00
def_bool MACH_SUN8I || (ARM64 && ARCH_SUNXI)
select PINCTRL_SUNXI
pinctrl: sunxi: Add H3 R_PIO controller support H3 has additional PIO controller similar to what we can find on A23. It's a 12 pin port, described in H3 Datasheet rev 1.1, pages 345-350. Signed-off-by: Krzysztof Adamski <k@japko.eu> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-03 05:21:51 +08:00
pinctrl: sunxi: add driver for V3s SoC V3s SoC features only a pin controller (for the lack of CPUs part). Add a driver for this controller. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-03 23:16:27 +08:00
config PINCTRL_SUN8I_V3S
def_bool MACH_SUN8I
select PINCTRL_SUNXI
pinctrl: sunxi: Add A80 pinctrl muxing options The A80 has a rather usual pin controller, the only thing out of the ordinary being that it has 5 interrupts banks, and that some pins have several options for the same functions. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-10-29 05:41:27 +08:00
config PINCTRL_SUN9I_A80
def_bool MACH_SUN9I
pinctrl: sunxi: guard sub-directory with CONFIG_PINCTRL_SUNXI CONFIG_PINCTRL_SUNXI is more suitable than CONFIG_ARCH_SUNXI to guard the drivers/pinctrl/sunxi/ directory. (I renamed CONFIG_PINCTRL_SUNXI_COMMON to CONFIG_PINCTRL_SUNXI.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-23 23:32:09 +08:00
select PINCTRL_SUNXI
pinctrl: sunxi: Add A80 pinctrl muxing options The A80 has a rather usual pin controller, the only thing out of the ordinary being that it has 5 interrupts banks, and that some pins have several options for the same functions. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-10-29 05:41:27 +08:00
pinctrl: sunxi: Add A80 special pin controller Like the previous designs, the A80 has a special pin controller for the critical pins, like the PMIC bus. Add a driver for this controller. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> [wens: Add A80 compatible strings to bindings doc; fix pin function names based on v1.3 datasheet; constify of_device_id table] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-17 00:39:42 +08:00
config PINCTRL_SUN9I_A80_R
def_bool MACH_SUN9I
depends on RESET_CONTROLLER
pinctrl: sunxi: guard sub-directory with CONFIG_PINCTRL_SUNXI CONFIG_PINCTRL_SUNXI is more suitable than CONFIG_ARCH_SUNXI to guard the drivers/pinctrl/sunxi/ directory. (I renamed CONFIG_PINCTRL_SUNXI_COMMON to CONFIG_PINCTRL_SUNXI.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-23 23:32:09 +08:00
select PINCTRL_SUNXI
pinctrl: sunxi: Add A80 special pin controller Like the previous designs, the A80 has a special pin controller for the critical pins, like the PMIC bus. Add a driver for this controller. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> [wens: Add A80 compatible strings to bindings doc; fix pin function names based on v1.3 datasheet; constify of_device_id table] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-17 00:39:42 +08:00
drivers: pinctrl: add driver for Allwinner A64 SoC Based on the Allwinner A64 user manual and on the previous sunxi pinctrl drivers this introduces the pin multiplex assignments for the ARMv8 Allwinner A64 SoC. Port A is apparently used for the fixed function DRAM controller, so the ports start at B here (the manual mentions "n from 1 to 7", so not starting at 0). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-08 17:37:59 +08:00
config PINCTRL_SUN50I_A64
pinctrl: sunxi: refactor pinctrl choice selecting for ARM64 ARM64 Allwinner SoCs used to have every pinctrl driver selected in ARCH_SUNXI. Change this to make their default value to (ARM64 && ARCH_SUNXI). Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-02 02:01:07 +08:00
def_bool ARM64 && ARCH_SUNXI
drivers: pinctrl: add driver for Allwinner A64 SoC Based on the Allwinner A64 user manual and on the previous sunxi pinctrl drivers this introduces the pin multiplex assignments for the ARMv8 Allwinner A64 SoC. Port A is apparently used for the fixed function DRAM controller, so the ports start at B here (the manual mentions "n from 1 to 7", so not starting at 0). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-08 17:37:59 +08:00
select PINCTRL_SUNXI
pinctrl: sunxi: Add A64 R_PIO controller support The A64 has a R_PIO pin controller, similar to the one found on the H3 SoC. Add support for the pins controlled by the R_PIO controller. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-02 02:09:30 +08:00
config PINCTRL_SUN50I_A64_R
def_bool ARM64 && ARCH_SUNXI
select PINCTRL_SUNXI
drivers: pinctrl: add driver for Allwinner H5 SoC Based on the Allwinner H5 datasheet and the pinctrl driver of the backward-compatible H3 this introduces the pin multiplex assignments for the H5 SoC. H5 introduced some more pin functions (e.g. three more groups of TS pins, and one more groups of SIM pins) than H3. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-26 23:48:51 +08:00
config PINCTRL_SUN50I_H5
pinctrl: sunxi: refactor pinctrl choice selecting for ARM64 ARM64 Allwinner SoCs used to have every pinctrl driver selected in ARCH_SUNXI. Change this to make their default value to (ARM64 && ARCH_SUNXI). Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-02 02:01:07 +08:00
def_bool ARM64 && ARCH_SUNXI
drivers: pinctrl: add driver for Allwinner H5 SoC Based on the Allwinner H5 datasheet and the pinctrl driver of the backward-compatible H3 this introduces the pin multiplex assignments for the H5 SoC. H5 introduced some more pin functions (e.g. three more groups of TS pins, and one more groups of SIM pins) than H3. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-26 23:48:51 +08:00
select PINCTRL_SUNXI
pinctrl: sunxi: add support for the Allwinner H6 main pin controller The Allwinner H6 SoC has two pin controllers, one main controller (called CPUX-PORT in user manual) and one controller in CPUs power domain (called CPUS-PORT in user manual). This commit introduces support for the main pin controller on H6. The pin bank A and B are not wired out and hidden from the SoC's documents, however it's shown that the "ATE" (an AC200 chip co-packaged with the H6 die) is connected to the main SoC die via these pin banks. The information about these banks is just copied from the BSP pinctrl driver, but re-formatted to fit the mainline pinctrl driver format. The GPIO functions are dropped, as they're impossible to use -- except a GPIO&IRQ only pin (PB20) which might be the IRQ of ATE. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-16 22:02:10 +08:00
config PINCTRL_SUN50I_H6
def_bool ARM64 && ARCH_SUNXI
select PINCTRL_SUNXI
pinctrl: sunxi: Move the Allwinner pinctrl driver to its own directory This will allow to create numerous files without crippling the main pinctrl directory. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-04-19 00:53:02 +08:00
endif