License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 22:07:57 +08:00
|
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// SPDX-License-Identifier: GPL-2.0
|
2005-04-17 06:20:36 +08:00
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/*
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* linux/arch/alpha/kernel/core_titan.c
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*
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* Code common to all TITAN core logic chips.
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*/
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#define __EXTERN_INLINE inline
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#include <asm/io.h>
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#include <asm/core_titan.h>
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#undef __EXTERN_INLINE
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/sched.h>
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#include <linux/init.h>
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#include <linux/vmalloc.h>
|
2018-10-31 06:09:49 +08:00
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#include <linux/memblock.h>
|
2005-04-17 06:20:36 +08:00
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#include <asm/ptrace.h>
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#include <asm/smp.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
|
ALPHA: support graphics on non-zero PCI domains
This code replaces earlier and incomplete handling of graphics on non-zero PCI
domains (aka hoses or peer PCI buses).
An option (CONFIG_VGA_HOSE) is set TRUE if configuring a GENERIC kernel, or a
kernel for MARVEL, TITAN, or TSUNAMI machines, as these are the machines whose
SRM consoles are capable of configuring and handling graphics options on
non-zero hoses. All other machines have the option set FALSE.
A routine, "find_console_vga_hose()", is used to find the graphics device
which the machine's firmware believes is the console device, and it sets a
global (pci_vga_hose) for later use in managing access to the device. This is
called in "init_arch" on TITAN and TSUNAMI machines; MARVEL machines use a
custom version of this routine because of extra complexity.
A routine, "locate_and_init_vga()", is used to find the graphics device and
set a global (pci_vga_hose) for later use in managing access to the device, in
the case where "find_console_vga_hose" has failed.
Various adjustments are made to the ioremap and ioportmap routines for
detecting and translating "legacy" VGA register and memory references to the
real PCI domain.
[akpm@linux-foundation.org: don't statically init bss]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Jay Estabrook <jay.estabrook@hp.com>
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-01 15:47:03 +08:00
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#include <asm/vga.h>
|
2005-04-17 06:20:36 +08:00
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#include "proto.h"
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#include "pci_impl.h"
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/* Save Titan configuration data as the console had it set up. */
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struct
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{
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unsigned long wsba[4];
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unsigned long wsm[4];
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unsigned long tba[4];
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} saved_config[4] __attribute__((common));
|
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|
|
|
ALPHA: support graphics on non-zero PCI domains
This code replaces earlier and incomplete handling of graphics on non-zero PCI
domains (aka hoses or peer PCI buses).
An option (CONFIG_VGA_HOSE) is set TRUE if configuring a GENERIC kernel, or a
kernel for MARVEL, TITAN, or TSUNAMI machines, as these are the machines whose
SRM consoles are capable of configuring and handling graphics options on
non-zero hoses. All other machines have the option set FALSE.
A routine, "find_console_vga_hose()", is used to find the graphics device
which the machine's firmware believes is the console device, and it sets a
global (pci_vga_hose) for later use in managing access to the device. This is
called in "init_arch" on TITAN and TSUNAMI machines; MARVEL machines use a
custom version of this routine because of extra complexity.
A routine, "locate_and_init_vga()", is used to find the graphics device and
set a global (pci_vga_hose) for later use in managing access to the device, in
the case where "find_console_vga_hose" has failed.
Various adjustments are made to the ioremap and ioportmap routines for
detecting and translating "legacy" VGA register and memory references to the
real PCI domain.
[akpm@linux-foundation.org: don't statically init bss]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Jay Estabrook <jay.estabrook@hp.com>
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-01 15:47:03 +08:00
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/*
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* Is PChip 1 present? No need to query it more than once.
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*/
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static int titan_pchip1_present;
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|
2005-04-17 06:20:36 +08:00
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/*
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* BIOS32-style PCI interface:
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*/
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#define DEBUG_CONFIG 0
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#if DEBUG_CONFIG
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# define DBG_CFG(args) printk args
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#else
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# define DBG_CFG(args)
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#endif
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/*
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* Routines to access TIG registers.
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*/
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static inline volatile unsigned long *
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mk_tig_addr(int offset)
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{
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return (volatile unsigned long *)(TITAN_TIG_SPACE + (offset << 6));
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}
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static inline u8
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titan_read_tig(int offset, u8 value)
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{
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volatile unsigned long *tig_addr = mk_tig_addr(offset);
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return (u8)(*tig_addr & 0xff);
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}
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static inline void
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titan_write_tig(int offset, u8 value)
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{
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volatile unsigned long *tig_addr = mk_tig_addr(offset);
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*tig_addr = (unsigned long)value;
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}
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/*
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* Given a bus, device, and function number, compute resulting
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* configuration space address
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* accordingly. It is therefore not safe to have concurrent
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* invocations to configuration space access routines, but there
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* really shouldn't be any need for this.
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*
|
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* Note that all config space accesses use Type 1 address format.
|
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*
|
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* Note also that type 1 is determined by non-zero bus number.
|
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*
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* Type 1:
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*
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* 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1
|
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* 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
|
|
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* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|
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* | | | | | | | | | | |B|B|B|B|B|B|B|B|D|D|D|D|D|F|F|F|R|R|R|R|R|R|0|1|
|
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|
* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|
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*
|
|
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|
|
* 31:24 reserved
|
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|
* 23:16 bus number (8 bits = 128 possible buses)
|
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|
* 15:11 Device number (5 bits)
|
|
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|
* 10:8 function number
|
|
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|
* 7:2 register number
|
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*
|
|
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|
* Notes:
|
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|
|
* The function number selects which function of a multi-function device
|
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|
* (e.g., SCSI and Ethernet).
|
|
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*
|
|
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|
* The register selects a DWORD (32 bit) register offset. Hence it
|
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* doesn't get shifted by 2 bits as we want to "drop" the bottom two
|
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* bits.
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|
*/
|
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static int
|
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mk_conf_addr(struct pci_bus *pbus, unsigned int device_fn, int where,
|
|
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|
|
unsigned long *pci_addr, unsigned char *type1)
|
|
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|
|
{
|
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struct pci_controller *hose = pbus->sysdata;
|
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unsigned long addr;
|
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|
|
u8 bus = pbus->number;
|
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DBG_CFG(("mk_conf_addr(bus=%d ,device_fn=0x%x, where=0x%x, "
|
|
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|
|
"pci_addr=0x%p, type1=0x%p)\n",
|
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|
bus, device_fn, where, pci_addr, type1));
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if (!pbus->parent) /* No parent means peer PCI bus. */
|
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bus = 0;
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*type1 = (bus != 0);
|
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addr = (bus << 16) | (device_fn << 8) | where;
|
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addr |= hose->config_space_base;
|
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*pci_addr = addr;
|
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DBG_CFG(("mk_conf_addr: returning pci_addr 0x%lx\n", addr));
|
|
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|
return 0;
|
|
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|
}
|
|
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|
|
static int
|
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|
titan_read_config(struct pci_bus *bus, unsigned int devfn, int where,
|
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int size, u32 *value)
|
|
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{
|
|
|
|
|
unsigned long addr;
|
|
|
|
|
unsigned char type1;
|
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|
|
|
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if (mk_conf_addr(bus, devfn, where, &addr, &type1))
|
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return PCIBIOS_DEVICE_NOT_FOUND;
|
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|
|
|
|
|
|
|
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switch (size) {
|
|
|
|
|
case 1:
|
|
|
|
|
*value = __kernel_ldbu(*(vucp)addr);
|
|
|
|
|
break;
|
|
|
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|
case 2:
|
|
|
|
|
*value = __kernel_ldwu(*(vusp)addr);
|
|
|
|
|
break;
|
|
|
|
|
case 4:
|
|
|
|
|
*value = *(vuip)addr;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return PCIBIOS_SUCCESSFUL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
titan_write_config(struct pci_bus *bus, unsigned int devfn, int where,
|
|
|
|
|
int size, u32 value)
|
|
|
|
|
{
|
|
|
|
|
unsigned long addr;
|
|
|
|
|
unsigned char type1;
|
|
|
|
|
|
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if (mk_conf_addr(bus, devfn, where, &addr, &type1))
|
|
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|
|
return PCIBIOS_DEVICE_NOT_FOUND;
|
|
|
|
|
|
|
|
|
|
switch (size) {
|
|
|
|
|
case 1:
|
|
|
|
|
__kernel_stb(value, *(vucp)addr);
|
|
|
|
|
mb();
|
|
|
|
|
__kernel_ldbu(*(vucp)addr);
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
__kernel_stw(value, *(vusp)addr);
|
|
|
|
|
mb();
|
|
|
|
|
__kernel_ldwu(*(vusp)addr);
|
|
|
|
|
break;
|
|
|
|
|
case 4:
|
|
|
|
|
*(vuip)addr = value;
|
|
|
|
|
mb();
|
|
|
|
|
*(vuip)addr;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return PCIBIOS_SUCCESSFUL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
struct pci_ops titan_pci_ops =
|
|
|
|
|
{
|
|
|
|
|
.read = titan_read_config,
|
|
|
|
|
.write = titan_write_config,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
titan_pci_tbi(struct pci_controller *hose, dma_addr_t start, dma_addr_t end)
|
|
|
|
|
{
|
|
|
|
|
titan_pachip *pachip =
|
|
|
|
|
(hose->index & 1) ? TITAN_pachip1 : TITAN_pachip0;
|
|
|
|
|
titan_pachip_port *port;
|
|
|
|
|
volatile unsigned long *csr;
|
|
|
|
|
unsigned long value;
|
|
|
|
|
|
|
|
|
|
/* Get the right hose. */
|
|
|
|
|
port = &pachip->g_port;
|
|
|
|
|
if (hose->index & 2)
|
|
|
|
|
port = &pachip->a_port;
|
|
|
|
|
|
|
|
|
|
/* We can invalidate up to 8 tlb entries in a go. The flush
|
|
|
|
|
matches against <31:16> in the pci address.
|
|
|
|
|
Note that gtlbi* and atlbi* are in the same place in the g_port
|
|
|
|
|
and a_port, respectively, so the g_port offset can be used
|
|
|
|
|
even if hose is an a_port */
|
|
|
|
|
csr = &port->port_specific.g.gtlbia.csr;
|
|
|
|
|
if (((start ^ end) & 0xffff0000) == 0)
|
|
|
|
|
csr = &port->port_specific.g.gtlbiv.csr;
|
|
|
|
|
|
|
|
|
|
/* For TBIA, it doesn't matter what value we write. For TBI,
|
|
|
|
|
it's the shifted tag bits. */
|
|
|
|
|
value = (start & 0xffff0000) >> 12;
|
|
|
|
|
|
|
|
|
|
wmb();
|
|
|
|
|
*csr = value;
|
|
|
|
|
mb();
|
|
|
|
|
*csr;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
titan_query_agp(titan_pachip_port *port)
|
|
|
|
|
{
|
|
|
|
|
union TPAchipPCTL pctl;
|
|
|
|
|
|
|
|
|
|
/* set up APCTL */
|
|
|
|
|
pctl.pctl_q_whole = port->pctl.csr;
|
|
|
|
|
|
|
|
|
|
return pctl.pctl_r_bits.apctl_v_agp_present;
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void __init
|
|
|
|
|
titan_init_one_pachip_port(titan_pachip_port *port, int index)
|
|
|
|
|
{
|
|
|
|
|
struct pci_controller *hose;
|
|
|
|
|
|
|
|
|
|
hose = alloc_pci_controller();
|
|
|
|
|
if (index == 0)
|
|
|
|
|
pci_isa_hose = hose;
|
|
|
|
|
hose->io_space = alloc_resource();
|
|
|
|
|
hose->mem_space = alloc_resource();
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* This is for userland consumption. The 40-bit PIO bias that we
|
|
|
|
|
* use in the kernel through KSEG doesn't work in the page table
|
|
|
|
|
* based user mappings. (43-bit KSEG sign extends the physical
|
|
|
|
|
* address from bit 40 to hit the I/O bit - mapped addresses don't).
|
|
|
|
|
* So make sure we get the 43-bit PIO bias.
|
|
|
|
|
*/
|
|
|
|
|
hose->sparse_mem_base = 0;
|
|
|
|
|
hose->sparse_io_base = 0;
|
|
|
|
|
hose->dense_mem_base
|
|
|
|
|
= (TITAN_MEM(index) & 0xffffffffffUL) | 0x80000000000UL;
|
|
|
|
|
hose->dense_io_base
|
|
|
|
|
= (TITAN_IO(index) & 0xffffffffffUL) | 0x80000000000UL;
|
|
|
|
|
|
|
|
|
|
hose->config_space_base = TITAN_CONF(index);
|
|
|
|
|
hose->index = index;
|
|
|
|
|
|
|
|
|
|
hose->io_space->start = TITAN_IO(index) - TITAN_IO_BIAS;
|
|
|
|
|
hose->io_space->end = hose->io_space->start + TITAN_IO_SPACE - 1;
|
|
|
|
|
hose->io_space->name = pci_io_names[index];
|
|
|
|
|
hose->io_space->flags = IORESOURCE_IO;
|
|
|
|
|
|
|
|
|
|
hose->mem_space->start = TITAN_MEM(index) - TITAN_MEM_BIAS;
|
|
|
|
|
hose->mem_space->end = hose->mem_space->start + 0xffffffff;
|
|
|
|
|
hose->mem_space->name = pci_mem_names[index];
|
|
|
|
|
hose->mem_space->flags = IORESOURCE_MEM;
|
|
|
|
|
|
|
|
|
|
if (request_resource(&ioport_resource, hose->io_space) < 0)
|
|
|
|
|
printk(KERN_ERR "Failed to request IO on hose %d\n", index);
|
|
|
|
|
if (request_resource(&iomem_resource, hose->mem_space) < 0)
|
|
|
|
|
printk(KERN_ERR "Failed to request MEM on hose %d\n", index);
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Save the existing PCI window translations. SRM will
|
|
|
|
|
* need them when we go to reboot.
|
|
|
|
|
*/
|
|
|
|
|
saved_config[index].wsba[0] = port->wsba[0].csr;
|
|
|
|
|
saved_config[index].wsm[0] = port->wsm[0].csr;
|
|
|
|
|
saved_config[index].tba[0] = port->tba[0].csr;
|
|
|
|
|
|
|
|
|
|
saved_config[index].wsba[1] = port->wsba[1].csr;
|
|
|
|
|
saved_config[index].wsm[1] = port->wsm[1].csr;
|
|
|
|
|
saved_config[index].tba[1] = port->tba[1].csr;
|
|
|
|
|
|
|
|
|
|
saved_config[index].wsba[2] = port->wsba[2].csr;
|
|
|
|
|
saved_config[index].wsm[2] = port->wsm[2].csr;
|
|
|
|
|
saved_config[index].tba[2] = port->tba[2].csr;
|
|
|
|
|
|
|
|
|
|
saved_config[index].wsba[3] = port->wsba[3].csr;
|
|
|
|
|
saved_config[index].wsm[3] = port->wsm[3].csr;
|
|
|
|
|
saved_config[index].tba[3] = port->tba[3].csr;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Set up the PCI to main memory translation windows.
|
|
|
|
|
*
|
|
|
|
|
* Note: Window 3 on Titan is Scatter-Gather ONLY.
|
|
|
|
|
*
|
|
|
|
|
* Window 0 is scatter-gather 8MB at 8MB (for isa)
|
|
|
|
|
* Window 1 is direct access 1GB at 2GB
|
|
|
|
|
* Window 2 is scatter-gather 1GB at 3GB
|
|
|
|
|
*/
|
|
|
|
|
hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0);
|
|
|
|
|
hose->sg_isa->align_entry = 8; /* 64KB for ISA */
|
|
|
|
|
|
|
|
|
|
hose->sg_pci = iommu_arena_new(hose, 0xc0000000, 0x40000000, 0);
|
|
|
|
|
hose->sg_pci->align_entry = 4; /* Titan caches 4 PTEs at a time */
|
|
|
|
|
|
|
|
|
|
port->wsba[0].csr = hose->sg_isa->dma_base | 3;
|
|
|
|
|
port->wsm[0].csr = (hose->sg_isa->size - 1) & 0xfff00000;
|
|
|
|
|
port->tba[0].csr = virt_to_phys(hose->sg_isa->ptes);
|
|
|
|
|
|
|
|
|
|
port->wsba[1].csr = __direct_map_base | 1;
|
|
|
|
|
port->wsm[1].csr = (__direct_map_size - 1) & 0xfff00000;
|
|
|
|
|
port->tba[1].csr = 0;
|
|
|
|
|
|
|
|
|
|
port->wsba[2].csr = hose->sg_pci->dma_base | 3;
|
|
|
|
|
port->wsm[2].csr = (hose->sg_pci->size - 1) & 0xfff00000;
|
|
|
|
|
port->tba[2].csr = virt_to_phys(hose->sg_pci->ptes);
|
|
|
|
|
|
|
|
|
|
port->wsba[3].csr = 0;
|
|
|
|
|
|
|
|
|
|
/* Enable the Monster Window to make DAC pci64 possible. */
|
|
|
|
|
port->pctl.csr |= pctl_m_mwin;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* If it's an AGP port, initialize agplastwr.
|
|
|
|
|
*/
|
|
|
|
|
if (titan_query_agp(port))
|
|
|
|
|
port->port_specific.a.agplastwr.csr = __direct_map_base;
|
|
|
|
|
|
|
|
|
|
titan_pci_tbi(hose, 0, -1);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void __init
|
|
|
|
|
titan_init_pachips(titan_pachip *pachip0, titan_pachip *pachip1)
|
|
|
|
|
{
|
ALPHA: support graphics on non-zero PCI domains
This code replaces earlier and incomplete handling of graphics on non-zero PCI
domains (aka hoses or peer PCI buses).
An option (CONFIG_VGA_HOSE) is set TRUE if configuring a GENERIC kernel, or a
kernel for MARVEL, TITAN, or TSUNAMI machines, as these are the machines whose
SRM consoles are capable of configuring and handling graphics options on
non-zero hoses. All other machines have the option set FALSE.
A routine, "find_console_vga_hose()", is used to find the graphics device
which the machine's firmware believes is the console device, and it sets a
global (pci_vga_hose) for later use in managing access to the device. This is
called in "init_arch" on TITAN and TSUNAMI machines; MARVEL machines use a
custom version of this routine because of extra complexity.
A routine, "locate_and_init_vga()", is used to find the graphics device and
set a global (pci_vga_hose) for later use in managing access to the device, in
the case where "find_console_vga_hose" has failed.
Various adjustments are made to the ioremap and ioportmap routines for
detecting and translating "legacy" VGA register and memory references to the
real PCI domain.
[akpm@linux-foundation.org: don't statically init bss]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Jay Estabrook <jay.estabrook@hp.com>
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-01 15:47:03 +08:00
|
|
|
|
titan_pchip1_present = TITAN_cchip->csc.csr & 1L<<14;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
|
/* Init the ports in hose order... */
|
|
|
|
|
titan_init_one_pachip_port(&pachip0->g_port, 0); /* hose 0 */
|
ALPHA: support graphics on non-zero PCI domains
This code replaces earlier and incomplete handling of graphics on non-zero PCI
domains (aka hoses or peer PCI buses).
An option (CONFIG_VGA_HOSE) is set TRUE if configuring a GENERIC kernel, or a
kernel for MARVEL, TITAN, or TSUNAMI machines, as these are the machines whose
SRM consoles are capable of configuring and handling graphics options on
non-zero hoses. All other machines have the option set FALSE.
A routine, "find_console_vga_hose()", is used to find the graphics device
which the machine's firmware believes is the console device, and it sets a
global (pci_vga_hose) for later use in managing access to the device. This is
called in "init_arch" on TITAN and TSUNAMI machines; MARVEL machines use a
custom version of this routine because of extra complexity.
A routine, "locate_and_init_vga()", is used to find the graphics device and
set a global (pci_vga_hose) for later use in managing access to the device, in
the case where "find_console_vga_hose" has failed.
Various adjustments are made to the ioremap and ioportmap routines for
detecting and translating "legacy" VGA register and memory references to the
real PCI domain.
[akpm@linux-foundation.org: don't statically init bss]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Jay Estabrook <jay.estabrook@hp.com>
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-01 15:47:03 +08:00
|
|
|
|
if (titan_pchip1_present)
|
2005-04-17 06:20:36 +08:00
|
|
|
|
titan_init_one_pachip_port(&pachip1->g_port, 1);/* hose 1 */
|
|
|
|
|
titan_init_one_pachip_port(&pachip0->a_port, 2); /* hose 2 */
|
ALPHA: support graphics on non-zero PCI domains
This code replaces earlier and incomplete handling of graphics on non-zero PCI
domains (aka hoses or peer PCI buses).
An option (CONFIG_VGA_HOSE) is set TRUE if configuring a GENERIC kernel, or a
kernel for MARVEL, TITAN, or TSUNAMI machines, as these are the machines whose
SRM consoles are capable of configuring and handling graphics options on
non-zero hoses. All other machines have the option set FALSE.
A routine, "find_console_vga_hose()", is used to find the graphics device
which the machine's firmware believes is the console device, and it sets a
global (pci_vga_hose) for later use in managing access to the device. This is
called in "init_arch" on TITAN and TSUNAMI machines; MARVEL machines use a
custom version of this routine because of extra complexity.
A routine, "locate_and_init_vga()", is used to find the graphics device and
set a global (pci_vga_hose) for later use in managing access to the device, in
the case where "find_console_vga_hose" has failed.
Various adjustments are made to the ioremap and ioportmap routines for
detecting and translating "legacy" VGA register and memory references to the
real PCI domain.
[akpm@linux-foundation.org: don't statically init bss]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Jay Estabrook <jay.estabrook@hp.com>
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-01 15:47:03 +08:00
|
|
|
|
if (titan_pchip1_present)
|
2005-04-17 06:20:36 +08:00
|
|
|
|
titan_init_one_pachip_port(&pachip1->a_port, 3);/* hose 3 */
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void __init
|
|
|
|
|
titan_init_arch(void)
|
|
|
|
|
{
|
|
|
|
|
#if 0
|
2008-04-28 17:13:46 +08:00
|
|
|
|
printk("%s: titan_init_arch()\n", __func__);
|
|
|
|
|
printk("%s: CChip registers:\n", __func__);
|
|
|
|
|
printk("%s: CSR_CSC 0x%lx\n", __func__, TITAN_cchip->csc.csr);
|
|
|
|
|
printk("%s: CSR_MTR 0x%lx\n", __func__, TITAN_cchip->mtr.csr);
|
|
|
|
|
printk("%s: CSR_MISC 0x%lx\n", __func__, TITAN_cchip->misc.csr);
|
|
|
|
|
printk("%s: CSR_DIM0 0x%lx\n", __func__, TITAN_cchip->dim0.csr);
|
|
|
|
|
printk("%s: CSR_DIM1 0x%lx\n", __func__, TITAN_cchip->dim1.csr);
|
|
|
|
|
printk("%s: CSR_DIR0 0x%lx\n", __func__, TITAN_cchip->dir0.csr);
|
|
|
|
|
printk("%s: CSR_DIR1 0x%lx\n", __func__, TITAN_cchip->dir1.csr);
|
|
|
|
|
printk("%s: CSR_DRIR 0x%lx\n", __func__, TITAN_cchip->drir.csr);
|
|
|
|
|
|
|
|
|
|
printk("%s: DChip registers:\n", __func__);
|
|
|
|
|
printk("%s: CSR_DSC 0x%lx\n", __func__, TITAN_dchip->dsc.csr);
|
|
|
|
|
printk("%s: CSR_STR 0x%lx\n", __func__, TITAN_dchip->str.csr);
|
|
|
|
|
printk("%s: CSR_DREV 0x%lx\n", __func__, TITAN_dchip->drev.csr);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
boot_cpuid = __hard_smp_processor_id();
|
|
|
|
|
|
|
|
|
|
/* With multiple PCI busses, we play with I/O as physical addrs. */
|
|
|
|
|
ioport_resource.end = ~0UL;
|
ALPHA: support graphics on non-zero PCI domains
This code replaces earlier and incomplete handling of graphics on non-zero PCI
domains (aka hoses or peer PCI buses).
An option (CONFIG_VGA_HOSE) is set TRUE if configuring a GENERIC kernel, or a
kernel for MARVEL, TITAN, or TSUNAMI machines, as these are the machines whose
SRM consoles are capable of configuring and handling graphics options on
non-zero hoses. All other machines have the option set FALSE.
A routine, "find_console_vga_hose()", is used to find the graphics device
which the machine's firmware believes is the console device, and it sets a
global (pci_vga_hose) for later use in managing access to the device. This is
called in "init_arch" on TITAN and TSUNAMI machines; MARVEL machines use a
custom version of this routine because of extra complexity.
A routine, "locate_and_init_vga()", is used to find the graphics device and
set a global (pci_vga_hose) for later use in managing access to the device, in
the case where "find_console_vga_hose" has failed.
Various adjustments are made to the ioremap and ioportmap routines for
detecting and translating "legacy" VGA register and memory references to the
real PCI domain.
[akpm@linux-foundation.org: don't statically init bss]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Jay Estabrook <jay.estabrook@hp.com>
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-01 15:47:03 +08:00
|
|
|
|
iomem_resource.end = ~0UL;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
|
/* PCI DMA Direct Mapping is 1GB at 2GB. */
|
|
|
|
|
__direct_map_base = 0x80000000;
|
|
|
|
|
__direct_map_size = 0x40000000;
|
|
|
|
|
|
|
|
|
|
/* Init the PA chip(s). */
|
|
|
|
|
titan_init_pachips(TITAN_pachip0, TITAN_pachip1);
|
|
|
|
|
|
|
|
|
|
/* Check for graphic console location (if any). */
|
ALPHA: support graphics on non-zero PCI domains
This code replaces earlier and incomplete handling of graphics on non-zero PCI
domains (aka hoses or peer PCI buses).
An option (CONFIG_VGA_HOSE) is set TRUE if configuring a GENERIC kernel, or a
kernel for MARVEL, TITAN, or TSUNAMI machines, as these are the machines whose
SRM consoles are capable of configuring and handling graphics options on
non-zero hoses. All other machines have the option set FALSE.
A routine, "find_console_vga_hose()", is used to find the graphics device
which the machine's firmware believes is the console device, and it sets a
global (pci_vga_hose) for later use in managing access to the device. This is
called in "init_arch" on TITAN and TSUNAMI machines; MARVEL machines use a
custom version of this routine because of extra complexity.
A routine, "locate_and_init_vga()", is used to find the graphics device and
set a global (pci_vga_hose) for later use in managing access to the device, in
the case where "find_console_vga_hose" has failed.
Various adjustments are made to the ioremap and ioportmap routines for
detecting and translating "legacy" VGA register and memory references to the
real PCI domain.
[akpm@linux-foundation.org: don't statically init bss]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Jay Estabrook <jay.estabrook@hp.com>
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-01 15:47:03 +08:00
|
|
|
|
find_console_vga_hose();
|
2005-04-17 06:20:36 +08:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
titan_kill_one_pachip_port(titan_pachip_port *port, int index)
|
|
|
|
|
{
|
|
|
|
|
port->wsba[0].csr = saved_config[index].wsba[0];
|
|
|
|
|
port->wsm[0].csr = saved_config[index].wsm[0];
|
|
|
|
|
port->tba[0].csr = saved_config[index].tba[0];
|
|
|
|
|
|
|
|
|
|
port->wsba[1].csr = saved_config[index].wsba[1];
|
|
|
|
|
port->wsm[1].csr = saved_config[index].wsm[1];
|
|
|
|
|
port->tba[1].csr = saved_config[index].tba[1];
|
|
|
|
|
|
|
|
|
|
port->wsba[2].csr = saved_config[index].wsba[2];
|
|
|
|
|
port->wsm[2].csr = saved_config[index].wsm[2];
|
|
|
|
|
port->tba[2].csr = saved_config[index].tba[2];
|
|
|
|
|
|
|
|
|
|
port->wsba[3].csr = saved_config[index].wsba[3];
|
|
|
|
|
port->wsm[3].csr = saved_config[index].wsm[3];
|
|
|
|
|
port->tba[3].csr = saved_config[index].tba[3];
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
titan_kill_pachips(titan_pachip *pachip0, titan_pachip *pachip1)
|
|
|
|
|
{
|
ALPHA: support graphics on non-zero PCI domains
This code replaces earlier and incomplete handling of graphics on non-zero PCI
domains (aka hoses or peer PCI buses).
An option (CONFIG_VGA_HOSE) is set TRUE if configuring a GENERIC kernel, or a
kernel for MARVEL, TITAN, or TSUNAMI machines, as these are the machines whose
SRM consoles are capable of configuring and handling graphics options on
non-zero hoses. All other machines have the option set FALSE.
A routine, "find_console_vga_hose()", is used to find the graphics device
which the machine's firmware believes is the console device, and it sets a
global (pci_vga_hose) for later use in managing access to the device. This is
called in "init_arch" on TITAN and TSUNAMI machines; MARVEL machines use a
custom version of this routine because of extra complexity.
A routine, "locate_and_init_vga()", is used to find the graphics device and
set a global (pci_vga_hose) for later use in managing access to the device, in
the case where "find_console_vga_hose" has failed.
Various adjustments are made to the ioremap and ioportmap routines for
detecting and translating "legacy" VGA register and memory references to the
real PCI domain.
[akpm@linux-foundation.org: don't statically init bss]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Jay Estabrook <jay.estabrook@hp.com>
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-01 15:47:03 +08:00
|
|
|
|
if (titan_pchip1_present) {
|
2005-04-17 06:20:36 +08:00
|
|
|
|
titan_kill_one_pachip_port(&pachip1->g_port, 1);
|
|
|
|
|
titan_kill_one_pachip_port(&pachip1->a_port, 3);
|
|
|
|
|
}
|
|
|
|
|
titan_kill_one_pachip_port(&pachip0->g_port, 0);
|
|
|
|
|
titan_kill_one_pachip_port(&pachip0->a_port, 2);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
titan_kill_arch(int mode)
|
|
|
|
|
{
|
|
|
|
|
titan_kill_pachips(TITAN_pachip0, TITAN_pachip1);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* IO map support.
|
|
|
|
|
*/
|
|
|
|
|
|
ALPHA: support graphics on non-zero PCI domains
This code replaces earlier and incomplete handling of graphics on non-zero PCI
domains (aka hoses or peer PCI buses).
An option (CONFIG_VGA_HOSE) is set TRUE if configuring a GENERIC kernel, or a
kernel for MARVEL, TITAN, or TSUNAMI machines, as these are the machines whose
SRM consoles are capable of configuring and handling graphics options on
non-zero hoses. All other machines have the option set FALSE.
A routine, "find_console_vga_hose()", is used to find the graphics device
which the machine's firmware believes is the console device, and it sets a
global (pci_vga_hose) for later use in managing access to the device. This is
called in "init_arch" on TITAN and TSUNAMI machines; MARVEL machines use a
custom version of this routine because of extra complexity.
A routine, "locate_and_init_vga()", is used to find the graphics device and
set a global (pci_vga_hose) for later use in managing access to the device, in
the case where "find_console_vga_hose" has failed.
Various adjustments are made to the ioremap and ioportmap routines for
detecting and translating "legacy" VGA register and memory references to the
real PCI domain.
[akpm@linux-foundation.org: don't statically init bss]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Jay Estabrook <jay.estabrook@hp.com>
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-01 15:47:03 +08:00
|
|
|
|
void __iomem *
|
|
|
|
|
titan_ioportmap(unsigned long addr)
|
|
|
|
|
{
|
|
|
|
|
FIXUP_IOADDR_VGA(addr);
|
|
|
|
|
return (void __iomem *)(addr + TITAN_IO_BIAS);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
|
void __iomem *
|
|
|
|
|
titan_ioremap(unsigned long addr, unsigned long size)
|
|
|
|
|
{
|
|
|
|
|
int h = (addr & TITAN_HOSE_MASK) >> TITAN_HOSE_SHIFT;
|
|
|
|
|
unsigned long baddr = addr & ~TITAN_HOSE_MASK;
|
|
|
|
|
unsigned long last = baddr + size - 1;
|
|
|
|
|
struct pci_controller *hose;
|
|
|
|
|
struct vm_struct *area;
|
|
|
|
|
unsigned long vaddr;
|
|
|
|
|
unsigned long *ptes;
|
|
|
|
|
unsigned long pfn;
|
|
|
|
|
|
2016-10-25 13:07:41 +08:00
|
|
|
|
#ifdef CONFIG_VGA_HOSE
|
2005-04-17 06:20:36 +08:00
|
|
|
|
/*
|
ALPHA: support graphics on non-zero PCI domains
This code replaces earlier and incomplete handling of graphics on non-zero PCI
domains (aka hoses or peer PCI buses).
An option (CONFIG_VGA_HOSE) is set TRUE if configuring a GENERIC kernel, or a
kernel for MARVEL, TITAN, or TSUNAMI machines, as these are the machines whose
SRM consoles are capable of configuring and handling graphics options on
non-zero hoses. All other machines have the option set FALSE.
A routine, "find_console_vga_hose()", is used to find the graphics device
which the machine's firmware believes is the console device, and it sets a
global (pci_vga_hose) for later use in managing access to the device. This is
called in "init_arch" on TITAN and TSUNAMI machines; MARVEL machines use a
custom version of this routine because of extra complexity.
A routine, "locate_and_init_vga()", is used to find the graphics device and
set a global (pci_vga_hose) for later use in managing access to the device, in
the case where "find_console_vga_hose" has failed.
Various adjustments are made to the ioremap and ioportmap routines for
detecting and translating "legacy" VGA register and memory references to the
real PCI domain.
[akpm@linux-foundation.org: don't statically init bss]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Jay Estabrook <jay.estabrook@hp.com>
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-01 15:47:03 +08:00
|
|
|
|
* Adjust the address and hose, if necessary.
|
2005-04-17 06:20:36 +08:00
|
|
|
|
*/
|
ALPHA: support graphics on non-zero PCI domains
This code replaces earlier and incomplete handling of graphics on non-zero PCI
domains (aka hoses or peer PCI buses).
An option (CONFIG_VGA_HOSE) is set TRUE if configuring a GENERIC kernel, or a
kernel for MARVEL, TITAN, or TSUNAMI machines, as these are the machines whose
SRM consoles are capable of configuring and handling graphics options on
non-zero hoses. All other machines have the option set FALSE.
A routine, "find_console_vga_hose()", is used to find the graphics device
which the machine's firmware believes is the console device, and it sets a
global (pci_vga_hose) for later use in managing access to the device. This is
called in "init_arch" on TITAN and TSUNAMI machines; MARVEL machines use a
custom version of this routine because of extra complexity.
A routine, "locate_and_init_vga()", is used to find the graphics device and
set a global (pci_vga_hose) for later use in managing access to the device, in
the case where "find_console_vga_hose" has failed.
Various adjustments are made to the ioremap and ioportmap routines for
detecting and translating "legacy" VGA register and memory references to the
real PCI domain.
[akpm@linux-foundation.org: don't statically init bss]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Jay Estabrook <jay.estabrook@hp.com>
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-01 15:47:03 +08:00
|
|
|
|
if (pci_vga_hose && __is_mem_vga(addr)) {
|
2005-04-17 06:20:36 +08:00
|
|
|
|
h = pci_vga_hose->index;
|
|
|
|
|
addr += pci_vga_hose->mem_space->start;
|
|
|
|
|
}
|
2016-10-25 13:07:41 +08:00
|
|
|
|
#endif
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Find the hose.
|
|
|
|
|
*/
|
|
|
|
|
for (hose = hose_head; hose; hose = hose->next)
|
|
|
|
|
if (hose->index == h)
|
|
|
|
|
break;
|
|
|
|
|
if (!hose)
|
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Is it direct-mapped?
|
|
|
|
|
*/
|
|
|
|
|
if ((baddr >= __direct_map_base) &&
|
|
|
|
|
((baddr + size - 1) < __direct_map_base + __direct_map_size)) {
|
|
|
|
|
vaddr = addr - __direct_map_base + TITAN_MEM_BIAS;
|
|
|
|
|
return (void __iomem *) vaddr;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Check the scatter-gather arena.
|
|
|
|
|
*/
|
|
|
|
|
if (hose->sg_pci &&
|
|
|
|
|
baddr >= (unsigned long)hose->sg_pci->dma_base &&
|
|
|
|
|
last < (unsigned long)hose->sg_pci->dma_base + hose->sg_pci->size){
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Adjust the limits (mappings must be page aligned)
|
|
|
|
|
*/
|
|
|
|
|
baddr -= hose->sg_pci->dma_base;
|
|
|
|
|
last -= hose->sg_pci->dma_base;
|
|
|
|
|
baddr &= PAGE_MASK;
|
|
|
|
|
size = PAGE_ALIGN(last) - baddr;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Map it
|
|
|
|
|
*/
|
|
|
|
|
area = get_vm_area(size, VM_IOREMAP);
|
ALPHA: support graphics on non-zero PCI domains
This code replaces earlier and incomplete handling of graphics on non-zero PCI
domains (aka hoses or peer PCI buses).
An option (CONFIG_VGA_HOSE) is set TRUE if configuring a GENERIC kernel, or a
kernel for MARVEL, TITAN, or TSUNAMI machines, as these are the machines whose
SRM consoles are capable of configuring and handling graphics options on
non-zero hoses. All other machines have the option set FALSE.
A routine, "find_console_vga_hose()", is used to find the graphics device
which the machine's firmware believes is the console device, and it sets a
global (pci_vga_hose) for later use in managing access to the device. This is
called in "init_arch" on TITAN and TSUNAMI machines; MARVEL machines use a
custom version of this routine because of extra complexity.
A routine, "locate_and_init_vga()", is used to find the graphics device and
set a global (pci_vga_hose) for later use in managing access to the device, in
the case where "find_console_vga_hose" has failed.
Various adjustments are made to the ioremap and ioportmap routines for
detecting and translating "legacy" VGA register and memory references to the
real PCI domain.
[akpm@linux-foundation.org: don't statically init bss]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Jay Estabrook <jay.estabrook@hp.com>
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-01 15:47:03 +08:00
|
|
|
|
if (!area) {
|
|
|
|
|
printk("ioremap failed... no vm_area...\n");
|
2005-04-17 06:20:36 +08:00
|
|
|
|
return NULL;
|
ALPHA: support graphics on non-zero PCI domains
This code replaces earlier and incomplete handling of graphics on non-zero PCI
domains (aka hoses or peer PCI buses).
An option (CONFIG_VGA_HOSE) is set TRUE if configuring a GENERIC kernel, or a
kernel for MARVEL, TITAN, or TSUNAMI machines, as these are the machines whose
SRM consoles are capable of configuring and handling graphics options on
non-zero hoses. All other machines have the option set FALSE.
A routine, "find_console_vga_hose()", is used to find the graphics device
which the machine's firmware believes is the console device, and it sets a
global (pci_vga_hose) for later use in managing access to the device. This is
called in "init_arch" on TITAN and TSUNAMI machines; MARVEL machines use a
custom version of this routine because of extra complexity.
A routine, "locate_and_init_vga()", is used to find the graphics device and
set a global (pci_vga_hose) for later use in managing access to the device, in
the case where "find_console_vga_hose" has failed.
Various adjustments are made to the ioremap and ioportmap routines for
detecting and translating "legacy" VGA register and memory references to the
real PCI domain.
[akpm@linux-foundation.org: don't statically init bss]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Jay Estabrook <jay.estabrook@hp.com>
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-01 15:47:03 +08:00
|
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
|
ptes = hose->sg_pci->ptes;
|
|
|
|
|
for (vaddr = (unsigned long)area->addr;
|
|
|
|
|
baddr <= last;
|
|
|
|
|
baddr += PAGE_SIZE, vaddr += PAGE_SIZE) {
|
|
|
|
|
pfn = ptes[baddr >> PAGE_SHIFT];
|
|
|
|
|
if (!(pfn & 1)) {
|
|
|
|
|
printk("ioremap failed... pte not valid...\n");
|
|
|
|
|
vfree(area->addr);
|
|
|
|
|
return NULL;
|
|
|
|
|
}
|
|
|
|
|
pfn >>= 1; /* make it a true pfn */
|
|
|
|
|
|
|
|
|
|
if (__alpha_remap_area_pages(vaddr,
|
|
|
|
|
pfn << PAGE_SHIFT,
|
|
|
|
|
PAGE_SIZE, 0)) {
|
ALPHA: support graphics on non-zero PCI domains
This code replaces earlier and incomplete handling of graphics on non-zero PCI
domains (aka hoses or peer PCI buses).
An option (CONFIG_VGA_HOSE) is set TRUE if configuring a GENERIC kernel, or a
kernel for MARVEL, TITAN, or TSUNAMI machines, as these are the machines whose
SRM consoles are capable of configuring and handling graphics options on
non-zero hoses. All other machines have the option set FALSE.
A routine, "find_console_vga_hose()", is used to find the graphics device
which the machine's firmware believes is the console device, and it sets a
global (pci_vga_hose) for later use in managing access to the device. This is
called in "init_arch" on TITAN and TSUNAMI machines; MARVEL machines use a
custom version of this routine because of extra complexity.
A routine, "locate_and_init_vga()", is used to find the graphics device and
set a global (pci_vga_hose) for later use in managing access to the device, in
the case where "find_console_vga_hose" has failed.
Various adjustments are made to the ioremap and ioportmap routines for
detecting and translating "legacy" VGA register and memory references to the
real PCI domain.
[akpm@linux-foundation.org: don't statically init bss]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Jay Estabrook <jay.estabrook@hp.com>
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-01 15:47:03 +08:00
|
|
|
|
printk("FAILED to remap_area_pages...\n");
|
2005-04-17 06:20:36 +08:00
|
|
|
|
vfree(area->addr);
|
|
|
|
|
return NULL;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
flush_tlb_all();
|
|
|
|
|
|
|
|
|
|
vaddr = (unsigned long)area->addr + (addr & ~PAGE_MASK);
|
|
|
|
|
return (void __iomem *) vaddr;
|
|
|
|
|
}
|
|
|
|
|
|
ALPHA: support graphics on non-zero PCI domains
This code replaces earlier and incomplete handling of graphics on non-zero PCI
domains (aka hoses or peer PCI buses).
An option (CONFIG_VGA_HOSE) is set TRUE if configuring a GENERIC kernel, or a
kernel for MARVEL, TITAN, or TSUNAMI machines, as these are the machines whose
SRM consoles are capable of configuring and handling graphics options on
non-zero hoses. All other machines have the option set FALSE.
A routine, "find_console_vga_hose()", is used to find the graphics device
which the machine's firmware believes is the console device, and it sets a
global (pci_vga_hose) for later use in managing access to the device. This is
called in "init_arch" on TITAN and TSUNAMI machines; MARVEL machines use a
custom version of this routine because of extra complexity.
A routine, "locate_and_init_vga()", is used to find the graphics device and
set a global (pci_vga_hose) for later use in managing access to the device, in
the case where "find_console_vga_hose" has failed.
Various adjustments are made to the ioremap and ioportmap routines for
detecting and translating "legacy" VGA register and memory references to the
real PCI domain.
[akpm@linux-foundation.org: don't statically init bss]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Jay Estabrook <jay.estabrook@hp.com>
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-01 15:47:03 +08:00
|
|
|
|
/* Assume a legacy (read: VGA) address, and return appropriately. */
|
|
|
|
|
return (void __iomem *)(addr + TITAN_MEM_BIAS);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
titan_iounmap(volatile void __iomem *xaddr)
|
|
|
|
|
{
|
|
|
|
|
unsigned long addr = (unsigned long) xaddr;
|
|
|
|
|
if (addr >= VMALLOC_START)
|
|
|
|
|
vfree((void *)(PAGE_MASK & addr));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
titan_is_mmio(const volatile void __iomem *xaddr)
|
|
|
|
|
{
|
|
|
|
|
unsigned long addr = (unsigned long) xaddr;
|
|
|
|
|
|
|
|
|
|
if (addr >= VMALLOC_START)
|
|
|
|
|
return 1;
|
|
|
|
|
else
|
|
|
|
|
return (addr & 0x100000000UL) == 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#ifndef CONFIG_ALPHA_GENERIC
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ALPHA: support graphics on non-zero PCI domains
This code replaces earlier and incomplete handling of graphics on non-zero PCI
domains (aka hoses or peer PCI buses).
An option (CONFIG_VGA_HOSE) is set TRUE if configuring a GENERIC kernel, or a
kernel for MARVEL, TITAN, or TSUNAMI machines, as these are the machines whose
SRM consoles are capable of configuring and handling graphics options on
non-zero hoses. All other machines have the option set FALSE.
A routine, "find_console_vga_hose()", is used to find the graphics device
which the machine's firmware believes is the console device, and it sets a
global (pci_vga_hose) for later use in managing access to the device. This is
called in "init_arch" on TITAN and TSUNAMI machines; MARVEL machines use a
custom version of this routine because of extra complexity.
A routine, "locate_and_init_vga()", is used to find the graphics device and
set a global (pci_vga_hose) for later use in managing access to the device, in
the case where "find_console_vga_hose" has failed.
Various adjustments are made to the ioremap and ioportmap routines for
detecting and translating "legacy" VGA register and memory references to the
real PCI domain.
[akpm@linux-foundation.org: don't statically init bss]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Jay Estabrook <jay.estabrook@hp.com>
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-01 15:47:03 +08:00
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EXPORT_SYMBOL(titan_ioportmap);
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2005-04-17 06:20:36 +08:00
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EXPORT_SYMBOL(titan_ioremap);
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EXPORT_SYMBOL(titan_iounmap);
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EXPORT_SYMBOL(titan_is_mmio);
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#endif
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/*
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* AGP GART Support.
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*/
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#include <linux/agp_backend.h>
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#include <asm/agp_backend.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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struct titan_agp_aperture {
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struct pci_iommu_arena *arena;
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long pg_start;
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long pg_count;
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};
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static int
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titan_agp_setup(alpha_agp_info *agp)
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{
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struct titan_agp_aperture *aper;
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if (!alpha_agpgart_size)
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return -ENOMEM;
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aper = kmalloc(sizeof(struct titan_agp_aperture), GFP_KERNEL);
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if (aper == NULL)
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return -ENOMEM;
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aper->arena = agp->hose->sg_pci;
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aper->pg_count = alpha_agpgart_size / PAGE_SIZE;
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aper->pg_start = iommu_reserve(aper->arena, aper->pg_count,
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aper->pg_count - 1);
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if (aper->pg_start < 0) {
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printk(KERN_ERR "Failed to reserve AGP memory\n");
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kfree(aper);
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return -ENOMEM;
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}
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agp->aperture.bus_base =
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aper->arena->dma_base + aper->pg_start * PAGE_SIZE;
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agp->aperture.size = aper->pg_count * PAGE_SIZE;
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agp->aperture.sysdata = aper;
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return 0;
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}
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static void
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titan_agp_cleanup(alpha_agp_info *agp)
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{
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struct titan_agp_aperture *aper = agp->aperture.sysdata;
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int status;
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status = iommu_release(aper->arena, aper->pg_start, aper->pg_count);
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if (status == -EBUSY) {
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printk(KERN_WARNING
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"Attempted to release bound AGP memory - unbinding\n");
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iommu_unbind(aper->arena, aper->pg_start, aper->pg_count);
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status = iommu_release(aper->arena, aper->pg_start,
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aper->pg_count);
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}
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if (status < 0)
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printk(KERN_ERR "Failed to release AGP memory\n");
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kfree(aper);
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kfree(agp);
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}
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static int
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titan_agp_configure(alpha_agp_info *agp)
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{
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union TPAchipPCTL pctl;
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titan_pachip_port *port = agp->private;
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pctl.pctl_q_whole = port->pctl.csr;
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/* Side-Band Addressing? */
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pctl.pctl_r_bits.apctl_v_agp_sba_en = agp->mode.bits.sba;
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/* AGP Rate? */
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pctl.pctl_r_bits.apctl_v_agp_rate = 0; /* 1x */
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if (agp->mode.bits.rate & 2)
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pctl.pctl_r_bits.apctl_v_agp_rate = 1; /* 2x */
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#if 0
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if (agp->mode.bits.rate & 4)
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pctl.pctl_r_bits.apctl_v_agp_rate = 2; /* 4x */
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#endif
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/* RQ Depth? */
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pctl.pctl_r_bits.apctl_v_agp_hp_rd = 2;
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pctl.pctl_r_bits.apctl_v_agp_lp_rd = 7;
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/*
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* AGP Enable.
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*/
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pctl.pctl_r_bits.apctl_v_agp_en = agp->mode.bits.enable;
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/* Tell the user. */
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printk("Enabling AGP: %dX%s\n",
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1 << pctl.pctl_r_bits.apctl_v_agp_rate,
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pctl.pctl_r_bits.apctl_v_agp_sba_en ? " - SBA" : "");
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/* Write it. */
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port->pctl.csr = pctl.pctl_q_whole;
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/* And wait at least 5000 66MHz cycles (per Titan spec). */
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udelay(100);
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return 0;
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}
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static int
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titan_agp_bind_memory(alpha_agp_info *agp, off_t pg_start, struct agp_memory *mem)
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{
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struct titan_agp_aperture *aper = agp->aperture.sysdata;
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return iommu_bind(aper->arena, aper->pg_start + pg_start,
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2009-09-24 06:57:42 +08:00
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mem->page_count, mem->pages);
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2005-04-17 06:20:36 +08:00
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}
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static int
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titan_agp_unbind_memory(alpha_agp_info *agp, off_t pg_start, struct agp_memory *mem)
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{
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struct titan_agp_aperture *aper = agp->aperture.sysdata;
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return iommu_unbind(aper->arena, aper->pg_start + pg_start,
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mem->page_count);
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}
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static unsigned long
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titan_agp_translate(alpha_agp_info *agp, dma_addr_t addr)
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{
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struct titan_agp_aperture *aper = agp->aperture.sysdata;
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unsigned long baddr = addr - aper->arena->dma_base;
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unsigned long pte;
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if (addr < agp->aperture.bus_base ||
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addr >= agp->aperture.bus_base + agp->aperture.size) {
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2008-04-28 17:13:46 +08:00
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printk("%s: addr out of range\n", __func__);
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2005-04-17 06:20:36 +08:00
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return -EINVAL;
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}
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pte = aper->arena->ptes[baddr >> PAGE_SHIFT];
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if (!(pte & 1)) {
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2008-04-28 17:13:46 +08:00
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printk("%s: pte not valid\n", __func__);
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2005-04-17 06:20:36 +08:00
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return -EINVAL;
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}
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return (pte >> 1) << PAGE_SHIFT;
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}
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struct alpha_agp_ops titan_agp_ops =
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{
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.setup = titan_agp_setup,
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.cleanup = titan_agp_cleanup,
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.configure = titan_agp_configure,
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.bind = titan_agp_bind_memory,
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.unbind = titan_agp_unbind_memory,
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.translate = titan_agp_translate
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};
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alpha_agp_info *
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titan_agp_info(void)
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{
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alpha_agp_info *agp;
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struct pci_controller *hose;
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titan_pachip_port *port;
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int hosenum = -1;
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union TPAchipPCTL pctl;
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/*
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* Find the AGP port.
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*/
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port = &TITAN_pachip0->a_port;
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if (titan_query_agp(port))
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hosenum = 2;
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if (hosenum < 0 &&
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ALPHA: support graphics on non-zero PCI domains
This code replaces earlier and incomplete handling of graphics on non-zero PCI
domains (aka hoses or peer PCI buses).
An option (CONFIG_VGA_HOSE) is set TRUE if configuring a GENERIC kernel, or a
kernel for MARVEL, TITAN, or TSUNAMI machines, as these are the machines whose
SRM consoles are capable of configuring and handling graphics options on
non-zero hoses. All other machines have the option set FALSE.
A routine, "find_console_vga_hose()", is used to find the graphics device
which the machine's firmware believes is the console device, and it sets a
global (pci_vga_hose) for later use in managing access to the device. This is
called in "init_arch" on TITAN and TSUNAMI machines; MARVEL machines use a
custom version of this routine because of extra complexity.
A routine, "locate_and_init_vga()", is used to find the graphics device and
set a global (pci_vga_hose) for later use in managing access to the device, in
the case where "find_console_vga_hose" has failed.
Various adjustments are made to the ioremap and ioportmap routines for
detecting and translating "legacy" VGA register and memory references to the
real PCI domain.
[akpm@linux-foundation.org: don't statically init bss]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Jay Estabrook <jay.estabrook@hp.com>
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-01 15:47:03 +08:00
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titan_pchip1_present &&
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2005-04-17 06:20:36 +08:00
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titan_query_agp(port = &TITAN_pachip1->a_port))
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hosenum = 3;
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/*
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* Find the hose the port is on.
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*/
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for (hose = hose_head; hose; hose = hose->next)
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if (hose->index == hosenum)
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break;
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if (!hose || !hose->sg_pci)
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return NULL;
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/*
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* Allocate the info structure.
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*/
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agp = kmalloc(sizeof(*agp), GFP_KERNEL);
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2009-12-01 04:38:19 +08:00
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if (!agp)
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return NULL;
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2005-04-17 06:20:36 +08:00
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/*
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* Fill it in.
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*/
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agp->hose = hose;
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agp->private = port;
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agp->ops = &titan_agp_ops;
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/*
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* Aperture - not configured until ops.setup().
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*
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* FIXME - should we go ahead and allocate it here?
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*/
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agp->aperture.bus_base = 0;
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agp->aperture.size = 0;
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agp->aperture.sysdata = NULL;
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/*
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* Capabilities.
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*/
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agp->capability.lw = 0;
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agp->capability.bits.rate = 3; /* 2x, 1x */
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agp->capability.bits.sba = 1;
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agp->capability.bits.rq = 7; /* 8 - 1 */
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/*
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* Mode.
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*/
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pctl.pctl_q_whole = port->pctl.csr;
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agp->mode.lw = 0;
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agp->mode.bits.rate = 1 << pctl.pctl_r_bits.apctl_v_agp_rate;
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agp->mode.bits.sba = pctl.pctl_r_bits.apctl_v_agp_sba_en;
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agp->mode.bits.rq = 7; /* RQ Depth? */
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agp->mode.bits.enable = pctl.pctl_r_bits.apctl_v_agp_en;
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return agp;
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}
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