2014-04-23 15:56:44 +08:00
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/*
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* otg_fsm.c - ChipIdea USB IP core OTG FSM driver
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*
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* Copyright (C) 2014 Freescale Semiconductor, Inc.
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*
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* Author: Jun Li
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/*
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* This file mainly handles OTG fsm, it includes OTG fsm operations
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* for HNP and SRP.
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2014-04-23 15:56:50 +08:00
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*
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* TODO List
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* - ADP
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* - OTG test device
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2014-04-23 15:56:44 +08:00
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*/
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#include <linux/usb/otg.h>
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#include <linux/usb/gadget.h>
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#include <linux/usb/hcd.h>
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#include <linux/usb/chipidea.h>
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2014-04-23 15:56:48 +08:00
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#include <linux/regulator/consumer.h>
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2014-04-23 15:56:44 +08:00
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#include "ci.h"
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#include "bits.h"
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#include "otg.h"
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#include "otg_fsm.h"
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2014-04-23 15:56:49 +08:00
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static struct ci_otg_fsm_timer *otg_timer_initializer
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(struct ci_hdrc *ci, void (*function)(void *, unsigned long),
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unsigned long expires, unsigned long data)
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{
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struct ci_otg_fsm_timer *timer;
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timer = devm_kzalloc(ci->dev, sizeof(struct ci_otg_fsm_timer),
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GFP_KERNEL);
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if (!timer)
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return NULL;
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timer->function = function;
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timer->expires = expires;
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timer->data = data;
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return timer;
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}
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2014-04-23 15:56:48 +08:00
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/*
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* Add timer to active timer list
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*/
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static void ci_otg_add_timer(struct ci_hdrc *ci, enum ci_otg_fsm_timer_index t)
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{
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struct ci_otg_fsm_timer *tmp_timer;
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struct ci_otg_fsm_timer *timer = ci->fsm_timer->timer_list[t];
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struct list_head *active_timers = &ci->fsm_timer->active_timers;
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if (t >= NUM_CI_OTG_FSM_TIMERS)
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return;
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/*
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* Check if the timer is already in the active list,
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* if so update timer count
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*/
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list_for_each_entry(tmp_timer, active_timers, list)
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if (tmp_timer == timer) {
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timer->count = timer->expires;
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return;
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}
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timer->count = timer->expires;
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list_add_tail(&timer->list, active_timers);
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/* Enable 1ms irq */
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if (!(hw_read_otgsc(ci, OTGSC_1MSIE)))
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hw_write_otgsc(ci, OTGSC_1MSIE, OTGSC_1MSIE);
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}
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/*
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* Remove timer from active timer list
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*/
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static void ci_otg_del_timer(struct ci_hdrc *ci, enum ci_otg_fsm_timer_index t)
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{
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struct ci_otg_fsm_timer *tmp_timer, *del_tmp;
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struct ci_otg_fsm_timer *timer = ci->fsm_timer->timer_list[t];
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struct list_head *active_timers = &ci->fsm_timer->active_timers;
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if (t >= NUM_CI_OTG_FSM_TIMERS)
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return;
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list_for_each_entry_safe(tmp_timer, del_tmp, active_timers, list)
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if (tmp_timer == timer)
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list_del(&timer->list);
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/* Disable 1ms irq if there is no any active timer */
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if (list_empty(active_timers))
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hw_write_otgsc(ci, OTGSC_1MSIE, 0);
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}
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2014-04-23 15:56:50 +08:00
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/*
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* Reduce timer count by 1, and find timeout conditions.
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* Called by otg 1ms timer interrupt
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*/
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static inline int ci_otg_tick_timer(struct ci_hdrc *ci)
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{
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struct ci_otg_fsm_timer *tmp_timer, *del_tmp;
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struct list_head *active_timers = &ci->fsm_timer->active_timers;
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int expired = 0;
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list_for_each_entry_safe(tmp_timer, del_tmp, active_timers, list) {
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tmp_timer->count--;
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/* check if timer expires */
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if (!tmp_timer->count) {
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list_del(&tmp_timer->list);
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tmp_timer->function(ci, tmp_timer->data);
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expired = 1;
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}
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}
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/* disable 1ms irq if there is no any timer active */
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if ((expired == 1) && list_empty(active_timers))
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hw_write_otgsc(ci, OTGSC_1MSIE, 0);
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return expired;
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}
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2014-04-23 15:56:49 +08:00
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/* The timeout callback function to set time out bit */
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static void set_tmout(void *ptr, unsigned long indicator)
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{
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*(int *)indicator = 1;
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}
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static void set_tmout_and_fsm(void *ptr, unsigned long indicator)
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{
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struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
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set_tmout(ci, indicator);
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disable_irq_nosync(ci->irq);
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queue_work(ci->wq, &ci->work);
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}
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static void a_wait_vfall_tmout_func(void *ptr, unsigned long indicator)
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{
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struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
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set_tmout(ci, indicator);
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/* Disable port power */
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hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP, 0);
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/* Clear exsiting DP irq */
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hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
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/* Enable data pulse irq */
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hw_write_otgsc(ci, OTGSC_DPIE, OTGSC_DPIE);
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disable_irq_nosync(ci->irq);
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queue_work(ci->wq, &ci->work);
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}
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static void b_ase0_brst_tmout_func(void *ptr, unsigned long indicator)
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{
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struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
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set_tmout(ci, indicator);
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if (!hw_read_otgsc(ci, OTGSC_BSV))
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ci->fsm.b_sess_vld = 0;
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disable_irq_nosync(ci->irq);
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queue_work(ci->wq, &ci->work);
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}
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static void b_ssend_srp_tmout_func(void *ptr, unsigned long indicator)
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{
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struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
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set_tmout(ci, indicator);
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/* only vbus fall below B_sess_vld in b_idle state */
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if (ci->transceiver->state == OTG_STATE_B_IDLE) {
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disable_irq_nosync(ci->irq);
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queue_work(ci->wq, &ci->work);
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}
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}
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static void b_sess_vld_tmout_func(void *ptr, unsigned long indicator)
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{
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struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
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/* Check if A detached */
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if (!(hw_read_otgsc(ci, OTGSC_BSV))) {
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ci->fsm.b_sess_vld = 0;
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ci_otg_add_timer(ci, B_SSEND_SRP);
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disable_irq_nosync(ci->irq);
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queue_work(ci->wq, &ci->work);
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}
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}
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static void b_data_pulse_end(void *ptr, unsigned long indicator)
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{
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struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
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ci->fsm.b_srp_done = 1;
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ci->fsm.b_bus_req = 0;
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if (ci->fsm.power_up)
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ci->fsm.power_up = 0;
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hw_write_otgsc(ci, OTGSC_HABA, 0);
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disable_irq_nosync(ci->irq);
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queue_work(ci->wq, &ci->work);
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}
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/* Initialize timers */
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static int ci_otg_init_timers(struct ci_hdrc *ci)
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{
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struct otg_fsm *fsm = &ci->fsm;
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/* FSM used timers */
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ci->fsm_timer->timer_list[A_WAIT_VRISE] =
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otg_timer_initializer(ci, &set_tmout_and_fsm, TA_WAIT_VRISE,
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(unsigned long)&fsm->a_wait_vrise_tmout);
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if (ci->fsm_timer->timer_list[A_WAIT_VRISE] == NULL)
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return -ENOMEM;
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ci->fsm_timer->timer_list[A_WAIT_VFALL] =
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otg_timer_initializer(ci, &a_wait_vfall_tmout_func,
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TA_WAIT_VFALL, (unsigned long)&fsm->a_wait_vfall_tmout);
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if (ci->fsm_timer->timer_list[A_WAIT_VFALL] == NULL)
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return -ENOMEM;
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ci->fsm_timer->timer_list[A_WAIT_BCON] =
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otg_timer_initializer(ci, &set_tmout_and_fsm, TA_WAIT_BCON,
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(unsigned long)&fsm->a_wait_bcon_tmout);
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if (ci->fsm_timer->timer_list[A_WAIT_BCON] == NULL)
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return -ENOMEM;
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ci->fsm_timer->timer_list[A_AIDL_BDIS] =
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otg_timer_initializer(ci, &set_tmout_and_fsm, TA_AIDL_BDIS,
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(unsigned long)&fsm->a_aidl_bdis_tmout);
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if (ci->fsm_timer->timer_list[A_AIDL_BDIS] == NULL)
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return -ENOMEM;
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ci->fsm_timer->timer_list[A_BIDL_ADIS] =
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otg_timer_initializer(ci, &set_tmout_and_fsm, TA_BIDL_ADIS,
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(unsigned long)&fsm->a_bidl_adis_tmout);
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if (ci->fsm_timer->timer_list[A_BIDL_ADIS] == NULL)
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return -ENOMEM;
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ci->fsm_timer->timer_list[B_ASE0_BRST] =
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otg_timer_initializer(ci, &b_ase0_brst_tmout_func, TB_ASE0_BRST,
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(unsigned long)&fsm->b_ase0_brst_tmout);
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if (ci->fsm_timer->timer_list[B_ASE0_BRST] == NULL)
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return -ENOMEM;
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ci->fsm_timer->timer_list[B_SE0_SRP] =
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otg_timer_initializer(ci, &set_tmout_and_fsm, TB_SE0_SRP,
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(unsigned long)&fsm->b_se0_srp);
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if (ci->fsm_timer->timer_list[B_SE0_SRP] == NULL)
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return -ENOMEM;
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ci->fsm_timer->timer_list[B_SSEND_SRP] =
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otg_timer_initializer(ci, &b_ssend_srp_tmout_func, TB_SSEND_SRP,
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(unsigned long)&fsm->b_ssend_srp);
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if (ci->fsm_timer->timer_list[B_SSEND_SRP] == NULL)
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return -ENOMEM;
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ci->fsm_timer->timer_list[B_SRP_FAIL] =
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otg_timer_initializer(ci, &set_tmout, TB_SRP_FAIL,
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(unsigned long)&fsm->b_srp_done);
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if (ci->fsm_timer->timer_list[B_SRP_FAIL] == NULL)
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return -ENOMEM;
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ci->fsm_timer->timer_list[B_DATA_PLS] =
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otg_timer_initializer(ci, &b_data_pulse_end, TB_DATA_PLS, 0);
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if (ci->fsm_timer->timer_list[B_DATA_PLS] == NULL)
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return -ENOMEM;
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ci->fsm_timer->timer_list[B_SESS_VLD] = otg_timer_initializer(ci,
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&b_sess_vld_tmout_func, TB_SESS_VLD, 0);
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if (ci->fsm_timer->timer_list[B_SESS_VLD] == NULL)
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return -ENOMEM;
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return 0;
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}
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2014-04-23 15:56:48 +08:00
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/* -------------------------------------------------------------*/
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/* Operations that will be called from OTG Finite State Machine */
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/* -------------------------------------------------------------*/
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static void ci_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
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{
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struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
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if (t < NUM_OTG_FSM_TIMERS)
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ci_otg_add_timer(ci, t);
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return;
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}
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static void ci_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
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{
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struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
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if (t < NUM_OTG_FSM_TIMERS)
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ci_otg_del_timer(ci, t);
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return;
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}
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/*
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* A-device drive vbus: turn on vbus regulator and enable port power
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* Data pulse irq should be disabled while vbus is on.
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*/
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static void ci_otg_drv_vbus(struct otg_fsm *fsm, int on)
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{
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int ret;
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struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
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if (on) {
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/* Enable power power */
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hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP,
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PORTSC_PP);
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if (ci->platdata->reg_vbus) {
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ret = regulator_enable(ci->platdata->reg_vbus);
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if (ret) {
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dev_err(ci->dev,
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"Failed to enable vbus regulator, ret=%d\n",
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ret);
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return;
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}
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}
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/* Disable data pulse irq */
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hw_write_otgsc(ci, OTGSC_DPIE, 0);
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fsm->a_srp_det = 0;
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fsm->power_up = 0;
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} else {
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if (ci->platdata->reg_vbus)
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regulator_disable(ci->platdata->reg_vbus);
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fsm->a_bus_drop = 1;
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fsm->a_bus_req = 0;
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}
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}
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/*
|
|
|
|
* Control data line by Run Stop bit.
|
|
|
|
*/
|
|
|
|
static void ci_otg_loc_conn(struct otg_fsm *fsm, int on)
|
|
|
|
{
|
|
|
|
struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
|
|
|
|
|
|
|
|
if (on)
|
|
|
|
hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
|
|
|
|
else
|
|
|
|
hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Generate SOF by host.
|
|
|
|
* This is controlled through suspend/resume the port.
|
|
|
|
* In host mode, controller will automatically send SOF.
|
|
|
|
* Suspend will block the data on the port.
|
|
|
|
*/
|
|
|
|
static void ci_otg_loc_sof(struct otg_fsm *fsm, int on)
|
|
|
|
{
|
|
|
|
struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
|
|
|
|
|
|
|
|
if (on)
|
|
|
|
hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_FPR,
|
|
|
|
PORTSC_FPR);
|
|
|
|
else
|
|
|
|
hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_SUSP,
|
|
|
|
PORTSC_SUSP);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Start SRP pulsing by data-line pulsing,
|
|
|
|
* no v-bus pulsing followed
|
|
|
|
*/
|
|
|
|
static void ci_otg_start_pulse(struct otg_fsm *fsm)
|
|
|
|
{
|
|
|
|
struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
|
|
|
|
|
|
|
|
/* Hardware Assistant Data pulse */
|
|
|
|
hw_write_otgsc(ci, OTGSC_HADP, OTGSC_HADP);
|
|
|
|
|
|
|
|
ci_otg_add_timer(ci, B_DATA_PLS);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ci_otg_start_host(struct otg_fsm *fsm, int on)
|
|
|
|
{
|
|
|
|
struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
|
|
|
|
|
|
|
|
mutex_unlock(&fsm->lock);
|
|
|
|
if (on) {
|
|
|
|
ci_role_stop(ci);
|
|
|
|
ci_role_start(ci, CI_ROLE_HOST);
|
|
|
|
} else {
|
|
|
|
ci_role_stop(ci);
|
|
|
|
hw_device_reset(ci, USBMODE_CM_DC);
|
|
|
|
ci_role_start(ci, CI_ROLE_GADGET);
|
|
|
|
}
|
|
|
|
mutex_lock(&fsm->lock);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ci_otg_start_gadget(struct otg_fsm *fsm, int on)
|
|
|
|
{
|
|
|
|
struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
|
|
|
|
|
|
|
|
mutex_unlock(&fsm->lock);
|
|
|
|
if (on)
|
|
|
|
usb_gadget_vbus_connect(&ci->gadget);
|
|
|
|
else
|
|
|
|
usb_gadget_vbus_disconnect(&ci->gadget);
|
|
|
|
mutex_lock(&fsm->lock);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct otg_fsm_ops ci_otg_ops = {
|
|
|
|
.drv_vbus = ci_otg_drv_vbus,
|
|
|
|
.loc_conn = ci_otg_loc_conn,
|
|
|
|
.loc_sof = ci_otg_loc_sof,
|
|
|
|
.start_pulse = ci_otg_start_pulse,
|
|
|
|
.add_timer = ci_otg_fsm_add_timer,
|
|
|
|
.del_timer = ci_otg_fsm_del_timer,
|
|
|
|
.start_host = ci_otg_start_host,
|
|
|
|
.start_gadget = ci_otg_start_gadget,
|
|
|
|
};
|
|
|
|
|
2014-04-23 15:56:50 +08:00
|
|
|
int ci_otg_fsm_work(struct ci_hdrc *ci)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Don't do fsm transition for B device
|
|
|
|
* when there is no gadget class driver
|
|
|
|
*/
|
|
|
|
if (ci->fsm.id && !(ci->driver) &&
|
|
|
|
ci->transceiver->state < OTG_STATE_A_IDLE)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (otg_statemachine(&ci->fsm)) {
|
|
|
|
if (ci->transceiver->state == OTG_STATE_A_IDLE) {
|
|
|
|
/*
|
|
|
|
* Further state change for cases:
|
|
|
|
* a_idle to b_idle; or
|
|
|
|
* a_idle to a_wait_vrise due to ID change(1->0), so
|
|
|
|
* B-dev becomes A-dev can try to start new session
|
|
|
|
* consequently; or
|
|
|
|
* a_idle to a_wait_vrise when power up
|
|
|
|
*/
|
|
|
|
if ((ci->fsm.id) || (ci->id_event) ||
|
|
|
|
(ci->fsm.power_up)) {
|
|
|
|
disable_irq_nosync(ci->irq);
|
|
|
|
queue_work(ci->wq, &ci->work);
|
|
|
|
}
|
|
|
|
if (ci->id_event)
|
|
|
|
ci->id_event = false;
|
|
|
|
} else if (ci->transceiver->state == OTG_STATE_B_IDLE) {
|
|
|
|
if (ci->fsm.b_sess_vld) {
|
|
|
|
ci->fsm.power_up = 0;
|
|
|
|
/*
|
|
|
|
* Further transite to b_periphearl state
|
|
|
|
* when register gadget driver with vbus on
|
|
|
|
*/
|
|
|
|
disable_irq_nosync(ci->irq);
|
|
|
|
queue_work(ci->wq, &ci->work);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Update fsm variables in each state if catching expected interrupts,
|
|
|
|
* called by otg fsm isr.
|
|
|
|
*/
|
|
|
|
static void ci_otg_fsm_event(struct ci_hdrc *ci)
|
|
|
|
{
|
|
|
|
u32 intr_sts, otg_bsess_vld, port_conn;
|
|
|
|
struct otg_fsm *fsm = &ci->fsm;
|
|
|
|
|
|
|
|
intr_sts = hw_read_intr_status(ci);
|
|
|
|
otg_bsess_vld = hw_read_otgsc(ci, OTGSC_BSV);
|
|
|
|
port_conn = hw_read(ci, OP_PORTSC, PORTSC_CCS);
|
|
|
|
|
|
|
|
switch (ci->transceiver->state) {
|
|
|
|
case OTG_STATE_A_WAIT_BCON:
|
|
|
|
if (port_conn) {
|
|
|
|
fsm->b_conn = 1;
|
|
|
|
fsm->a_bus_req = 1;
|
|
|
|
disable_irq_nosync(ci->irq);
|
|
|
|
queue_work(ci->wq, &ci->work);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case OTG_STATE_B_IDLE:
|
|
|
|
if (otg_bsess_vld && (intr_sts & USBi_PCI) && port_conn) {
|
|
|
|
fsm->b_sess_vld = 1;
|
|
|
|
disable_irq_nosync(ci->irq);
|
|
|
|
queue_work(ci->wq, &ci->work);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case OTG_STATE_B_PERIPHERAL:
|
|
|
|
if ((intr_sts & USBi_SLI) && port_conn && otg_bsess_vld) {
|
|
|
|
fsm->a_bus_suspend = 1;
|
|
|
|
disable_irq_nosync(ci->irq);
|
|
|
|
queue_work(ci->wq, &ci->work);
|
|
|
|
} else if (intr_sts & USBi_PCI) {
|
|
|
|
if (fsm->a_bus_suspend == 1)
|
|
|
|
fsm->a_bus_suspend = 0;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case OTG_STATE_B_HOST:
|
|
|
|
if ((intr_sts & USBi_PCI) && !port_conn) {
|
|
|
|
fsm->a_conn = 0;
|
|
|
|
fsm->b_bus_req = 0;
|
|
|
|
disable_irq_nosync(ci->irq);
|
|
|
|
queue_work(ci->wq, &ci->work);
|
|
|
|
ci_otg_add_timer(ci, B_SESS_VLD);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case OTG_STATE_A_PERIPHERAL:
|
|
|
|
if (intr_sts & USBi_SLI) {
|
|
|
|
fsm->b_bus_suspend = 1;
|
|
|
|
/*
|
|
|
|
* Init a timer to know how long this suspend
|
|
|
|
* will contine, if time out, indicates B no longer
|
|
|
|
* wants to be host role
|
|
|
|
*/
|
|
|
|
ci_otg_add_timer(ci, A_BIDL_ADIS);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (intr_sts & USBi_URI)
|
|
|
|
ci_otg_del_timer(ci, A_BIDL_ADIS);
|
|
|
|
|
|
|
|
if (intr_sts & USBi_PCI) {
|
|
|
|
if (fsm->b_bus_suspend == 1) {
|
|
|
|
ci_otg_del_timer(ci, A_BIDL_ADIS);
|
|
|
|
fsm->b_bus_suspend = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case OTG_STATE_A_SUSPEND:
|
|
|
|
if ((intr_sts & USBi_PCI) && !port_conn) {
|
|
|
|
fsm->b_conn = 0;
|
|
|
|
|
|
|
|
/* if gadget driver is binded */
|
|
|
|
if (ci->driver) {
|
|
|
|
/* A device to be peripheral mode */
|
|
|
|
ci->gadget.is_a_peripheral = 1;
|
|
|
|
}
|
|
|
|
disable_irq_nosync(ci->irq);
|
|
|
|
queue_work(ci->wq, &ci->work);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case OTG_STATE_A_HOST:
|
|
|
|
if ((intr_sts & USBi_PCI) && !port_conn) {
|
|
|
|
fsm->b_conn = 0;
|
|
|
|
disable_irq_nosync(ci->irq);
|
|
|
|
queue_work(ci->wq, &ci->work);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case OTG_STATE_B_WAIT_ACON:
|
|
|
|
if ((intr_sts & USBi_PCI) && port_conn) {
|
|
|
|
fsm->a_conn = 1;
|
|
|
|
disable_irq_nosync(ci->irq);
|
|
|
|
queue_work(ci->wq, &ci->work);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* ci_otg_irq - otg fsm related irq handling
|
|
|
|
* and also update otg fsm variable by monitoring usb host and udc
|
|
|
|
* state change interrupts.
|
|
|
|
* @ci: ci_hdrc
|
|
|
|
*/
|
|
|
|
irqreturn_t ci_otg_fsm_irq(struct ci_hdrc *ci)
|
|
|
|
{
|
|
|
|
irqreturn_t retval = IRQ_NONE;
|
|
|
|
u32 otgsc, otg_int_src = 0;
|
|
|
|
struct otg_fsm *fsm = &ci->fsm;
|
|
|
|
|
|
|
|
otgsc = hw_read_otgsc(ci, ~0);
|
|
|
|
otg_int_src = otgsc & OTGSC_INT_STATUS_BITS & (otgsc >> 8);
|
|
|
|
fsm->id = (otgsc & OTGSC_ID) ? 1 : 0;
|
|
|
|
|
|
|
|
if (otg_int_src) {
|
|
|
|
if (otg_int_src & OTGSC_1MSIS) {
|
|
|
|
hw_write_otgsc(ci, OTGSC_1MSIS, OTGSC_1MSIS);
|
|
|
|
retval = ci_otg_tick_timer(ci);
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
} else if (otg_int_src & OTGSC_DPIS) {
|
|
|
|
hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
|
|
|
|
fsm->a_srp_det = 1;
|
|
|
|
fsm->a_bus_drop = 0;
|
|
|
|
} else if (otg_int_src & OTGSC_IDIS) {
|
|
|
|
hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS);
|
|
|
|
if (fsm->id == 0) {
|
|
|
|
fsm->a_bus_drop = 0;
|
|
|
|
fsm->a_bus_req = 1;
|
|
|
|
ci->id_event = true;
|
|
|
|
}
|
|
|
|
} else if (otg_int_src & OTGSC_BSVIS) {
|
|
|
|
hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS);
|
|
|
|
if (otgsc & OTGSC_BSV) {
|
|
|
|
fsm->b_sess_vld = 1;
|
|
|
|
ci_otg_del_timer(ci, B_SSEND_SRP);
|
|
|
|
ci_otg_del_timer(ci, B_SRP_FAIL);
|
|
|
|
fsm->b_ssend_srp = 0;
|
|
|
|
} else {
|
|
|
|
fsm->b_sess_vld = 0;
|
|
|
|
if (fsm->id)
|
|
|
|
ci_otg_add_timer(ci, B_SSEND_SRP);
|
|
|
|
}
|
|
|
|
} else if (otg_int_src & OTGSC_AVVIS) {
|
|
|
|
hw_write_otgsc(ci, OTGSC_AVVIS, OTGSC_AVVIS);
|
|
|
|
if (otgsc & OTGSC_AVV) {
|
|
|
|
fsm->a_vbus_vld = 1;
|
|
|
|
} else {
|
|
|
|
fsm->a_vbus_vld = 0;
|
|
|
|
fsm->b_conn = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
disable_irq_nosync(ci->irq);
|
|
|
|
queue_work(ci->wq, &ci->work);
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
ci_otg_fsm_event(ci);
|
|
|
|
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
|
|
|
void ci_hdrc_otg_fsm_start(struct ci_hdrc *ci)
|
|
|
|
{
|
|
|
|
disable_irq_nosync(ci->irq);
|
|
|
|
queue_work(ci->wq, &ci->work);
|
|
|
|
}
|
|
|
|
|
2014-04-23 15:56:44 +08:00
|
|
|
int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci)
|
|
|
|
{
|
2014-04-23 15:56:49 +08:00
|
|
|
int retval = 0;
|
2014-04-23 15:56:44 +08:00
|
|
|
struct usb_otg *otg;
|
|
|
|
|
|
|
|
otg = devm_kzalloc(ci->dev,
|
|
|
|
sizeof(struct usb_otg), GFP_KERNEL);
|
|
|
|
if (!otg) {
|
|
|
|
dev_err(ci->dev,
|
|
|
|
"Failed to allocate usb_otg structure for ci hdrc otg!\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
otg->phy = ci->transceiver;
|
|
|
|
otg->gadget = &ci->gadget;
|
|
|
|
ci->fsm.otg = otg;
|
|
|
|
ci->transceiver->otg = ci->fsm.otg;
|
|
|
|
ci->fsm.power_up = 1;
|
|
|
|
ci->fsm.id = hw_read_otgsc(ci, OTGSC_ID) ? 1 : 0;
|
|
|
|
ci->transceiver->state = OTG_STATE_UNDEFINED;
|
2014-04-23 15:56:48 +08:00
|
|
|
ci->fsm.ops = &ci_otg_ops;
|
2014-04-23 15:56:44 +08:00
|
|
|
|
|
|
|
mutex_init(&ci->fsm.lock);
|
|
|
|
|
2014-04-23 15:56:49 +08:00
|
|
|
ci->fsm_timer = devm_kzalloc(ci->dev,
|
|
|
|
sizeof(struct ci_otg_fsm_timer_list), GFP_KERNEL);
|
|
|
|
if (!ci->fsm_timer) {
|
|
|
|
dev_err(ci->dev,
|
|
|
|
"Failed to allocate timer structure for ci hdrc otg!\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
INIT_LIST_HEAD(&ci->fsm_timer->active_timers);
|
|
|
|
retval = ci_otg_init_timers(ci);
|
|
|
|
if (retval) {
|
|
|
|
dev_err(ci->dev, "Couldn't init OTG timers\n");
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
2014-04-23 15:56:44 +08:00
|
|
|
/* Enable A vbus valid irq */
|
|
|
|
hw_write_otgsc(ci, OTGSC_AVVIE, OTGSC_AVVIE);
|
|
|
|
|
|
|
|
if (ci->fsm.id) {
|
|
|
|
ci->fsm.b_ssend_srp =
|
|
|
|
hw_read_otgsc(ci, OTGSC_BSV) ? 0 : 1;
|
|
|
|
ci->fsm.b_sess_vld =
|
|
|
|
hw_read_otgsc(ci, OTGSC_BSV) ? 1 : 0;
|
|
|
|
/* Enable BSV irq */
|
|
|
|
hw_write_otgsc(ci, OTGSC_BSVIE, OTGSC_BSVIE);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|