467 lines
10 KiB
C
467 lines
10 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* max31827.c - Support for Maxim Low-Power Switch
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*
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* Copyright (c) 2023 Daniel Matyas <daniel.matyas@analog.com>
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*/
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#include <linux/bitfield.h>
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#include <linux/bitops.h>
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#include <linux/delay.h>
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#include <linux/hwmon.h>
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#include <linux/i2c.h>
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#include <linux/mutex.h>
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#include <linux/regmap.h>
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#define MAX31827_T_REG 0x0
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#define MAX31827_CONFIGURATION_REG 0x2
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#define MAX31827_TH_REG 0x4
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#define MAX31827_TL_REG 0x6
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#define MAX31827_TH_HYST_REG 0x8
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#define MAX31827_TL_HYST_REG 0xA
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#define MAX31827_CONFIGURATION_1SHOT_MASK BIT(0)
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#define MAX31827_CONFIGURATION_CNV_RATE_MASK GENMASK(3, 1)
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#define MAX31827_CONFIGURATION_U_TEMP_STAT_MASK BIT(14)
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#define MAX31827_CONFIGURATION_O_TEMP_STAT_MASK BIT(15)
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#define MAX31827_12_BIT_CNV_TIME 141
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#define MAX31827_CNV_1_DIV_64_HZ 0x1
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#define MAX31827_CNV_1_DIV_32_HZ 0x2
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#define MAX31827_CNV_1_DIV_16_HZ 0x3
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#define MAX31827_CNV_1_DIV_4_HZ 0x4
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#define MAX31827_CNV_1_HZ 0x5
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#define MAX31827_CNV_4_HZ 0x6
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#define MAX31827_CNV_8_HZ 0x7
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#define MAX31827_16_BIT_TO_M_DGR(x) (sign_extend32(x, 15) * 1000 / 16)
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#define MAX31827_M_DGR_TO_16_BIT(x) (((x) << 4) / 1000)
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#define MAX31827_DEVICE_ENABLE(x) ((x) ? 0xA : 0x0)
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struct max31827_state {
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/*
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* Prevent simultaneous access to the i2c client.
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*/
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struct mutex lock;
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struct regmap *regmap;
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bool enable;
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};
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static const struct regmap_config max31827_regmap = {
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.reg_bits = 8,
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.val_bits = 16,
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.max_register = 0xA,
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};
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static int write_alarm_val(struct max31827_state *st, unsigned int reg,
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long val)
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{
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unsigned int cfg;
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unsigned int tmp;
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int ret;
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val = MAX31827_M_DGR_TO_16_BIT(val);
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/*
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* Before the Temperature Threshold Alarm and Alarm Hysteresis Threshold
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* register values are changed over I2C, the part must be in shutdown
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* mode.
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*
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* Mutex is used to ensure, that some other process doesn't change the
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* configuration register.
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*/
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mutex_lock(&st->lock);
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if (!st->enable) {
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ret = regmap_write(st->regmap, reg, val);
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goto unlock;
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}
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ret = regmap_read(st->regmap, MAX31827_CONFIGURATION_REG, &cfg);
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if (ret)
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goto unlock;
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tmp = cfg & ~(MAX31827_CONFIGURATION_1SHOT_MASK |
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MAX31827_CONFIGURATION_CNV_RATE_MASK);
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ret = regmap_write(st->regmap, MAX31827_CONFIGURATION_REG, tmp);
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if (ret)
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goto unlock;
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ret = regmap_write(st->regmap, reg, val);
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if (ret)
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goto unlock;
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ret = regmap_write(st->regmap, MAX31827_CONFIGURATION_REG, cfg);
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unlock:
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mutex_unlock(&st->lock);
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return ret;
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}
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static umode_t max31827_is_visible(const void *state,
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enum hwmon_sensor_types type, u32 attr,
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int channel)
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{
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if (type == hwmon_temp) {
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switch (attr) {
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case hwmon_temp_enable:
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case hwmon_temp_max:
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case hwmon_temp_min:
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case hwmon_temp_max_hyst:
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case hwmon_temp_min_hyst:
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return 0644;
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case hwmon_temp_input:
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case hwmon_temp_min_alarm:
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case hwmon_temp_max_alarm:
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return 0444;
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default:
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return 0;
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}
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} else if (type == hwmon_chip) {
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if (attr == hwmon_chip_update_interval)
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return 0644;
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}
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return 0;
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}
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static int max31827_read(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long *val)
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{
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struct max31827_state *st = dev_get_drvdata(dev);
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unsigned int uval;
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int ret = 0;
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switch (type) {
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case hwmon_temp:
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switch (attr) {
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case hwmon_temp_enable:
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ret = regmap_read(st->regmap,
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MAX31827_CONFIGURATION_REG, &uval);
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if (ret)
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break;
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uval = FIELD_GET(MAX31827_CONFIGURATION_1SHOT_MASK |
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MAX31827_CONFIGURATION_CNV_RATE_MASK,
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uval);
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*val = !!uval;
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break;
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case hwmon_temp_input:
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mutex_lock(&st->lock);
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if (!st->enable) {
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/*
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* This operation requires mutex protection,
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* because the chip configuration should not
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* be changed during the conversion process.
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*/
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ret = regmap_update_bits(st->regmap,
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MAX31827_CONFIGURATION_REG,
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MAX31827_CONFIGURATION_1SHOT_MASK,
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1);
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if (ret) {
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mutex_unlock(&st->lock);
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return ret;
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}
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msleep(MAX31827_12_BIT_CNV_TIME);
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}
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ret = regmap_read(st->regmap, MAX31827_T_REG, &uval);
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mutex_unlock(&st->lock);
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if (ret)
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break;
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*val = MAX31827_16_BIT_TO_M_DGR(uval);
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break;
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case hwmon_temp_max:
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ret = regmap_read(st->regmap, MAX31827_TH_REG, &uval);
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if (ret)
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break;
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*val = MAX31827_16_BIT_TO_M_DGR(uval);
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break;
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case hwmon_temp_max_hyst:
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ret = regmap_read(st->regmap, MAX31827_TH_HYST_REG,
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&uval);
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if (ret)
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break;
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*val = MAX31827_16_BIT_TO_M_DGR(uval);
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break;
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case hwmon_temp_max_alarm:
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ret = regmap_read(st->regmap,
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MAX31827_CONFIGURATION_REG, &uval);
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if (ret)
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break;
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*val = FIELD_GET(MAX31827_CONFIGURATION_O_TEMP_STAT_MASK,
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uval);
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break;
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case hwmon_temp_min:
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ret = regmap_read(st->regmap, MAX31827_TL_REG, &uval);
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if (ret)
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break;
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*val = MAX31827_16_BIT_TO_M_DGR(uval);
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break;
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case hwmon_temp_min_hyst:
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ret = regmap_read(st->regmap, MAX31827_TL_HYST_REG,
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&uval);
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if (ret)
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break;
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*val = MAX31827_16_BIT_TO_M_DGR(uval);
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break;
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case hwmon_temp_min_alarm:
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ret = regmap_read(st->regmap,
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MAX31827_CONFIGURATION_REG, &uval);
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if (ret)
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break;
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*val = FIELD_GET(MAX31827_CONFIGURATION_U_TEMP_STAT_MASK,
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uval);
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break;
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default:
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ret = -EOPNOTSUPP;
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break;
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}
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break;
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case hwmon_chip:
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if (attr == hwmon_chip_update_interval) {
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ret = regmap_read(st->regmap,
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MAX31827_CONFIGURATION_REG, &uval);
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if (ret)
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break;
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uval = FIELD_GET(MAX31827_CONFIGURATION_CNV_RATE_MASK,
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uval);
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switch (uval) {
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case MAX31827_CNV_1_DIV_64_HZ:
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*val = 64000;
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break;
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case MAX31827_CNV_1_DIV_32_HZ:
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*val = 32000;
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break;
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case MAX31827_CNV_1_DIV_16_HZ:
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*val = 16000;
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break;
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case MAX31827_CNV_1_DIV_4_HZ:
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*val = 4000;
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break;
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case MAX31827_CNV_1_HZ:
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*val = 1000;
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break;
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case MAX31827_CNV_4_HZ:
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*val = 250;
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break;
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case MAX31827_CNV_8_HZ:
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*val = 125;
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break;
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default:
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*val = 0;
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break;
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}
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}
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break;
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default:
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ret = -EOPNOTSUPP;
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break;
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}
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return ret;
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}
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static int max31827_write(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long val)
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{
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struct max31827_state *st = dev_get_drvdata(dev);
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int ret;
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switch (type) {
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case hwmon_temp:
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switch (attr) {
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case hwmon_temp_enable:
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if (val >> 1)
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return -EINVAL;
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mutex_lock(&st->lock);
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/**
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* The chip should not be enabled while a conversion is
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* performed. Neither should the chip be enabled when
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* the alarm values are changed.
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*/
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st->enable = val;
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ret = regmap_update_bits(st->regmap,
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MAX31827_CONFIGURATION_REG,
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MAX31827_CONFIGURATION_1SHOT_MASK |
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MAX31827_CONFIGURATION_CNV_RATE_MASK,
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MAX31827_DEVICE_ENABLE(val));
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mutex_unlock(&st->lock);
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return ret;
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case hwmon_temp_max:
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return write_alarm_val(st, MAX31827_TH_REG, val);
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case hwmon_temp_max_hyst:
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return write_alarm_val(st, MAX31827_TH_HYST_REG, val);
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case hwmon_temp_min:
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return write_alarm_val(st, MAX31827_TL_REG, val);
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case hwmon_temp_min_hyst:
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return write_alarm_val(st, MAX31827_TL_HYST_REG, val);
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default:
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return -EOPNOTSUPP;
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}
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case hwmon_chip:
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if (attr == hwmon_chip_update_interval) {
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if (!st->enable)
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return -EINVAL;
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switch (val) {
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case 125:
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val = MAX31827_CNV_8_HZ;
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break;
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case 250:
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val = MAX31827_CNV_4_HZ;
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break;
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case 1000:
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val = MAX31827_CNV_1_HZ;
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break;
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case 4000:
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val = MAX31827_CNV_1_DIV_4_HZ;
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break;
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case 16000:
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val = MAX31827_CNV_1_DIV_16_HZ;
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break;
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case 32000:
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val = MAX31827_CNV_1_DIV_32_HZ;
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break;
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case 64000:
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val = MAX31827_CNV_1_DIV_64_HZ;
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break;
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default:
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return -EINVAL;
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}
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val = FIELD_PREP(MAX31827_CONFIGURATION_CNV_RATE_MASK,
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val);
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return regmap_update_bits(st->regmap,
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MAX31827_CONFIGURATION_REG,
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MAX31827_CONFIGURATION_CNV_RATE_MASK,
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val);
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}
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break;
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default:
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return -EOPNOTSUPP;
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}
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return -EOPNOTSUPP;
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}
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static int max31827_init_client(struct max31827_state *st)
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{
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st->enable = true;
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return regmap_update_bits(st->regmap, MAX31827_CONFIGURATION_REG,
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MAX31827_CONFIGURATION_1SHOT_MASK |
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MAX31827_CONFIGURATION_CNV_RATE_MASK,
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MAX31827_DEVICE_ENABLE(1));
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}
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static const struct hwmon_channel_info *max31827_info[] = {
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|
HWMON_CHANNEL_INFO(temp, HWMON_T_ENABLE | HWMON_T_INPUT | HWMON_T_MIN |
|
||
|
|
HWMON_T_MIN_HYST | HWMON_T_MIN_ALARM |
|
||
|
|
HWMON_T_MAX | HWMON_T_MAX_HYST |
|
||
|
|
HWMON_T_MAX_ALARM),
|
||
|
|
HWMON_CHANNEL_INFO(chip, HWMON_C_UPDATE_INTERVAL),
|
||
|
|
NULL,
|
||
|
|
};
|
||
|
|
|
||
|
|
static const struct hwmon_ops max31827_hwmon_ops = {
|
||
|
|
.is_visible = max31827_is_visible,
|
||
|
|
.read = max31827_read,
|
||
|
|
.write = max31827_write,
|
||
|
|
};
|
||
|
|
|
||
|
|
static const struct hwmon_chip_info max31827_chip_info = {
|
||
|
|
.ops = &max31827_hwmon_ops,
|
||
|
|
.info = max31827_info,
|
||
|
|
};
|
||
|
|
|
||
|
|
static int max31827_probe(struct i2c_client *client)
|
||
|
|
{
|
||
|
|
struct device *dev = &client->dev;
|
||
|
|
struct device *hwmon_dev;
|
||
|
|
struct max31827_state *st;
|
||
|
|
int err;
|
||
|
|
|
||
|
|
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA))
|
||
|
|
return -EOPNOTSUPP;
|
||
|
|
|
||
|
|
st = devm_kzalloc(dev, sizeof(*st), GFP_KERNEL);
|
||
|
|
if (!st)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
mutex_init(&st->lock);
|
||
|
|
|
||
|
|
st->regmap = devm_regmap_init_i2c(client, &max31827_regmap);
|
||
|
|
if (IS_ERR(st->regmap))
|
||
|
|
return dev_err_probe(dev, PTR_ERR(st->regmap),
|
||
|
|
"Failed to allocate regmap.\n");
|
||
|
|
|
||
|
|
err = max31827_init_client(st);
|
||
|
|
if (err)
|
||
|
|
return err;
|
||
|
|
|
||
|
|
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, st,
|
||
|
|
&max31827_chip_info,
|
||
|
|
NULL);
|
||
|
|
|
||
|
|
return PTR_ERR_OR_ZERO(hwmon_dev);
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct i2c_device_id max31827_i2c_ids[] = {
|
||
|
|
{ "max31827", 0 },
|
||
|
|
{ }
|
||
|
|
};
|
||
|
|
MODULE_DEVICE_TABLE(i2c, max31827_i2c_ids);
|
||
|
|
|
||
|
|
static const struct of_device_id max31827_of_match[] = {
|
||
|
|
{ .compatible = "adi,max31827" },
|
||
|
|
{ }
|
||
|
|
};
|
||
|
|
MODULE_DEVICE_TABLE(of, max31827_of_match);
|
||
|
|
|
||
|
|
static struct i2c_driver max31827_driver = {
|
||
|
|
.class = I2C_CLASS_HWMON,
|
||
|
|
.driver = {
|
||
|
|
.name = "max31827",
|
||
|
|
.of_match_table = max31827_of_match,
|
||
|
|
},
|
||
|
|
.probe_new = max31827_probe,
|
||
|
|
.id_table = max31827_i2c_ids,
|
||
|
|
};
|
||
|
|
module_i2c_driver(max31827_driver);
|
||
|
|
|
||
|
|
MODULE_AUTHOR("Daniel Matyas <daniel.matyas@analog.com>");
|
||
|
|
MODULE_DESCRIPTION("Maxim MAX31827 low-power temperature switch driver");
|
||
|
|
MODULE_LICENSE("GPL");
|