2006-01-19 09:44:13 +08:00
|
|
|
#
|
|
|
|
# EDAC Kconfig
|
|
|
|
# Copyright (c) 2003 Linux Networx
|
|
|
|
# Licensed and distributed under the GPL
|
|
|
|
#
|
|
|
|
|
2007-07-16 14:39:27 +08:00
|
|
|
menuconfig EDAC
|
2007-07-19 16:50:15 +08:00
|
|
|
bool "EDAC - error detection and reporting (EXPERIMENTAL)"
|
2007-05-10 21:45:57 +08:00
|
|
|
depends on HAS_IOMEM
|
2007-07-19 16:50:15 +08:00
|
|
|
depends on EXPERIMENTAL
|
2007-07-27 01:41:10 +08:00
|
|
|
depends on X86 || PPC
|
2006-01-19 09:44:13 +08:00
|
|
|
help
|
|
|
|
EDAC is designed to report errors in the core system.
|
|
|
|
These are low-level errors that are reported in the CPU or
|
2007-07-19 16:50:12 +08:00
|
|
|
supporting chipset or other subsystems:
|
|
|
|
memory errors, cache errors, PCI errors, thermal throttling, etc..
|
|
|
|
If unsure, select 'Y'.
|
2006-01-19 09:44:13 +08:00
|
|
|
|
2006-03-10 09:33:50 +08:00
|
|
|
If this code is reporting problems on your system, please
|
|
|
|
see the EDAC project web pages for more information at:
|
|
|
|
|
|
|
|
<http://bluesmoke.sourceforge.net/>
|
|
|
|
|
|
|
|
and:
|
|
|
|
|
|
|
|
<http://buttersideup.com/edacwiki>
|
|
|
|
|
|
|
|
There is also a mailing list for the EDAC project, which can
|
|
|
|
be found via the sourceforge page.
|
|
|
|
|
2007-07-16 14:39:27 +08:00
|
|
|
if EDAC
|
2006-01-19 09:44:13 +08:00
|
|
|
|
|
|
|
comment "Reporting subsystems"
|
|
|
|
|
|
|
|
config EDAC_DEBUG
|
|
|
|
bool "Debugging"
|
|
|
|
help
|
|
|
|
This turns on debugging information for the entire EDAC
|
|
|
|
sub-system. You can insert module with "debug_level=x", current
|
|
|
|
there're four debug levels (x=0,1,2,3 from low to high).
|
|
|
|
Usually you should select 'N'.
|
|
|
|
|
|
|
|
config EDAC_MM_EDAC
|
|
|
|
tristate "Main Memory EDAC (Error Detection And Correction) reporting"
|
|
|
|
default y
|
|
|
|
help
|
|
|
|
Some systems are able to detect and correct errors in main
|
|
|
|
memory. EDAC can report statistics on memory error
|
|
|
|
detection and correction (EDAC - or commonly referred to ECC
|
|
|
|
errors). EDAC will also try to decode where these errors
|
|
|
|
occurred so that a particular failing memory module can be
|
|
|
|
replaced. If unsure, select 'Y'.
|
|
|
|
|
|
|
|
|
|
|
|
config EDAC_AMD76X
|
|
|
|
tristate "AMD 76x (760, 762, 768)"
|
2006-02-03 19:04:11 +08:00
|
|
|
depends on EDAC_MM_EDAC && PCI && X86_32
|
2006-01-19 09:44:13 +08:00
|
|
|
help
|
|
|
|
Support for error detection and correction on the AMD 76x
|
|
|
|
series of chipsets used with the Athlon processor.
|
|
|
|
|
|
|
|
config EDAC_E7XXX
|
|
|
|
tristate "Intel e7xxx (e7205, e7500, e7501, e7505)"
|
2006-03-26 17:38:50 +08:00
|
|
|
depends on EDAC_MM_EDAC && PCI && X86_32
|
2006-01-19 09:44:13 +08:00
|
|
|
help
|
|
|
|
Support for error detection and correction on the Intel
|
|
|
|
E7205, E7500, E7501 and E7505 server chipsets.
|
|
|
|
|
|
|
|
config EDAC_E752X
|
|
|
|
tristate "Intel e752x (e7520, e7525, e7320)"
|
2006-03-31 18:30:34 +08:00
|
|
|
depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG
|
2006-01-19 09:44:13 +08:00
|
|
|
help
|
|
|
|
Support for error detection and correction on the Intel
|
|
|
|
E7520, E7525, E7320 server chipsets.
|
|
|
|
|
2007-07-19 16:49:42 +08:00
|
|
|
config EDAC_I82443BXGX
|
|
|
|
tristate "Intel 82443BX/GX (440BX/GX)"
|
|
|
|
depends on EDAC_MM_EDAC && PCI && X86_32
|
2007-07-19 16:49:45 +08:00
|
|
|
depends on BROKEN
|
2007-07-19 16:49:42 +08:00
|
|
|
help
|
|
|
|
Support for error detection and correction on the Intel
|
|
|
|
82443BX/GX memory controllers (440BX/GX chipsets).
|
|
|
|
|
2006-01-19 09:44:13 +08:00
|
|
|
config EDAC_I82875P
|
|
|
|
tristate "Intel 82875p (D82875P, E7210)"
|
2006-03-26 17:38:50 +08:00
|
|
|
depends on EDAC_MM_EDAC && PCI && X86_32
|
2006-01-19 09:44:13 +08:00
|
|
|
help
|
|
|
|
Support for error detection and correction on the Intel
|
|
|
|
DP82785P and E7210 server chipsets.
|
|
|
|
|
2007-07-19 16:50:31 +08:00
|
|
|
config EDAC_I82975X
|
|
|
|
tristate "Intel 82975x (D82975x)"
|
|
|
|
depends on EDAC_MM_EDAC && PCI && X86
|
|
|
|
help
|
|
|
|
Support for error detection and correction on the Intel
|
|
|
|
DP82975x server chipsets.
|
|
|
|
|
2007-07-19 16:49:48 +08:00
|
|
|
config EDAC_I3000
|
|
|
|
tristate "Intel 3000/3010"
|
|
|
|
depends on EDAC_MM_EDAC && PCI && X86_32
|
|
|
|
help
|
|
|
|
Support for error detection and correction on the Intel
|
|
|
|
3000 and 3010 server chipsets.
|
|
|
|
|
2006-01-19 09:44:13 +08:00
|
|
|
config EDAC_I82860
|
|
|
|
tristate "Intel 82860"
|
2006-03-26 17:38:50 +08:00
|
|
|
depends on EDAC_MM_EDAC && PCI && X86_32
|
2006-01-19 09:44:13 +08:00
|
|
|
help
|
|
|
|
Support for error detection and correction on the Intel
|
|
|
|
82860 chipset.
|
|
|
|
|
|
|
|
config EDAC_R82600
|
|
|
|
tristate "Radisys 82600 embedded chipset"
|
2006-03-26 17:38:50 +08:00
|
|
|
depends on EDAC_MM_EDAC && PCI && X86_32
|
2006-01-19 09:44:13 +08:00
|
|
|
help
|
|
|
|
Support for error detection and correction on the Radisys
|
|
|
|
82600 embedded chipset.
|
|
|
|
|
2007-07-19 16:49:39 +08:00
|
|
|
config EDAC_I5000
|
|
|
|
tristate "Intel Greencreek/Blackford chipset"
|
|
|
|
depends on EDAC_MM_EDAC && X86 && PCI
|
|
|
|
help
|
|
|
|
Support for error detection and correction the Intel
|
|
|
|
Greekcreek/Blackford chipsets.
|
|
|
|
|
2007-07-19 16:50:24 +08:00
|
|
|
config EDAC_PASEMI
|
|
|
|
tristate "PA Semi PWRficient"
|
|
|
|
depends on EDAC_MM_EDAC && PCI
|
2007-07-27 01:41:16 +08:00
|
|
|
depends on PPC_PASEMI
|
2007-07-19 16:50:24 +08:00
|
|
|
help
|
|
|
|
Support for error detection and correction on PA Semi
|
|
|
|
PWRficient.
|
|
|
|
|
2008-02-07 16:14:53 +08:00
|
|
|
config EDAC_CELL
|
|
|
|
tristate "Cell Broadband Engine memory controller"
|
|
|
|
depends on EDAC_MM_EDAC && PPC_CELL_NATIVE
|
|
|
|
help
|
|
|
|
Support for error detection and correction on the
|
|
|
|
Cell Broadband Engine internal memory controller
|
|
|
|
on platform without a hypervisor
|
2007-07-19 16:50:24 +08:00
|
|
|
|
2007-07-16 14:39:27 +08:00
|
|
|
endif # EDAC
|