2011-03-23 19:42:44 +08:00
|
|
|
/*
|
|
|
|
* linux/drivers/mmc/host/tmio_mmc.h
|
|
|
|
*
|
2016-04-26 23:55:26 +08:00
|
|
|
* Copyright (C) 2016 Sang Engineering, Wolfram Sang
|
|
|
|
* Copyright (C) 2015-16 Renesas Electronics Corporation
|
2011-03-23 19:42:44 +08:00
|
|
|
* Copyright (C) 2007 Ian Molton
|
|
|
|
* Copyright (C) 2004 Ian Molton
|
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or modify
|
|
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
|
|
* published by the Free Software Foundation.
|
|
|
|
*
|
|
|
|
* Driver for the MMC / SD / SDIO cell found in:
|
|
|
|
*
|
|
|
|
* TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef TMIO_MMC_H
|
|
|
|
#define TMIO_MMC_H
|
|
|
|
|
2015-01-13 12:59:14 +08:00
|
|
|
#include <linux/dmaengine.h>
|
2011-03-23 19:42:44 +08:00
|
|
|
#include <linux/highmem.h>
|
2011-07-14 18:12:38 +08:00
|
|
|
#include <linux/mutex.h>
|
2011-03-23 19:42:44 +08:00
|
|
|
#include <linux/pagemap.h>
|
2011-07-27 02:50:23 +08:00
|
|
|
#include <linux/scatterlist.h>
|
2012-01-06 20:06:51 +08:00
|
|
|
#include <linux/spinlock.h>
|
2011-03-23 19:42:44 +08:00
|
|
|
|
2016-04-26 23:55:26 +08:00
|
|
|
#define CTL_SD_CMD 0x00
|
|
|
|
#define CTL_ARG_REG 0x04
|
|
|
|
#define CTL_STOP_INTERNAL_ACTION 0x08
|
|
|
|
#define CTL_XFER_BLK_COUNT 0xa
|
|
|
|
#define CTL_RESPONSE 0x0c
|
2016-04-28 00:51:27 +08:00
|
|
|
/* driver merges STATUS and following STATUS2 */
|
2016-04-26 23:55:26 +08:00
|
|
|
#define CTL_STATUS 0x1c
|
2016-04-28 00:51:27 +08:00
|
|
|
/* driver merges IRQ_MASK and following IRQ_MASK2 */
|
2016-04-26 23:55:26 +08:00
|
|
|
#define CTL_IRQ_MASK 0x20
|
|
|
|
#define CTL_SD_CARD_CLK_CTL 0x24
|
|
|
|
#define CTL_SD_XFER_LEN 0x26
|
|
|
|
#define CTL_SD_MEM_CARD_OPT 0x28
|
|
|
|
#define CTL_SD_ERROR_DETAIL_STATUS 0x2c
|
|
|
|
#define CTL_SD_DATA_PORT 0x30
|
|
|
|
#define CTL_TRANSACTION_CTL 0x34
|
|
|
|
#define CTL_SDIO_STATUS 0x36
|
|
|
|
#define CTL_SDIO_IRQ_MASK 0x38
|
|
|
|
#define CTL_DMA_ENABLE 0xd8
|
|
|
|
#define CTL_RESET_SD 0xe0
|
|
|
|
#define CTL_VERSION 0xe2
|
|
|
|
#define CTL_SDIO_REGS 0x100
|
|
|
|
#define CTL_CLK_AND_WAIT_CTL 0x138
|
|
|
|
#define CTL_RESET_SDIO 0x1e0
|
|
|
|
|
|
|
|
/* Definitions for values the CTRL_STATUS register can take. */
|
2016-04-28 00:51:24 +08:00
|
|
|
#define TMIO_STAT_CMDRESPEND BIT(0)
|
|
|
|
#define TMIO_STAT_DATAEND BIT(2)
|
|
|
|
#define TMIO_STAT_CARD_REMOVE BIT(3)
|
|
|
|
#define TMIO_STAT_CARD_INSERT BIT(4)
|
|
|
|
#define TMIO_STAT_SIGSTATE BIT(5)
|
|
|
|
#define TMIO_STAT_WRPROTECT BIT(7)
|
|
|
|
#define TMIO_STAT_CARD_REMOVE_A BIT(8)
|
|
|
|
#define TMIO_STAT_CARD_INSERT_A BIT(9)
|
|
|
|
#define TMIO_STAT_SIGSTATE_A BIT(10)
|
|
|
|
|
|
|
|
/* These belong technically to CTRL_STATUS2, but the driver merges them */
|
|
|
|
#define TMIO_STAT_CMD_IDX_ERR BIT(16)
|
|
|
|
#define TMIO_STAT_CRCFAIL BIT(17)
|
|
|
|
#define TMIO_STAT_STOPBIT_ERR BIT(18)
|
|
|
|
#define TMIO_STAT_DATATIMEOUT BIT(19)
|
|
|
|
#define TMIO_STAT_RXOVERFLOW BIT(20)
|
|
|
|
#define TMIO_STAT_TXUNDERRUN BIT(21)
|
|
|
|
#define TMIO_STAT_CMDTIMEOUT BIT(22)
|
2016-04-28 00:51:25 +08:00
|
|
|
#define TMIO_STAT_DAT0 BIT(23) /* only known on R-Car so far */
|
2016-04-28 00:51:24 +08:00
|
|
|
#define TMIO_STAT_RXRDY BIT(24)
|
|
|
|
#define TMIO_STAT_TXRQ BIT(25)
|
2016-04-28 00:51:26 +08:00
|
|
|
#define TMIO_STAT_ILL_FUNC BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */
|
|
|
|
#define TMIO_STAT_SCLKDIVEN BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */
|
2016-04-28 00:51:24 +08:00
|
|
|
#define TMIO_STAT_CMD_BUSY BIT(30)
|
|
|
|
#define TMIO_STAT_ILL_ACCESS BIT(31)
|
2016-04-26 23:55:26 +08:00
|
|
|
|
|
|
|
#define CLK_CTL_DIV_MASK 0xff
|
|
|
|
#define CLK_CTL_SCLKEN BIT(8)
|
|
|
|
|
|
|
|
#define TMIO_BBS 512 /* Boot block size */
|
|
|
|
|
2011-03-23 19:42:44 +08:00
|
|
|
/* Definitions for values the CTRL_SDIO_STATUS register can take. */
|
2011-03-24 16:48:36 +08:00
|
|
|
#define TMIO_SDIO_STAT_IOIRQ 0x0001
|
2011-03-23 19:42:44 +08:00
|
|
|
#define TMIO_SDIO_STAT_EXPUB52 0x4000
|
2011-03-24 16:48:36 +08:00
|
|
|
#define TMIO_SDIO_STAT_EXWT 0x8000
|
|
|
|
#define TMIO_SDIO_MASK_ALL 0xc007
|
2011-03-23 19:42:44 +08:00
|
|
|
|
|
|
|
/* Define some IRQ masks */
|
|
|
|
/* This is the mask used at reset by the chip */
|
|
|
|
#define TMIO_MASK_ALL 0x837f031d
|
|
|
|
#define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
|
|
|
|
#define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
|
|
|
|
#define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
|
|
|
|
TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
|
|
|
|
#define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
|
|
|
|
|
|
|
|
struct tmio_mmc_data;
|
2015-01-13 12:59:05 +08:00
|
|
|
struct tmio_mmc_host;
|
2011-03-23 19:42:44 +08:00
|
|
|
|
2015-01-13 12:57:33 +08:00
|
|
|
struct tmio_mmc_dma {
|
2015-01-13 12:59:14 +08:00
|
|
|
enum dma_slave_buswidth dma_buswidth;
|
2015-01-13 12:57:33 +08:00
|
|
|
bool (*filter)(struct dma_chan *chan, void *arg);
|
2015-01-13 12:59:05 +08:00
|
|
|
void (*enable)(struct tmio_mmc_host *host, bool enable);
|
2015-01-13 12:57:33 +08:00
|
|
|
};
|
|
|
|
|
2011-03-23 19:42:44 +08:00
|
|
|
struct tmio_mmc_host {
|
|
|
|
void __iomem *ctl;
|
|
|
|
struct mmc_command *cmd;
|
|
|
|
struct mmc_request *mrq;
|
|
|
|
struct mmc_data *data;
|
|
|
|
struct mmc_host *mmc;
|
|
|
|
|
|
|
|
/* Callbacks for clock / power control */
|
|
|
|
void (*set_pwr)(struct platform_device *host, int state);
|
|
|
|
void (*set_clk_div)(struct platform_device *host, int state);
|
|
|
|
|
|
|
|
/* pio related stuff */
|
|
|
|
struct scatterlist *sg_ptr;
|
|
|
|
struct scatterlist *sg_orig;
|
|
|
|
unsigned int sg_len;
|
|
|
|
unsigned int sg_off;
|
2015-01-13 12:58:20 +08:00
|
|
|
unsigned long bus_shift;
|
2011-03-23 19:42:44 +08:00
|
|
|
|
|
|
|
struct platform_device *pdev;
|
|
|
|
struct tmio_mmc_data *pdata;
|
2015-01-13 12:57:33 +08:00
|
|
|
struct tmio_mmc_dma *dma;
|
2011-03-23 19:42:44 +08:00
|
|
|
|
|
|
|
/* DMA support */
|
|
|
|
bool force_pio;
|
|
|
|
struct dma_chan *chan_rx;
|
|
|
|
struct dma_chan *chan_tx;
|
|
|
|
struct tasklet_struct dma_complete;
|
|
|
|
struct tasklet_struct dma_issue;
|
|
|
|
struct scatterlist bounce_sg;
|
|
|
|
u8 *bounce_buf;
|
|
|
|
|
|
|
|
/* Track lost interrupts */
|
|
|
|
struct delayed_work delayed_reset_work;
|
2011-07-14 18:12:38 +08:00
|
|
|
struct work_struct done;
|
|
|
|
|
2013-10-30 07:16:17 +08:00
|
|
|
/* Cache */
|
2011-08-25 09:27:25 +08:00
|
|
|
u32 sdcard_irq_mask;
|
|
|
|
u32 sdio_irq_mask;
|
2013-10-30 07:16:17 +08:00
|
|
|
unsigned int clk_cache;
|
2011-08-25 09:27:25 +08:00
|
|
|
|
2011-07-14 18:12:38 +08:00
|
|
|
spinlock_t lock; /* protect host private data */
|
2011-03-23 19:42:44 +08:00
|
|
|
unsigned long last_req_ts;
|
2011-07-14 18:12:38 +08:00
|
|
|
struct mutex ios_lock; /* protect set_ios() context */
|
2012-02-10 05:57:08 +08:00
|
|
|
bool native_hotplug;
|
2013-10-24 21:58:45 +08:00
|
|
|
bool sdio_irq_enabled;
|
2015-01-13 12:57:42 +08:00
|
|
|
|
|
|
|
int (*write16_hook)(struct tmio_mmc_host *host, int addr);
|
2016-04-01 23:44:31 +08:00
|
|
|
int (*clk_enable)(struct tmio_mmc_host *host);
|
2016-04-01 23:44:32 +08:00
|
|
|
unsigned int (*clk_update)(struct tmio_mmc_host *host,
|
|
|
|
unsigned int new_clock);
|
2016-04-01 23:44:31 +08:00
|
|
|
void (*clk_disable)(struct tmio_mmc_host *host);
|
2015-01-13 12:58:10 +08:00
|
|
|
int (*multi_io_quirk)(struct mmc_card *card,
|
|
|
|
unsigned int direction, int blk_size);
|
2016-04-01 23:44:33 +08:00
|
|
|
int (*start_signal_voltage_switch)(struct mmc_host *mmc,
|
|
|
|
struct mmc_ios *ios);
|
2011-03-23 19:42:44 +08:00
|
|
|
};
|
|
|
|
|
2015-01-13 12:57:22 +08:00
|
|
|
struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev);
|
|
|
|
void tmio_mmc_host_free(struct tmio_mmc_host *host);
|
|
|
|
int tmio_mmc_host_probe(struct tmio_mmc_host *host,
|
2011-03-23 19:42:44 +08:00
|
|
|
struct tmio_mmc_data *pdata);
|
|
|
|
void tmio_mmc_host_remove(struct tmio_mmc_host *host);
|
|
|
|
void tmio_mmc_do_data_irq(struct tmio_mmc_host *host);
|
|
|
|
|
|
|
|
void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
|
|
|
|
void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
|
2011-05-06 19:02:33 +08:00
|
|
|
irqreturn_t tmio_mmc_irq(int irq, void *devid);
|
2011-03-23 19:42:44 +08:00
|
|
|
|
|
|
|
static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg,
|
|
|
|
unsigned long *flags)
|
|
|
|
{
|
|
|
|
local_irq_save(*flags);
|
2011-11-27 13:27:00 +08:00
|
|
|
return kmap_atomic(sg_page(sg)) + sg->offset;
|
2011-03-23 19:42:44 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg,
|
|
|
|
unsigned long *flags, void *virt)
|
|
|
|
{
|
2011-11-27 13:27:00 +08:00
|
|
|
kunmap_atomic(virt - sg->offset);
|
2011-03-23 19:42:44 +08:00
|
|
|
local_irq_restore(*flags);
|
|
|
|
}
|
|
|
|
|
2011-03-14 16:52:33 +08:00
|
|
|
#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
|
2011-03-23 19:42:44 +08:00
|
|
|
void tmio_mmc_start_dma(struct tmio_mmc_host *host, struct mmc_data *data);
|
2011-07-15 00:39:10 +08:00
|
|
|
void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable);
|
2011-03-23 19:42:44 +08:00
|
|
|
void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdata);
|
|
|
|
void tmio_mmc_release_dma(struct tmio_mmc_host *host);
|
2012-01-06 20:06:51 +08:00
|
|
|
void tmio_mmc_abort_dma(struct tmio_mmc_host *host);
|
2011-03-23 19:42:44 +08:00
|
|
|
#else
|
|
|
|
static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
|
|
|
|
struct mmc_data *data)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
2011-07-15 00:39:10 +08:00
|
|
|
static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
2011-03-23 19:42:44 +08:00
|
|
|
static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
|
|
|
|
struct tmio_mmc_data *pdata)
|
|
|
|
{
|
|
|
|
host->chan_tx = NULL;
|
|
|
|
host->chan_rx = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
|
|
|
|
{
|
|
|
|
}
|
2012-01-06 20:06:51 +08:00
|
|
|
|
|
|
|
static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
|
|
|
|
{
|
|
|
|
}
|
2011-03-23 19:42:44 +08:00
|
|
|
#endif
|
|
|
|
|
2014-08-25 18:03:20 +08:00
|
|
|
#ifdef CONFIG_PM
|
2011-05-12 00:51:11 +08:00
|
|
|
int tmio_mmc_host_runtime_suspend(struct device *dev);
|
|
|
|
int tmio_mmc_host_runtime_resume(struct device *dev);
|
2013-10-23 20:55:07 +08:00
|
|
|
#endif
|
2011-05-12 00:51:11 +08:00
|
|
|
|
2011-06-21 07:00:09 +08:00
|
|
|
static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
|
|
|
|
{
|
2015-01-13 12:58:20 +08:00
|
|
|
return readw(host->ctl + (addr << host->bus_shift));
|
2011-06-21 07:00:09 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
|
|
|
|
u16 *buf, int count)
|
|
|
|
{
|
2015-01-13 12:58:20 +08:00
|
|
|
readsw(host->ctl + (addr << host->bus_shift), buf, count);
|
2011-06-21 07:00:09 +08:00
|
|
|
}
|
|
|
|
|
2016-04-28 00:51:23 +08:00
|
|
|
static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host, int addr)
|
2011-06-21 07:00:09 +08:00
|
|
|
{
|
2015-01-13 12:58:20 +08:00
|
|
|
return readw(host->ctl + (addr << host->bus_shift)) |
|
|
|
|
readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
|
2011-06-21 07:00:09 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, u16 val)
|
|
|
|
{
|
2011-06-21 07:00:10 +08:00
|
|
|
/* If there is a hook and it returns non-zero then there
|
|
|
|
* is an error and the write should be skipped
|
|
|
|
*/
|
2015-01-13 12:57:42 +08:00
|
|
|
if (host->write16_hook && host->write16_hook(host, addr))
|
2011-06-21 07:00:10 +08:00
|
|
|
return;
|
2015-01-13 12:58:20 +08:00
|
|
|
writew(val, host->ctl + (addr << host->bus_shift));
|
2011-06-21 07:00:09 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
|
|
|
|
u16 *buf, int count)
|
|
|
|
{
|
2015-01-13 12:58:20 +08:00
|
|
|
writesw(host->ctl + (addr << host->bus_shift), buf, count);
|
2011-06-21 07:00:09 +08:00
|
|
|
}
|
|
|
|
|
2016-04-28 00:51:23 +08:00
|
|
|
static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, int addr, u32 val)
|
2011-06-21 07:00:09 +08:00
|
|
|
{
|
2015-01-13 12:58:20 +08:00
|
|
|
writew(val, host->ctl + (addr << host->bus_shift));
|
|
|
|
writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
|
2011-06-21 07:00:09 +08:00
|
|
|
}
|
|
|
|
|
2011-03-23 19:42:44 +08:00
|
|
|
#endif
|