364 lines
12 KiB
C
364 lines
12 KiB
C
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/*
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* Copyright (c) 2012 Qualcomm Atheros, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef __WIL6210_H__
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#define __WIL6210_H__
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#include <linux/netdevice.h>
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#include <linux/wireless.h>
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#include <net/cfg80211.h>
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#include "dbg_hexdump.h"
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#define WIL_NAME "wil6210"
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/**
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* extract bits [@b0:@b1] (inclusive) from the value @x
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* it should be @b0 <= @b1, or result is incorrect
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*/
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static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
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{
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return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1);
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}
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#define WIL6210_MEM_SIZE (2*1024*1024UL)
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#define WIL6210_TX_QUEUES (4)
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#define WIL6210_RX_RING_SIZE (128)
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#define WIL6210_TX_RING_SIZE (128)
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#define WIL6210_MAX_TX_RINGS (24)
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/* Hardware definitions begin */
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/*
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* Mapping
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* RGF File | Host addr | FW addr
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* | |
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* user_rgf | 0x000000 | 0x880000
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* dma_rgf | 0x001000 | 0x881000
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* pcie_rgf | 0x002000 | 0x882000
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* | |
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*/
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/* Where various structures placed in host address space */
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#define WIL6210_FW_HOST_OFF (0x880000UL)
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#define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF)
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/*
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* Interrupt control registers block
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*
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* each interrupt controlled by the same bit in all registers
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*/
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struct RGF_ICR {
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u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */
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u32 ICR; /* Cause, W1C/COR depending on ICC */
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u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
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u32 ICS; /* Cause Set, WO */
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u32 IMV; /* Mask, RW+S/C */
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u32 IMS; /* Mask Set, write 1 to set */
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u32 IMC; /* Mask Clear, write 1 to clear */
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} __packed;
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/* registers - FW addresses */
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#define RGF_USER_USER_SCRATCH_PAD (0x8802bc)
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#define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */
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#define BIT_USER_USER_ICR_SW_INT_2 BIT(18)
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#define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14)
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#define RGF_USER_MAC_CPU_0 (0x8801fc)
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#define RGF_USER_USER_CPU_0 (0x8801e0)
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#define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04)
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#define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08)
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#define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c)
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#define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10)
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#define RGF_DMA_PSEUDO_CAUSE (0x881c68)
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#define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c)
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#define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70)
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#define BIT_DMA_PSEUDO_CAUSE_RX BIT(0)
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#define BIT_DMA_PSEUDO_CAUSE_TX BIT(1)
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#define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2)
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#define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */
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#define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0)
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#define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */
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#define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */
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#define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0)
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#define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */
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#define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0)
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#define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1)
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#define BIT_DMA_EP_MISC_ICR_FW_INT0 BIT(28)
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#define BIT_DMA_EP_MISC_ICR_FW_INT1 BIT(29)
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/* Interrupt moderation control */
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#define RGF_DMA_ITR_CNT_TRSH (0x881c5c)
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#define RGF_DMA_ITR_CNT_DATA (0x881c60)
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#define RGF_DMA_ITR_CNT_CRL (0x881C64)
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#define BIT_DMA_ITR_CNT_CRL_EN BIT(0)
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#define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1)
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#define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2)
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#define BIT_DMA_ITR_CNT_CRL_CLR BIT(3)
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#define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4)
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/* popular locations */
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#define HOST_MBOX HOSTADDR(RGF_USER_USER_SCRATCH_PAD)
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#define HOST_SW_INT (HOSTADDR(RGF_USER_USER_ICR) + \
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offsetof(struct RGF_ICR, ICS))
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#define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2
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/* ISR register bits */
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#define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT0
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#define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT1
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/* Hardware definitions end */
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struct wil6210_mbox_ring {
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u32 base;
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u16 entry_size; /* max. size of mbox entry, incl. all headers */
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u16 size;
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u32 tail;
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u32 head;
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} __packed;
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struct wil6210_mbox_ring_desc {
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__le32 sync;
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__le32 addr;
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} __packed;
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/* at HOST_OFF_WIL6210_MBOX_CTL */
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struct wil6210_mbox_ctl {
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struct wil6210_mbox_ring tx;
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struct wil6210_mbox_ring rx;
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} __packed;
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struct wil6210_mbox_hdr {
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__le16 seq;
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__le16 len; /* payload, bytes after this header */
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__le16 type;
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u8 flags;
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u8 reserved;
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} __packed;
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#define WIL_MBOX_HDR_TYPE_WMI (0)
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/* max. value for wil6210_mbox_hdr.len */
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#define MAX_MBOXITEM_SIZE (240)
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struct wil6210_mbox_hdr_wmi {
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u8 reserved0[2];
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__le16 id;
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__le16 info1; /* bits [0..3] - device_id, rest - unused */
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u8 reserved1[2];
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} __packed;
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struct pending_wmi_event {
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struct list_head list;
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struct {
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struct wil6210_mbox_hdr hdr;
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struct wil6210_mbox_hdr_wmi wmi;
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u8 data[0];
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} __packed event;
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};
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union vring_desc;
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struct vring {
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dma_addr_t pa;
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volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */
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u16 size; /* number of vring_desc elements */
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u32 swtail;
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u32 swhead;
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u32 hwtail; /* write here to inform hw */
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void **ctx; /* void *ctx[size] - software context */
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};
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enum { /* for wil6210_priv.status */
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wil_status_fwready = 0,
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wil_status_fwconnected,
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wil_status_dontscan,
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wil_status_irqen, /* FIXME: interrupts enabled - for debug */
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};
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struct pci_dev;
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struct wil6210_stats {
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u64 tsf;
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u32 snr;
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u16 last_mcs_rx;
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u16 bf_mcs; /* last BF, used for Tx */
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u16 my_rx_sector;
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u16 my_tx_sector;
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u16 peer_rx_sector;
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u16 peer_tx_sector;
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};
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struct wil6210_priv {
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struct pci_dev *pdev;
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int n_msi;
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struct wireless_dev *wdev;
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void __iomem *csr;
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ulong status;
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/* profile */
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u32 monitor_flags;
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u32 secure_pcp; /* create secure PCP? */
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int sinfo_gen;
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/* cached ISR registers */
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u32 isr_misc;
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/* mailbox related */
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struct mutex wmi_mutex;
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struct wil6210_mbox_ctl mbox_ctl;
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struct completion wmi_ready;
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u16 wmi_seq;
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u16 reply_id; /**< wait for this WMI event */
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void *reply_buf;
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u16 reply_size;
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struct workqueue_struct *wmi_wq; /* for deferred calls */
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struct work_struct wmi_event_worker;
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struct workqueue_struct *wmi_wq_conn; /* for connect worker */
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struct work_struct wmi_connect_worker;
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struct work_struct disconnect_worker;
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struct timer_list connect_timer;
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int pending_connect_cid;
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struct list_head pending_wmi_ev;
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/*
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* protect pending_wmi_ev
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* - fill in IRQ from wil6210_irq_misc,
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* - consumed in thread by wmi_event_worker
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*/
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spinlock_t wmi_ev_lock;
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/* DMA related */
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struct vring vring_rx;
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struct vring vring_tx[WIL6210_MAX_TX_RINGS];
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u8 dst_addr[WIL6210_MAX_TX_RINGS][ETH_ALEN];
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/* scan */
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struct cfg80211_scan_request *scan_request;
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struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */
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/* statistics */
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struct wil6210_stats stats;
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/* debugfs */
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struct dentry *debug;
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struct debugfs_blob_wrapper fw_code_blob;
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struct debugfs_blob_wrapper fw_data_blob;
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struct debugfs_blob_wrapper fw_peri_blob;
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struct debugfs_blob_wrapper uc_code_blob;
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struct debugfs_blob_wrapper uc_data_blob;
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struct debugfs_blob_wrapper rgf_blob;
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};
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#define wil_to_wiphy(i) (i->wdev->wiphy)
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#define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
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#define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
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#define wil_to_wdev(i) (i->wdev)
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#define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
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#define wil_to_ndev(i) (wil_to_wdev(i)->netdev)
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#define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))
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#define wil_dbg(wil, fmt, arg...) netdev_dbg(wil_to_ndev(wil), fmt, ##arg)
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#define wil_info(wil, fmt, arg...) netdev_info(wil_to_ndev(wil), fmt, ##arg)
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#define wil_err(wil, fmt, arg...) netdev_err(wil_to_ndev(wil), fmt, ##arg)
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#define wil_dbg_IRQ(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
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#define wil_dbg_TXRX(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
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#define wil_dbg_WMI(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
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#define wil_hex_dump_TXRX(prefix_str, prefix_type, rowsize, \
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groupsize, buf, len, ascii) \
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wil_print_hex_dump_debug("DBG[TXRX]" prefix_str,\
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prefix_type, rowsize, \
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groupsize, buf, len, ascii)
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#define wil_hex_dump_WMI(prefix_str, prefix_type, rowsize, \
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groupsize, buf, len, ascii) \
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wil_print_hex_dump_debug("DBG[ WMI]" prefix_str,\
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prefix_type, rowsize, \
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groupsize, buf, len, ascii)
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void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
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size_t count);
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void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
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size_t count);
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void *wil_if_alloc(struct device *dev, void __iomem *csr);
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void wil_if_free(struct wil6210_priv *wil);
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int wil_if_add(struct wil6210_priv *wil);
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void wil_if_remove(struct wil6210_priv *wil);
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int wil_priv_init(struct wil6210_priv *wil);
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void wil_priv_deinit(struct wil6210_priv *wil);
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int wil_reset(struct wil6210_priv *wil);
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void wil_link_on(struct wil6210_priv *wil);
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void wil_link_off(struct wil6210_priv *wil);
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int wil_up(struct wil6210_priv *wil);
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int wil_down(struct wil6210_priv *wil);
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void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r);
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void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr);
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void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr);
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int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr,
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struct wil6210_mbox_hdr *hdr);
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int wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len);
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void wmi_recv_cmd(struct wil6210_priv *wil);
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int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len,
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u16 reply_id, void *reply, u8 reply_size, int to_msec);
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void wmi_connect_worker(struct work_struct *work);
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void wmi_event_worker(struct work_struct *work);
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void wmi_event_flush(struct wil6210_priv *wil);
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int wmi_set_ssid(struct wil6210_priv *wil, u8 ssid_len, const void *ssid);
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int wmi_get_ssid(struct wil6210_priv *wil, u8 *ssid_len, void *ssid);
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int wmi_set_channel(struct wil6210_priv *wil, int channel);
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int wmi_get_channel(struct wil6210_priv *wil, int *channel);
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int wmi_tx_eapol(struct wil6210_priv *wil, struct sk_buff *skb);
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int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index,
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const void *mac_addr);
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int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index,
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const void *mac_addr, int key_len, const void *key);
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int wmi_echo(struct wil6210_priv *wil);
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int wmi_set_ie(struct wil6210_priv *wil, u8 type, u16 ie_len, const void *ie);
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int wil6210_init_irq(struct wil6210_priv *wil, int irq);
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void wil6210_fini_irq(struct wil6210_priv *wil, int irq);
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void wil6210_disable_irq(struct wil6210_priv *wil);
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void wil6210_enable_irq(struct wil6210_priv *wil);
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int wil6210_debugfs_init(struct wil6210_priv *wil);
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void wil6210_debugfs_remove(struct wil6210_priv *wil);
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struct wireless_dev *wil_cfg80211_init(struct device *dev);
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void wil_wdev_free(struct wil6210_priv *wil);
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int wmi_set_mac_address(struct wil6210_priv *wil, void *addr);
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int wmi_set_bcon(struct wil6210_priv *wil, int bi, u8 wmi_nettype);
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void wil6210_disconnect(struct wil6210_priv *wil, void *bssid);
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int wil_rx_init(struct wil6210_priv *wil);
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void wil_rx_fini(struct wil6210_priv *wil);
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/* TX API */
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int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size,
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int cid, int tid);
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void wil_vring_fini_tx(struct wil6210_priv *wil, int id);
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netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev);
|
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void wil_tx_complete(struct wil6210_priv *wil, int ringid);
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|
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/* RX API */
|
||
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void wil_rx_handle(struct wil6210_priv *wil);
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||
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|
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int wil_iftype_nl2wmi(enum nl80211_iftype type);
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#endif /* __WIL6210_H__ */
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