2011-12-08 16:54:07 +08:00
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/*
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* Copyright (C) 2011 Samsung Electronics Co.Ltd
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* Authors: Joonyoung Shim <jy0922.shim@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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2012-10-03 01:01:07 +08:00
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#include <drm/drmP.h>
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2011-12-08 16:54:07 +08:00
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2012-10-03 01:01:07 +08:00
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#include <drm/exynos_drm.h>
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2011-12-08 16:54:07 +08:00
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#include "exynos_drm_drv.h"
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#include "exynos_drm_encoder.h"
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2012-06-27 13:27:05 +08:00
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#include "exynos_drm_fb.h"
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#include "exynos_drm_gem.h"
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2011-12-08 16:54:07 +08:00
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2012-06-27 13:27:03 +08:00
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#define to_exynos_plane(x) container_of(x, struct exynos_plane, base)
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2011-12-08 16:54:07 +08:00
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struct exynos_plane {
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struct drm_plane base;
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struct exynos_drm_overlay overlay;
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bool enabled;
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};
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2012-03-16 17:47:15 +08:00
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static const uint32_t formats[] = {
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DRM_FORMAT_XRGB8888,
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2012-04-05 10:21:09 +08:00
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DRM_FORMAT_ARGB8888,
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DRM_FORMAT_NV12,
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DRM_FORMAT_NV12MT,
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2012-03-16 17:47:15 +08:00
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};
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2012-09-27 18:25:21 +08:00
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/*
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* This function is to get X or Y size shown via screen. This needs length and
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* start position of CRTC.
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*
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* <--- length --->
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* CRTC ----------------
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* ^ start ^ end
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*
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* There are six cases from a to b.
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*
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* <----- SCREEN ----->
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* 0 last
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* ----------|------------------|----------
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* CRTCs
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* a -------
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* b -------
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* c --------------------------
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* d --------
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* e -------
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* f -------
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*/
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static int exynos_plane_get_size(int start, unsigned length, unsigned last)
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{
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int end = start + length;
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int size = 0;
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if (start <= 0) {
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if (end > 0)
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size = min_t(unsigned, end, last);
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} else if (start <= last) {
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size = min_t(unsigned, last - start, length);
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}
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return size;
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}
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2012-06-27 13:27:05 +08:00
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int exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
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struct drm_framebuffer *fb, int crtc_x, int crtc_y,
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unsigned int crtc_w, unsigned int crtc_h,
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uint32_t src_x, uint32_t src_y,
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uint32_t src_w, uint32_t src_h)
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{
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struct exynos_plane *exynos_plane = to_exynos_plane(plane);
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struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
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unsigned int actual_w;
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unsigned int actual_h;
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int nr;
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int i;
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DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
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2012-08-20 19:05:56 +08:00
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nr = exynos_drm_fb_get_buf_cnt(fb);
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2012-06-27 13:27:05 +08:00
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for (i = 0; i < nr; i++) {
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struct exynos_drm_gem_buf *buffer = exynos_drm_fb_buffer(fb, i);
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if (!buffer) {
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DRM_LOG_KMS("buffer is null\n");
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return -EFAULT;
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}
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overlay->dma_addr[i] = buffer->dma_addr;
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overlay->vaddr[i] = buffer->kvaddr;
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DRM_DEBUG_KMS("buffer: %d, vaddr = 0x%lx, dma_addr = 0x%lx\n",
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i, (unsigned long)overlay->vaddr[i],
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(unsigned long)overlay->dma_addr[i]);
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}
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2012-09-27 18:25:21 +08:00
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actual_w = exynos_plane_get_size(crtc_x, crtc_w, crtc->mode.hdisplay);
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actual_h = exynos_plane_get_size(crtc_y, crtc_h, crtc->mode.vdisplay);
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if (crtc_x < 0) {
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if (actual_w)
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src_x -= crtc_x;
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else
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src_x += crtc_w;
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crtc_x = 0;
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}
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if (crtc_y < 0) {
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if (actual_h)
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src_y -= crtc_y;
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else
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src_y += crtc_h;
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crtc_y = 0;
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}
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2012-06-27 13:27:05 +08:00
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/* set drm framebuffer data. */
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overlay->fb_x = src_x;
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overlay->fb_y = src_y;
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overlay->fb_width = fb->width;
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overlay->fb_height = fb->height;
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overlay->src_width = src_w;
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overlay->src_height = src_h;
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overlay->bpp = fb->bits_per_pixel;
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overlay->pitch = fb->pitches[0];
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overlay->pixel_format = fb->pixel_format;
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/* set overlay range to be displayed. */
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overlay->crtc_x = crtc_x;
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overlay->crtc_y = crtc_y;
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overlay->crtc_width = actual_w;
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overlay->crtc_height = actual_h;
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/* set drm mode data. */
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overlay->mode_width = crtc->mode.hdisplay;
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overlay->mode_height = crtc->mode.vdisplay;
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overlay->refresh = crtc->mode.vrefresh;
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overlay->scan_flag = crtc->mode.flags;
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DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)",
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overlay->crtc_x, overlay->crtc_y,
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overlay->crtc_width, overlay->crtc_height);
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exynos_drm_fn_encoder(crtc, overlay, exynos_drm_encoder_plane_mode_set);
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return 0;
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}
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void exynos_plane_commit(struct drm_plane *plane)
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{
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struct exynos_plane *exynos_plane = to_exynos_plane(plane);
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struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
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exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
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exynos_drm_encoder_plane_commit);
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2012-06-27 13:27:09 +08:00
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}
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void exynos_plane_dpms(struct drm_plane *plane, int mode)
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{
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struct exynos_plane *exynos_plane = to_exynos_plane(plane);
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struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
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DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
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if (mode == DRM_MODE_DPMS_ON) {
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if (exynos_plane->enabled)
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return;
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exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
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exynos_drm_encoder_plane_enable);
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2012-06-27 13:27:05 +08:00
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2012-06-27 13:27:09 +08:00
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exynos_plane->enabled = true;
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} else {
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if (!exynos_plane->enabled)
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return;
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exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
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exynos_drm_encoder_plane_disable);
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exynos_plane->enabled = false;
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}
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2012-06-27 13:27:05 +08:00
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}
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2011-12-08 16:54:07 +08:00
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static int
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exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
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struct drm_framebuffer *fb, int crtc_x, int crtc_y,
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unsigned int crtc_w, unsigned int crtc_h,
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uint32_t src_x, uint32_t src_y,
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uint32_t src_w, uint32_t src_h)
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{
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int ret;
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DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
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2012-06-27 13:27:05 +08:00
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ret = exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y,
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crtc_w, crtc_h, src_x >> 16, src_y >> 16,
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src_w >> 16, src_h >> 16);
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2011-12-08 16:54:07 +08:00
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if (ret < 0)
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return ret;
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2012-06-27 13:27:05 +08:00
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plane->crtc = crtc;
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2011-12-08 16:54:07 +08:00
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2012-06-27 13:27:05 +08:00
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exynos_plane_commit(plane);
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2012-06-27 13:27:09 +08:00
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exynos_plane_dpms(plane, DRM_MODE_DPMS_ON);
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2011-12-08 16:54:07 +08:00
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return 0;
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}
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static int exynos_disable_plane(struct drm_plane *plane)
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{
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DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
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2012-06-27 13:27:09 +08:00
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exynos_plane_dpms(plane, DRM_MODE_DPMS_OFF);
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2011-12-08 16:54:07 +08:00
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return 0;
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}
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static void exynos_plane_destroy(struct drm_plane *plane)
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{
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2012-06-27 13:27:03 +08:00
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struct exynos_plane *exynos_plane = to_exynos_plane(plane);
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2011-12-08 16:54:07 +08:00
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DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
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exynos_disable_plane(plane);
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drm_plane_cleanup(plane);
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kfree(exynos_plane);
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}
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2012-06-27 13:27:06 +08:00
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static int exynos_plane_set_property(struct drm_plane *plane,
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struct drm_property *property,
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uint64_t val)
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{
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struct drm_device *dev = plane->dev;
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struct exynos_plane *exynos_plane = to_exynos_plane(plane);
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struct exynos_drm_private *dev_priv = dev->dev_private;
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DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
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if (property == dev_priv->plane_zpos_property) {
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exynos_plane->overlay.zpos = val;
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return 0;
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}
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return -EINVAL;
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}
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2011-12-08 16:54:07 +08:00
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static struct drm_plane_funcs exynos_plane_funcs = {
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.update_plane = exynos_update_plane,
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.disable_plane = exynos_disable_plane,
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.destroy = exynos_plane_destroy,
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2012-06-27 13:27:06 +08:00
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.set_property = exynos_plane_set_property,
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2011-12-08 16:54:07 +08:00
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};
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2012-06-27 13:27:06 +08:00
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static void exynos_plane_attach_zpos_property(struct drm_plane *plane)
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{
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struct drm_device *dev = plane->dev;
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struct exynos_drm_private *dev_priv = dev->dev_private;
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struct drm_property *prop;
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DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
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prop = dev_priv->plane_zpos_property;
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if (!prop) {
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prop = drm_property_create_range(dev, 0, "zpos", 0,
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MAX_PLANE - 1);
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if (!prop)
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return;
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dev_priv->plane_zpos_property = prop;
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}
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drm_object_attach_property(&plane->base, prop, 0);
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}
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2012-06-27 13:27:04 +08:00
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struct drm_plane *exynos_plane_init(struct drm_device *dev,
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unsigned int possible_crtcs, bool priv)
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2011-12-08 16:54:07 +08:00
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{
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struct exynos_plane *exynos_plane;
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2012-06-27 13:27:04 +08:00
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int err;
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2011-12-08 16:54:07 +08:00
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2012-06-27 13:27:06 +08:00
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DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
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2011-12-08 16:54:07 +08:00
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exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL);
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2012-06-27 13:27:04 +08:00
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if (!exynos_plane) {
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DRM_ERROR("failed to allocate plane\n");
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return NULL;
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}
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2011-12-08 16:54:07 +08:00
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2012-06-27 13:27:04 +08:00
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err = drm_plane_init(dev, &exynos_plane->base, possible_crtcs,
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2012-03-16 17:47:15 +08:00
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&exynos_plane_funcs, formats, ARRAY_SIZE(formats),
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2012-06-27 13:27:04 +08:00
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priv);
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if (err) {
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DRM_ERROR("failed to initialize plane\n");
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kfree(exynos_plane);
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return NULL;
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}
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2012-06-27 13:27:06 +08:00
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if (priv)
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exynos_plane->overlay.zpos = DEFAULT_ZPOS;
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else
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exynos_plane_attach_zpos_property(&exynos_plane->base);
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2011-12-08 16:54:07 +08:00
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2012-06-27 13:27:06 +08:00
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return &exynos_plane->base;
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2011-12-08 16:54:07 +08:00
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}
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