94 lines
1.9 KiB
C
94 lines
1.9 KiB
C
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/*
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* linux/arch/arm/kernel/pj4-cp0.c
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*
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* PJ4 iWMMXt coprocessor context switching and handling
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*
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* Copyright (c) 2010 Marvell International Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <asm/thread_notify.h>
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static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
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{
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struct thread_info *thread = t;
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switch (cmd) {
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case THREAD_NOTIFY_FLUSH:
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/*
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* flush_thread() zeroes thread->fpstate, so no need
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* to do anything here.
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*
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* FALLTHROUGH: Ensure we don't try to overwrite our newly
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* initialised state information on the first fault.
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*/
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case THREAD_NOTIFY_EXIT:
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iwmmxt_task_release(thread);
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break;
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case THREAD_NOTIFY_SWITCH:
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iwmmxt_task_switch(thread);
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break;
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}
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return NOTIFY_DONE;
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}
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static struct notifier_block iwmmxt_notifier_block = {
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.notifier_call = iwmmxt_do,
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};
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static u32 __init pj4_cp_access_read(void)
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{
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u32 value;
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__asm__ __volatile__ (
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"mrc p15, 0, %0, c1, c0, 2\n\t"
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: "=r" (value));
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return value;
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}
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static void __init pj4_cp_access_write(u32 value)
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{
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u32 temp;
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__asm__ __volatile__ (
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"mcr p15, 0, %1, c1, c0, 2\n\t"
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"mrc p15, 0, %0, c1, c0, 2\n\t"
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"mov %0, %0\n\t"
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"sub pc, pc, #4\n\t"
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: "=r" (temp) : "r" (value));
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}
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/*
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* Disable CP0/CP1 on boot, and let call_fpe() and the iWMMXt lazy
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* switch code handle iWMMXt context switching.
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*/
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static int __init pj4_cp0_init(void)
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{
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u32 cp_access;
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cp_access = pj4_cp_access_read() & ~0xf;
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pj4_cp_access_write(cp_access);
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printk(KERN_INFO "PJ4 iWMMXt coprocessor enabled.\n");
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elf_hwcap |= HWCAP_IWMMXT;
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thread_register_notifier(&iwmmxt_notifier_block);
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return 0;
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}
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late_initcall(pj4_cp0_init);
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