2012-07-07 22:56:48 +08:00
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* Freescale i.MX ci13xxx usb controllers
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Required properties:
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- compatible: Should be "fsl,imx27-usb"
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- reg: Should contain registers location and length
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- interrupts: Should contain controller interrupt
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2014-07-22 10:09:44 +08:00
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- fsl,usbphy: phandle of usb phy that connects to the port
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2012-07-07 22:56:48 +08:00
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2013-06-13 22:59:56 +08:00
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Recommended properies:
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- phy_type: the type of the phy connected to the core. Should be one
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of "utmi", "utmi_wide", "ulpi", "serial" or "hsic". Without this
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property the PORTSC register won't be touched
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2013-06-13 22:59:57 +08:00
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- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg"
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2013-06-13 22:59:56 +08:00
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2012-07-07 22:56:48 +08:00
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Optional properties:
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2012-09-12 19:58:05 +08:00
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- fsl,usbmisc: phandler of non-core register device, with one argument
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that indicate usb controller index
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2012-07-07 22:56:48 +08:00
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- vbus-supply: regulator for vbus
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2012-09-12 19:58:05 +08:00
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- disable-over-current: disable over current detect
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2013-03-30 18:54:01 +08:00
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- external-vbus-divider: enables off-chip resistor divider for Vbus
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2014-02-19 13:41:43 +08:00
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- maximum-speed: limit the maximum connection speed to "full-speed".
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2014-08-19 09:51:57 +08:00
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- tpl-support: TPL (Targeted Peripheral List) feature for targeted hosts
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2012-07-07 22:56:48 +08:00
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Examples:
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usb@02184000 { /* USB OTG */
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compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
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reg = <0x02184000 0x200>;
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interrupts = <0 43 0x04>;
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fsl,usbphy = <&usbphy1>;
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2012-09-12 19:58:05 +08:00
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fsl,usbmisc = <&usbmisc 0>;
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disable-over-current;
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2013-03-30 18:54:01 +08:00
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external-vbus-divider;
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2014-02-19 13:41:43 +08:00
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maximum-speed = "full-speed";
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2014-08-19 09:51:57 +08:00
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tpl-support;
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2012-07-07 22:56:48 +08:00
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};
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