2012-04-21 06:43:14 +08:00
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/*
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* Copyright (C) 2012 Samsung Electronics Co., Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef FIMC_LITE_H_
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#define FIMC_LITE_H_
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2012-08-17 14:28:26 +08:00
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#include <linux/sizes.h>
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2012-04-21 06:43:14 +08:00
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#include <linux/io.h>
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#include <linux/irqreturn.h>
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#include <linux/platform_device.h>
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#include <linux/sched.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <linux/videodev2.h>
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#include <media/media-entity.h>
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#include <media/videobuf2-core.h>
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2013-02-26 00:20:21 +08:00
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#include <media/v4l2-ctrls.h>
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2012-04-21 06:43:14 +08:00
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#include <media/v4l2-device.h>
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#include <media/v4l2-mediabus.h>
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2014-04-15 19:35:25 +08:00
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#include <media/exynos-fimc.h>
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2012-04-21 06:43:14 +08:00
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#define FIMC_LITE_DRV_NAME "exynos-fimc-lite"
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#define FLITE_CLK_NAME "flite"
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2013-06-14 23:38:15 +08:00
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#define FIMC_LITE_MAX_DEVS 3
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2012-04-21 06:43:14 +08:00
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#define FLITE_REQ_BUFS_MIN 2
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2013-06-18 19:00:42 +08:00
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#define FLITE_DEFAULT_WIDTH 640
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#define FLITE_DEFAULT_HEIGHT 480
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2012-04-21 06:43:14 +08:00
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/* Bit index definitions for struct fimc_lite::state */
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enum {
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ST_FLITE_LPM,
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ST_FLITE_PENDING,
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ST_FLITE_RUN,
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ST_FLITE_STREAM,
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ST_FLITE_SUSPENDED,
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ST_FLITE_OFF,
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ST_FLITE_IN_USE,
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ST_FLITE_CONFIG,
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ST_SENSOR_STREAM,
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};
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#define FLITE_SD_PAD_SINK 0
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2012-11-29 02:41:01 +08:00
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#define FLITE_SD_PAD_SOURCE_DMA 1
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#define FLITE_SD_PAD_SOURCE_ISP 2
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#define FLITE_SD_PADS_NUM 3
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2012-04-21 06:43:14 +08:00
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2013-06-14 23:38:15 +08:00
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/**
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* struct flite_drvdata - FIMC-LITE IP variant data structure
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* @max_width: maximum camera interface input width in pixels
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* @max_height: maximum camera interface input height in pixels
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* @out_width_align: minimum output width alignment in pixels
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* @win_hor_offs_align: minimum camera interface crop window horizontal
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* offset alignment in pixels
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* @out_hor_offs_align: minimum output DMA compose rectangle horizontal
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* offset alignment in pixels
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* @max_dma_bufs: number of output DMA buffer start address registers
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* @num_instances: total number of FIMC-LITE IP instances available
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*/
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2013-03-17 04:35:10 +08:00
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struct flite_drvdata {
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2012-04-21 06:43:14 +08:00
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unsigned short max_width;
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unsigned short max_height;
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unsigned short out_width_align;
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unsigned short win_hor_offs_align;
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unsigned short out_hor_offs_align;
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unsigned short max_dma_bufs;
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unsigned short num_instances;
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2012-04-21 06:43:14 +08:00
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};
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struct fimc_lite_events {
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unsigned int data_overflow;
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};
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#define FLITE_MAX_PLANES 1
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/**
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* struct flite_frame - source/target frame properties
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* @f_width: full pixel width
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* @f_height: full pixel height
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* @rect: crop/composition rectangle
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2013-03-21 02:31:03 +08:00
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* @fmt: pointer to pixel format description data structure
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2012-04-21 06:43:14 +08:00
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*/
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struct flite_frame {
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u16 f_width;
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u16 f_height;
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struct v4l2_rect rect;
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2013-03-21 02:31:03 +08:00
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const struct fimc_fmt *fmt;
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2012-04-21 06:43:14 +08:00
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};
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/**
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* struct flite_buffer - video buffer structure
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* @vb: vb2 buffer
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* @list: list head for the buffers queue
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* @paddr: DMA buffer start address
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* @index: DMA start address register's index
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2012-04-21 06:43:14 +08:00
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*/
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struct flite_buffer {
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struct vb2_buffer vb;
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struct list_head list;
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dma_addr_t paddr;
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unsigned short index;
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2012-04-21 06:43:14 +08:00
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};
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/**
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* struct fimc_lite - fimc lite structure
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* @pdev: pointer to FIMC-LITE platform device
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2013-03-17 04:35:10 +08:00
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* @dd: SoC specific driver data structure
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2013-05-31 22:37:18 +08:00
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* @ve: exynos video device entity structure
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2012-04-21 06:43:14 +08:00
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* @v4l2_dev: pointer to top the level v4l2_device
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* @fh: v4l2 file handle
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* @alloc_ctx: videobuf2 memory allocator context
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* @subdev: FIMC-LITE subdev
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* @vd_pad: media (sink) pad for the capture video node
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* @subdev_pads: the subdev media pads
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2012-11-29 02:41:01 +08:00
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* @sensor: sensor subdev attached to FIMC-LITE directly or through MIPI-CSIS
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2012-04-21 06:43:14 +08:00
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* @ctrl_handler: v4l2 control handler
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* @test_pattern: test pattern controls
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* @index: FIMC-LITE platform device index
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* @pipeline: video capture pipeline data structure
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2012-08-14 21:46:58 +08:00
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* @pipeline_ops: media pipeline ops for the video node driver
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2012-04-21 06:43:14 +08:00
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* @slock: spinlock protecting this data structure and the hw registers
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* @lock: mutex serializing video device and the subdev operations
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* @clock: FIMC-LITE gate clock
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* @regs: memory mapped io registers
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* @irq_queue: interrupt handler waitqueue
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* @payload: image size in bytes (w x h x bpp)
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* @inp_frame: camera input frame structure
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* @out_frame: DMA output frame structure
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* @out_path: output data path (DMA or FIFO)
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* @source_subdev_grp_id: source subdev group id
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* @state: driver state flags
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* @pending_buf_q: pending buffers queue head
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* @active_buf_q: the queue head of buffers scheduled in hardware
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* @vb_queue: vb2 buffers queue
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* @buf_index: helps to keep track of the DMA start address register index
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* @active_buf_count: number of video buffers scheduled in hardware
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* @frame_count: the captured frames counter
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* @reqbufs_count: the number of buffers requested with REQBUFS ioctl
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*/
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struct fimc_lite {
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struct platform_device *pdev;
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struct flite_drvdata *dd;
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2013-05-31 22:37:18 +08:00
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struct exynos_video_entity ve;
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struct v4l2_device *v4l2_dev;
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struct v4l2_fh fh;
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struct vb2_alloc_ctx *alloc_ctx;
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struct v4l2_subdev subdev;
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struct media_pad vd_pad;
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struct media_pad subdev_pads[FLITE_SD_PADS_NUM];
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struct v4l2_subdev *sensor;
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struct v4l2_ctrl_handler ctrl_handler;
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struct v4l2_ctrl *test_pattern;
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2013-04-16 14:02:20 +08:00
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int index;
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2012-04-21 06:43:14 +08:00
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struct mutex lock;
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spinlock_t slock;
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struct clk *clock;
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void __iomem *regs;
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wait_queue_head_t irq_queue;
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unsigned long payload[FLITE_MAX_PLANES];
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struct flite_frame inp_frame;
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struct flite_frame out_frame;
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2013-01-18 23:02:32 +08:00
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atomic_t out_path;
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unsigned int source_subdev_grp_id;
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unsigned long state;
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struct list_head pending_buf_q;
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struct list_head active_buf_q;
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struct vb2_queue vb_queue;
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2013-06-14 23:38:15 +08:00
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unsigned short buf_index;
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unsigned int frame_count;
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unsigned int reqbufs_count;
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struct fimc_lite_events events;
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2013-03-26 03:50:50 +08:00
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bool streaming;
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2012-04-21 06:43:14 +08:00
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};
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static inline bool fimc_lite_active(struct fimc_lite *fimc)
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{
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unsigned long flags;
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bool ret;
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spin_lock_irqsave(&fimc->slock, flags);
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ret = fimc->state & (1 << ST_FLITE_RUN) ||
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fimc->state & (1 << ST_FLITE_PENDING);
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spin_unlock_irqrestore(&fimc->slock, flags);
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return ret;
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}
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static inline void fimc_lite_active_queue_add(struct fimc_lite *dev,
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struct flite_buffer *buf)
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{
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list_add_tail(&buf->list, &dev->active_buf_q);
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}
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static inline struct flite_buffer *fimc_lite_active_queue_pop(
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struct fimc_lite *dev)
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{
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struct flite_buffer *buf = list_entry(dev->active_buf_q.next,
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struct flite_buffer, list);
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list_del(&buf->list);
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return buf;
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}
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static inline void fimc_lite_pending_queue_add(struct fimc_lite *dev,
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struct flite_buffer *buf)
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{
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list_add_tail(&buf->list, &dev->pending_buf_q);
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}
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static inline struct flite_buffer *fimc_lite_pending_queue_pop(
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struct fimc_lite *dev)
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{
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struct flite_buffer *buf = list_entry(dev->pending_buf_q.next,
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struct flite_buffer, list);
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list_del(&buf->list);
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return buf;
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}
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#endif /* FIMC_LITE_H_ */
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